CHAPTER 3

A TOP-LEVEL VIEW OF
COMPUTER FUNCTION
AND INTERCONNECTION
Describe the concept of interconnection within a
computer system.

Explain system buse interconnection

(data, address, control)
LEARINNG
Understand memory hierarchy and its OBJECTIVES
impact on performance

Understand I/O systems and peripheral devices

 CONTENTS
Overview of “A Top-Level View of Bus interconnection
Computer Function and Interconnection”

Memory system and it’s

Computer components
Characteristics

Computer function Memory Hierarchy

Interconnection structures I/O systems and

peripheral devices
Overview of “A Top-Level View of Computer
Function and Interconnection”
 Hardware and Software

COMPUTER COMPONENTS
Approaches

data are stored in a single read-write

memory
the memory in a computer is organized in a
way where each piece of information is
stored at a specific address or location.
Execution occurs in sequential fashion from
one instruction to the next.
 COMPUTER COMPONENTS
Hardwired Programming

• Hardwired Programming means creating a special machine for each specific task by
physically arranging electronic components.
• It’s fast for the task it’s built for, but not flexible, you have to reconnect parts if you want it to
do something else.
 COMPUTER COMPONENTS
PROGRAMMING IN SOFTWARE : Programming is much easier now because instead of
changing the hardware for every new task, we just write a new set of instructions.

write a list of instructions using codes.

Instructions interpreter : a small command
CPU
that tells the computer what to do
Control signal : sends signals to other parts of
the computer to carry out the command
Memory - data and To distinguish this new method of
instruction programming, a sequence of codes or
instructions is called software.
I/O components I/O components
 COMPUTER FUNCTION
CPU exchange data with memory A Top-Level View
Two internal registers: Memory
Address Register (MAR) and
Memory Buffer Register (MBR).
MAR: specifies the address in
memory for the next read or write
MBR: contains data to be written
into memory or receives the data
read from memory.
I/O AR I/O Address Register,
specifies a particular I/O device.
I/O BR: used for the exchange of
data between an I/O module and
the CPU.
 COMPUTER FUNCTION
A memory module consists of a set of A Top-Level View
locations (small storage units), defined
by sequentially numbered addresses.
Each location contains a binary number
that can be interpreted as either an
instruction or data.
An I/O module transfers data from
external devices to CPU and memory, and
vice versa.
It contains internal buffers for
temporarily holding these data until they
can be sent on.
 COMPUTER FUNCTION
Memory Buffer Register (MBR): A Top-Level View
Contains a word to be stored in memory or
sent to the I/O unit
Or is used to receive a word from memory or
from the I/O unit
Memory address register (MAR)
Specifies the address in memory of the word
to be written from or read into the MBR
Instruction register (IR)
Contains the 8-bit opcode instruction being
executed
Instruction buffer register (IBR) -

Temporarily hold the right-hand instruction

from a word in memory
 COMPUTER FUNCTION
Program counter (PC) A Top-Level View
Contains the address of the next
instruction pair to be fetched from
memory
Accumulator (AC) and multiplier
quotient (MQ)
temporarily hold operands and
results of ALU operations

-
COMPUTER FUNCTION
Basic Function of a Computer

To excecute a program

consists of a set of instructions stored in

memory.

processor does the actual work by executing instructions

specified in the program
 COMPUTER FUNCTION
Basic Instruction Cycle/Processing
Instruction processing consists of two steps: fetch cycle and execute cycle.
The processor reads (fetches) instructions from memory one at a time and executes each instruction
Program execution consists of repeating the process of instruction fetch and instruction execution.
The instruction execution may involve several operations and depends on the nature of the instruction.
Program execution halts only if the machine is turned off, some sort of unrecoverable error occurs, or a
program instruction that halts the computer is encountered
 COMPUTER FUNCTION
Basic Instruction Cycle/Processing
1. START: the initial state of the CPU, where it begins its
operation
The CPU is powered on and ready to start processing
instructions
At this point, the Program Counter (PC) is set to the
address of the first instruction of the program that
needs to be executed.

2. Fetch Next Instruction:

The CPU reads the next instruction from main memory (RAM) using the address stored in the Program Counter (PC).
This instruction is loaded into the Instruction Register (IR), which holds the instruction while it’s being processed.
The Program Counter is then updated to point to the next instruction in memory, so that the next fetch operation will retrieve
the following instruction.
The processor interprets the instruction and performs the required action
 COMPUTER FUNCTION
ACTION CATEGORY
Processor-memory: Data may be transferred from processor to
memory or from memory to processor.
Processor-I/O: Data may be transferred to or from a peripheral device
by transferring between the processor and an I/O module.
Data processing: The processor may perform some arithmetic or logic
operation on data.
Control: An instruction may specify that the sequence of execution be
altered.
 COMPUTER FUNCTION

PROGRAM EXECUTION
 COMPUTER FUNCTION

The PC contains 300, the address of the first instruction. This instruction (the value
1940 in hexadecimal) is loaded into the instruction register IR, and the PC is
incremented.
This process involves the use of a memory address register and a memory buffer
register. For simplicity, these intermediate registers are ignored.
 COMPUTER FUNCTION

The first 4 bits (first hexadecimal digit) in the IR indicate that

the AC is to be loaded.
The remaining 12 bits (three hexadecimal digits) specify the
address (940) from which data are to be loaded.
 COMPUTER FUNCTION

The next instruction (5941) is fetched from location 301, and

the PC is incremented.
 COMPUTER FUNCTION

The old contents of the AC and the contents of location 941

are added, and the result is stored in the AC.
 COMPUTER FUNCTION

The next instruction (2941) is fetched from location 302, and the PC
is incremented.
 COMPUTER FUNCTION

The contents of the AC are stored in location 941.

 COMPUTER FUNCTION
Instruction address calculation (iac): Determine the address of
the next instruction to be executed. Usually, this involves adding
a fixed number to the address of the previous instruction.
Instruction fetch (if): Read instruction from its memory location
into the processor.
Instruction operation decoding (iod): Analyze instruction to
determine type of operation to be performed and operand(s) to be
used.
Operand address calculation (oac): If the operation involves
reference to an operand in memory or available via I/O, then
determine the address of the operand.
Operand fetch (of): Fetch the operand from memory or read it in
from I/O.
Data operation (do): Perform the operation indicated in the
instruction.
Operand address calculation(oac): If the operation involves in an
Instruction Cycle State Diagram operand in memory or available via I/O then determind the
address of the operand
Operand store(os): Write the result into memory or out to I/O.
 COMPUTER FUNCTION
Interrupts
• An interrupt is a signal sent to the CPU that pauses the current
process or task.
• It tells the CPU that something urgent needs attention, such as
input/output operations or an error.
• The CPU stops its current work, handles the interrupt, and then
returns to what it was doing before.
 COMPUTER FUNCTION
INTERRUPTS AND INSTRUCTION CYCLE
With interrupts, the processor can be engaged in
executing other instructions while an I/O operation
is in progress.
The I/O module for that external device sends an
interrupt request signal to the processor.
The processor responds by suspending operation
of the current program, branching off to a program
to service that particular I/O device, known as an
interrupt handler, and resuming the original
execution after the device is serviced.
Interrupt handler program is generally part of the
operating system.
 COMPUTER FUNCTION
INTERRUPTS AND INSTRUCTION CYCLE
To accommodate interrupts, an interrupt cycle is added to the
instruction cycle.
In the interrupt cycle, the processor checks to see if any
interrupts have occurred, indicated by the presence of an
interrupt signal.
If no interrupts are pending, the processor proceeds to the
fetch cycle and fetches the next instruction of the current
program.
If an interrupt is pending, the processor does the following:
It suspends execution of the current program being executed
and saves its context. This means saving the address of the
next instruction to be executed (current contents of the
program counter) and any other data relevant to the
processor’s current activity.
It sets the program counter to the starting address of an
interrupt handler routine.
 COMPUTER FUNCTION
MULTIPLE INTERRUPTS DISABLE
INTERRUPTS
Disable interrupts while an interrupt is being processed.
Processor can and will ignore that interrupt request signal.
If an interrupt occurs during this time, it generally remains
pending and will be checked by the processor after the
processor has enabled interrupts.
Thus, when a user program is executing and an interrupt
occurs, interrupts are disabled immediately.
After the interrupt handler routine completes, interrupts are
enabled before resuming the user program, and the processor
checks to see if additional interrupts have occurred.
This approach is nice and simple, as interrupts are handled in
strict sequential order.
The drawback to the preceding approach is that it does not
take into account relative priority or time-critical needs.
 COMPUTER FUNCTION
MULTIPLE INTERRUPTS
Multiple Interrupts: occur when a computer system needs to handle more than one interrupt at a time, or
when an interrupt happens while another one is already being processed

This prioritization ensures that time-critical communication is handled first, data storage operations are DEFINE
PRIORITY
attended to next, and tasks like printing, which can wait, are given the lowest priority. This approach
helps maintain overall system responsiveness and efficiency.

1. Communication Link (1st - Highest Priority)

2. Disk (2nd - Medium Priority)
3. Printer (3rd - Lowest Priority)
 COMPUTER FUNCTION
I/O Function
I/O module can exchange data directly with the processor
Processor can read data from or write data to an I/O
module
I/O instructions rather than memory referencing
instructions
In some cases it is desirable to allow I/O exchanges to
occur directly with memory
The processor grants to an I/O module the authority to
read from or write to memory so that I/O memory
transfer can occur without tying up the processor
The I/O module issues read or write commands to
memory relieving the processor of responsibility for the
exchange
This operation is known as direct memory access (DMA)
 INTERCONNECTION STRUCTURE
• A computer consists of three main (sets)
modules : CPU, Memory and, Input/Output
(I/O)
• These components need to communicate
with each other.
• To enable this communication, they are
connected through pathways called the
interconnection structure.
• The design of this interconnection depends
on how the components need to exchange
information.
 INTERCONNECTION STRUCTURE
Memory to processor: The processor reads an
instruction or a unit of data from memory.
Processor to memory: The processor writes a
unit of data to memory.
I/O to processor: The processor reads data from
an I/O device via an I/O module.
Processor to I/O: The processor sends data to
the I/O device.
I/O to or from memory: For these two cases, an
I/O module is allowed to exchange data directly
with memory, without going through the
processor, using direct memory access.
 BUS INTERCONNECTION
A bus is a set of parallel
wires or lines that carry
data, addresses, and
control signals between
the different components
of a computer.
The bus acts like a
highway, allowing data to
move between the CPU,
memory, and I/O devices.
 BUS INTERCONNECTION
Types of bus
Data Bus: Carries actual data between
the CPU, memory, and I/O devices.
Address Bus: Carries the address of
the memory location where the data
needs to be read from or written to.
Control Bus: Carries control signals,
such as read/write commands, to
manage the operations of the CPU,
memory, and I/O modules.
 BUS INTERCONNECTION Control Bus
Address Bus
Data Bus
Controls the access and use
Address lines identify the source or
of data and address lines.
destination of data on the data bus.
Data lines allow data to move When the processor wants to read
Manages how all
between system modules. data from memory, it places the components share the data
All the data lines together are address of the desired data on the and address lines.
called the data bus. address lines. Sends control signals with
The data bus may have 32, 64, 128, The width of the address bus
commands and timing
or more lines. determines the maximum memory
information.
The number of lines is called the capacity of the system.
width of the data bus. Address lines are also used to access Timing signals show when
The width determines how many I/O ports. data and address info is
bits can be transferred at once. Higher-order bits select a specific valid.
A wider data bus generally means module on the bus, while lower-order Command signals tell what
better system performance. bits select a memory location or I/O
operations to perform
port within that module
“Read”/”Write”.
 BUS INTERCONNECTION
Bus Interconnection Process
CPU to I/O Module Communication
1. The CPU sends the address of the
specific I/O device using the address
bus.
2. It sends control signals (e.g., read or
write) through the control bus.
3. Data is then transferred between the
I/O module and the CPU through the
data bus.
 BUS INTERCONNECTION
Drawbacks of a traditional bus system Modern bus systems have replaced traditional bus
Limited Bandwidth :All components share the same architectures to address the limitations of bandwidth,
bus for communication, which can cause scalability, and efficiency.
bottlenecks when multiple devices try to use it at
the same time. point-to-point link is a direct communication
Lack of Scalability: As more devices are connected pathway between two devices or components,
to the bus, it becomes harder to manage and the where data can travel directly from one point to
another without sharing the connection with other
system becomes less efficient.
devices.
Single Point of Failure: Since all communication
PCI Express (PCIe): Each PCIe lane connects directly
goes through a single bus, if the bus fails or
between the CPU and an expansion card (like a GPU),
encounters an issue, it can cause problems for the
allowing for high-speed data transfer.
entire system.
 MEMORY SYSTEM AND IT’S
CHARACRTERISTICS
1. Location: 3. Unit of Transfer:
Refers to where the memory is located The amount of data that is
in the system transferred to or from the memory.
Internal (e.g., CPU registers, cache). For internal memory, this is often the
External (e.g., hard drives, SSDs). word size (e.g., 32-bit or 64-bit
words).
2. Capacity: For external memory, this might be
The amount of data that a memory can blocks or sectors.
store.
Measured in bytes or words.
A higher capacity allows more data or
programs to be stored.
 MEMORY SYSTEM AND IT’S
CHARACRTERISTICS
4. Access Method: Describes how data is 5. Performance: The speed of
accessed or retrieved from memory: memory is key to system
Sequential Access: Data is accessed in a performance:
specific order (e.g., tape storage). Access Time: The time taken to
Direct Access: Data can be accessed access a memory location and
directly but not with equal speed (e.g., read or write data.
hard drives). Cycle Time: The time required to
Random Access: Any location can be complete one read/write
accessed directly and quickly (e.g., operation.
RAM). Transfer Rate: The speed at
Associative Access: Data is accessed which data can be transferred
based on a portion of its content rather to and from memory.
than an address (e.g., cache memory).
 MEMORY SYSTEM AND IT’S
CHARACRTERISTICS
6. Physical Type: Refers to the physical 7. Organization: Refers to the
technology used to build the memory: arrangement of data within the
Semiconductor Memory: Used for RAM, memory. This includes the number
cache, and registers. of bits per word, how data is stored,
Magnetic Memory: Used in hard disks
and how data is structured.
and tapes.
Optical Memory: Used in CDs and DVDs.
Flash Memory: Used in USB drives and
SSDs.
 MEMORY SYSTEM PERSORMANCE
PARAMETERS
1. Access Time 2. Memory Cycle Time 3 Transfer Rate
• Definition: The time it takes to locate a • Definition: The total time required for the • Definition: The rate at which data
specific data address in memory and retrieve memory to complete one read/write is transferred to or from memory.
the data from that location. operation and to be ready for the next • Formula: It is often measured in
• Importance: A shorter access time means access. megabytes per second (MB/s) or
faster data retrieval, which leads to better • Difference from Access Time: Memory gigabytes per second (GB/s).
overall system performance. cycle time includes the access time plus any • Importance: A higher transfer rate
• For RAM, access time is generally very fast, additional time for the memory to recover means that large blocks of data can
while for secondary storage like hard drives, it before the next operation. be moved quickly, which is crucial
is much slower. • Importance: Shorter cycle times allow the for applications that involve large
system to perform more read/write data processing, like video editing
operations in a given time, thus improving or scientific simulations.
memory throughput.
 MEMORY SYSTEM PERSORMANCE
PARAMETERS
Memory throughput : a measure of the rate at which data can be read from or written to the
memory system of a computer. It is typically measured in megabytes per second (MB/s) or
gigabytes per second (GB/s) and indicates the performance of the memory in terms of how
much data it can transfer in a given period.
Example:

If a memory system has a 64-bit bus (8 bytes) and operates at 3200 MHz, the maximum
theoretical throughput can be calculated as:

• Throughput = Bus width (bytes) × Clock speed (MHz)

• Throughput = 8 bytes × 3200 MHz = 25,600 MB/s (or 25.6 GB/s)

This means that the memory can potentially transfer 25.6 gigabytes of data per second to
and from the CPU.
 where data is temporarily stored CPU MEMORY
HIERACHY
for immediate processing.

where data is stored

after processing

How much, how fast, how expensive?

A trade-off among capacity, access time,
and cost
Faster access time, greater cost per
bit
Greater capacity, smaller cost per bit
used for backup or long-term storage and
is not always connected to the system. Greater capacity, slower access time
 MEMORY HIERACHY
CPU Cache memory is a small, high-speed
memory located closer to the CPU that stores
copies of frequently accessed data and
instructions from the main memory (RAM).

Faster than Main Memory: Cache memory is

much faster than regular RAM, so data retrieval
is quicker
Temporary Storage: The content is temporary—
data can be replaced when other data is more
frequently accessed.
Located Close to the CPU: Cache is often built
directly into the CPU chip (called L1 cache) or is
very close to it (called L2 and L3 cache).
 I/O SYSTEM AND PERIPHERAL DEVICES
The I/O system is responsible for managing the
data transfer between the computer’s internal
components (like the CPU and memory) and
external devices.
Data Transfer: It handles the input of data from
devices and the output of data to devices.
Control Signals: It generates control signals to
manage the operations of peripheral devices.
Device Management: It keeps track of devices,
their status, and their data.
Buffering: It may temporarily store data in buffers
to manage differences in speed between the CPU
and peripheral devices.
Error Handling: It detects and manages errors that
may occur during data transmission.
 I/O SYSTEM AND PERIPHERAL DEVICES
Peripheral devices are external hardware components that connect to the computer to provide
additional functionality. They are not part of the core computer architecture but enhance the
system’s capabilities.
1. Input Devices: Used to enter 2. Output Devices: Used to output data
data into the computer. from the computer to the user or
• Keyboard another device.
• Mouse • Monitor
• Scanner • Printer
• Microphone • Speakers
3. Storage Devices: Used for 4. Communication Devices: Used to
storing data. connect the computer to networks or
• Hard disk drives (HDD) other devices.
• Solid-state drives (SSD) Modems
• USB flash drives Network Interface Cards (NICs)
• Optical discs (CDs, DVDs) Bluetooth adapters
THANK
YOU!