AMSD Unit 1

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Mixed Signal Design

Unit - I
Switched-Capacitor Circuits
The most popular approach for realizing analog signal
processing in MOS integrated circuits is, through the
use of switched capacitor circuits .

A switched-capacitor circuit operates as a discrete-time


signal processor.

As a filtering technique, switched-capacitor circuits are


popular due to their accurate frequency response as
well as good linearity and dynamic range.

In addition to creating filtering functions, switched-


capacitor circuit techniques can be used to realize a
variety of other signal-processing blocks such as gain-
stages, voltage-controlled oscillators, and modulators.

Basic Introduction
Switched-capacitor circuit is one of the most popular
approach for realizing analog signal processing on the
IC level.
Applications for this technology range from filters,
AC/DC converters, comparators, telecommunications,
and everything in between.
A switched-capacitor circuit is a discrete-time circuit
that exploits the charge transfer in and out of a
capacitor as controlled by switches.

The switching activity is generally controlled by well-


defined, non-overlapping clocks such that the charge
transfer in and out is well defined and deterministic.
Basic Introduction
These circuits can be thought of as a type of sample and
hold circuit, where values are sampled and passed
around through the circuit to achieve the desired
functionality.

Switched-capacitor circuits are very popular in


applications such as filter designs because of their
extremely accurate frequency response along with good
linearity and dynamic range.

The most fundamental building block of switched-


capacitor circuit design is the switched-capacitor
resistor. As mentioned, this circuit has two non-
overlapping clocks of the same frequency.
BASIC BUILDING BLOCKS
> Op – Amps
> Capacitors
> Switches
> Non overlapping Clocks
BASIC BUILDING BLOCKS

1. Op – Amps

Key Point: Op amp nonidealities


such as dc gain, unity-gain frequency,
phase-margin, slew-rate, dc offset and
impact on switched-capacitor circuit
performance
BASIC BUILDING BLOCKS

2. Capacitors
A highly linear capacitance in an integrated circuit is
typically constructed from two closely-spaced
conducting layers, as shown in below figure.
3. Switches
The requirements for switches used in switched
capacitor circuits are that they have a very high off
resistance (so little charge leakage occurs), a
relatively low ON resistance (so that the circuit can
settle in less than half the clock period), and introduce
no offset voltage when turned ON (as does a bipolar switch
whose on voltage equals VCE(sat)).

The use of MOSFET transistors as switches satisfies


these requirements, as MOSFET switches can have
off resistances up to the GΩ range, have no offset on
voltages, and have on resistances of 5 kΩ or much
less depending on transistor sizing.
4. Non overlapping Clocks
At least one pair of non-overlapping clocks is essential
in switched-capacitor circuits. These clocks determine
when charge transfers occur and they must be non-
overlapping in order to guarantee charge is not
inadvertently lost.

One simple method for generating non-overlapping


clocks is shown in above figure.

Here, delay blocks are used to ensure that the clocks


remain non-overlapping. These delays could be
implemented as a cascade of an even number of
inverters or perhaps an RC network.
BASIC OPERATION AND ANALYSIS
Switched capacitor resistor or Resistor equivalence of a switched capacitor

Consider the switched-capacitor circuit shown in above figure. where V1 and


V2 are two dc voltage sources.
To analyze this circuit’s behavior, we analyze the circuit from a charge
perspective.
The charge on a capacitor, Qx, is equal to the capacitance
value, Cx, times the voltage across it, Vx.

In mathematical terms, we have,


In the first stage, switch 1 is turned on while switch 2 is
turned off. In this setup, the charge flows from node V1 into
the capacitor.
In the second stage, switch 1 opens while switch 2 is
closed. At this point, C1 is connected to node V2 and will
either charge or discharge until the final voltage on the
capacitor is at V2.
The total value of this charge at each stage is given as
If we were to consider the total change in charge, we
get the following equations:

The current is defined as a change of charge with respect to


time (the change in time is nothing more than our clock
period), we can get the average value of current across this
switched capacitor as

where T is the clock period.


Relating to the above equation, an equivalent resistor
circuit shown in below figure , where

we see that the average current through the switched-capacitor


circuit of first figure will equal that for the equivalent resistor
circuit of second figure if
Data Converters Switched-Capacitor Circuits
Professor Y. Chiu
EECT 7327
Fall 2014

– 23 –
Continuous-Time Integrator

t
C2 1
vo t  = -  v ξ  dξ
in
R1
R 1C 2 -∞

Vi Vo  1  1
Vo
H s  = s  = -  
Vi  R 1C 2  s

  = R 1C 2
C2

Goal: Vi SC
Vo

Approach: emulating resistors with switched capacitors


Data Converters Switched-Capacitor Circuits
Professor Y. Chiu
EECT 7327
Fall 2014

– 25 –
Data Converters Switched-Capacitor Circuits
Professor Y. Chiu
EECT 7327
Fall 2014

– 26 –
Switched-Capacitor Circuits

Concept of Switched Capacitor


R Ф2 C Ф2
VA VB Non-overlapping
VA VB
two-phase clock
Ф1 <i> Ф1
i
Ф1

1 q C
i=  VA - VB  i = =  VA - VB 
Ф2

R T T

T T  C2 
 R eq = so,  = R e q,1  C 2 = C2 = T  
C C1  C1 

• A switched capacitor is a discrete-time “resistor”


• RC time constant set by capacitor ratio C2/C1 (match
considerably better than R and
– 27 –
C) and clock period T (flexibility )
Data Converters Switched-Capacitor Circuits
Professor Y. Chiu
EECT 7327

Types of Switched Capacitors


Fall 2014

Shunt-type Series-type 2-phase clock

Ф1 Ф2 Ф1 C
Ф1 Ф2 Ф1 Ф2 Ф1 Ф2
VA VB VA VB
C Ф2

Ф2(Ф1) C Ф2
VA VB Stray-insensitive

Ф1(Ф2) Ф1

• Shunt- and series-type SCs are simple and cheap to implement


• Stray-insensitive SC requires 2 more switches, what’s the advantage
besides being more flexible (i.e., w/ or w/o the T/2 delay)?
– 28 –
Discrete-Time Integrator (DTI)
Shunt-type Series-type
C2 Ф2 C2

Ф1 Ф2 Ф1 C1
Vi Vi
Vo Vo
C1

2-phase clock

Ф1 Ф2 Ф1 Ф2 Ф1 Ф2

While analyzing these DTIs ( in z-domain), assuming


no parasitic capacitance is present.
Parasitic-Sensitive Integrator
C2
T

Ф1 Ф1 Ф2 Ф1 Ф2 Ф1 Ф2
(sample) Vi
Vo
C1
vi(t)
(n-1)

(n)
0 t

(n+1)
Ф2 C2
(update) vo(t) (n+1)
(n)
Vi 0 t
Vo (n-1)
C1

Charge conservation law (ideal):


Total charge on C1 and C2 during Ф1→ Ф2 transition must remain unchanged
– 31 –
Data Converters Switched-Capacitor Circuits
Professor Y. Chiu
EECT 7327
Fall 2014

– 32 –
Biquad filter
• In signal processing, a digital biquad filter is a
second order recursive linear filter, containing
two poles and two zeros. "Biquad" is an abbreviation
of "biquadratic", which refers to the fact that in the Z
domain, its transfer function is the ratio of
two quadratic functions
• The Q of a filter is the "quality" factor, which
basically gives the ratio of energy stored to energy
dissipated at resonance.
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© D. Johns, K. Martin, 1997
University of Toronto
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University of Toronto
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University of Toronto
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