I Am Sharing 'VLSI Lab Part 3 Experiments - PDF (1) ' With You
I Am Sharing 'VLSI Lab Part 3 Experiments - PDF (1) ' With You
I Am Sharing 'VLSI Lab Part 3 Experiments - PDF (1) ' With You
Aim:
To design a CMOS Inverting Amplifier and to analyse the impedance, gain and
bandwidth by performing Schematic simulations.
Software used:
Tanner EDA tools 14.0
Theory:
A CMOS inverter can also be viewed as a high gain amplifier. It consists of one PMOS
device, M1 and one NMOS device M2. Generally the CMOS fabrication process is designed
such that the threshold voltage Vth of the NMOS and PMOS devices are roughly equal i.e.
complementary. The designer of the inverter then adjusts the width to length ratio, W/L, of the
NMOS and PMOS devices such that their respective transconductance is also equal.
Design:
PROCEDURE:
1. Draw the schematic using S-edit with the necessary voltage sources.
29
2. Insert the commands to measure the impedance, AC max gain, gain bandwidth at the
output port. Insert print voltage command to view the transient waveform.
3. Include the tanner tools spice models file.
4. Perform AC Analysis and Transient Analysis.
5. Obtain the transient response from W-edit.
6. Note down the AC analysis report from T-Spice window.
7. Obtain the spice code by clicking ‘Show Netlist’.
Simulation Setup:
Go to setup -> spice simulation.
Choose transient analysis and give the following values:
o Stop time =2000ns
o Maximum Time Step =20ns
o Print Start Time =0ns
Choose ac analysis and give the following values:
o Start Frequency =10
o Stop Frequency=10meg
o No of Frequencies=25
o Sweep Type = dec.
Waveform:
Observation:
Input Impedance: AC Gain: dB
Output Impedance: Bandwidth: Hz
Result:
CMOS Inverting Amplifier was designed and analyses were carried out by performing
Schematic simulations.
30
Ex. No: 11 DESIGN AND SIMULATION OF COMMON SOURCE AMPLIFIER
Date:
Aim:
To design a Common Source Amplifier and to plot the frequency response by performing
Schematic simulations.
Software used:
Tanner EDA tools 14.0
Theory:
In electronics, a common-source amplifier is one of three basic single-stage field-effect
transistor (FET) amplifier topologies, typically used as a voltage or transconductance amplifier.
The easiest way to tell if a FET is common source, common drain, or common gate is to examine
where the signal enters and leaves. The remaining terminal is what is known as "common". In
this example, the signal enters the gate, and exits the drain. The only terminal remaining is the
source. This is a common-source FET circuit. As a transconductance amplifier, the input voltage
is seen as modulating the current going to the load. As a voltage amplifier, input voltage
modulates the current flowing through the FET, changing the voltage across the output resistance
according to Ohm's law.
Design:
31
PROCEDURE:
1. Draw the schematic using S-edit with the necessary voltage sources.
2. Include the tanner tools spice models file.
3. Select AC Analysis.
4. Obtain the spice code by clicking ‘Show Netlist’
5. Insert the spice code – Analysis section to plot the frequency response.
6. Frequency response will appear in W-edit window
Simulation Setup:
Go to setup -> spice simulation.
Choose ac analysis and give the following values:
o Start Frequency =1m
o Stop Frequency=100g
o No of Frequencies=10
o Sweep Type = dec.
********* Simulation Settings - Analysis section *********
.ac dec 10 1m 100g
.print ac (vdb(In)-vdb(Out))
********* ********* ********* ********* *********
Waveform:
Result:
Common Source Amplifier was designed and frequency response was plotted by
performing Schematic Simulations.
32
Ex. No: 12 DESIGN AND SIMULATION OF SIMPLE 5 TRANSISTOR MOS
Date: DIFFERENTIAL AMPLIFIER
Aim:
To calculate the gain, bandwidth and Common Mode Rejection Ratio (CMRR) of a MOS
Differential Amplifier through Schematic simulations.
Software used:
Theory:
out d in in c
V 2
Ac is called the common-mode gain of the amplifier. As differential amplifiers are often used
when it is desired to null out noise or bias-voltages that appear at both inputs, a low common-
mode gain is usually considered good.
The common-mode rejection ratio, usually defined as the ratio between differential-mode
gain and common-mode gain, indicates the ability of the amplifier to accurately cancel voltages
that are common to both inputs. Common-mode rejection ratio (CMRR):
A
CMRR d
Ac
Procedure:
1. Draw the schematic using S-edit with the necessary voltage sources. ( For Differential Mode
change the phase of any one of the input source by 180)
2. Insert the commands to measure the AC max gain, gain bandwidth at the output port.
3. Include the tanner tools spice models file.
4. Perform AC Analysis.
5. Note down the AC analysis report from T-Spice window.
6. Obtain the spice code by clicking ‘Show Netlist’.
33
Schematic of a 5 Transistor MOS Differential amplifier
Simulation Setup:
Go to setup -> spice simulation.
Choose ac analysis and give the following values:
o Start Frequency =10
o Stop Frequency=10meg
o No of Frequencies=25
o Sweep Type = dec.
Calculation:
Ad
CMRR
Ac
Result:
The gain, bandwidth and CMRR of the differential amplifier were obtained using AC
analysis.
34