Lab7 Project

Lab 7 Report
Anuj Yadav
Roll Number: 22B3950
October 19, 2024
Experiment 1
Summer Circuit
Aim of the Experiment

The aim of this experiment is to design and analyze a summing amplifier using the TL071 operational
amplifier, which sums two input signals. The goal is to observe the output signal that results from the
linear superposition of these input signals.
Design
Figure 1: Circuit Diagram
1
InLAB Output Graphs
Observations
• Input 1: 1 V peak-to-peak sine wave at 100 kHz.
• Input 2: DC offset of 1 V.
• The resistor values are configured as Rf = R2 = 1kΩ and R1 = 10kΩ.
The output waveform is observed to be a sine wave with an altered amplitude and offset due to the
summing of the AC and DC components.
Inference
The circuit functions as a summing amplifier, producing an output that is the algebraic sum of the input
AC and DC signals. The output signal is a sine wave shifted by 1 V due to the DC offset, and its
amplitude is scaled based on the resistor network. The behavior matches the theoretical expectations
of an ideal summer circuit.
2
Experiment 2
Amplifier Circuit

To design and analyze an amplifier circuit using the TL071 operational amplifier. The objective is to
study the effect of feedback components (resistor Rf b and capacitors Cf b , Cdut ) on the amplifier’s
frequency response, particularly at higher and lower frequencies.
Design
Figure 2: Circuit Diagram
3
InLAB Output Graphs
Lowering Frequency to 5 kHz: Observations

When the frequency is lowered to around 5 kHz, we expect to observe:
• A more stable amplification, as the impact of capacitive reactance (Cf b and Cdut ) becomes less
significant at lower frequencies.
• The output waveform should be less attenuated compared to the higher frequency input.
4
Conclusion
At higher frequencies, the capacitive components (Cf b and Cdut ) introduce frequency-dependent atten-
uation and phase shifts due to their reactance. Lowering the frequency to 5 kHz results in a more stable
amplification, as the capacitive reactance is less influential. This demonstrates the filtering effect of the
feedback capacitors and confirms that the circuit behaves like a low-pass filter at high frequencies.
5
Experiment 3
Measurement of MOSCAP C-V Characteristics

The objective is to measure the capacitance of the Device Under Test (DUT), which is the MOSCAP
sample, as the DC voltage (VDC ) is varied from 0 to 5V. The DUT refers to the MOSCAP sample
provided, with G representing the gate terminal and S representing the substrate.
Design
InLAB Output Graphs
6
AC Gain of the Circuit
For the given circuit, the AC gain from VDU T to Vout is given by:
Vout p−p CDU T 1

= ·q
VDU T p−p Cf b
1 + (ωRf b Cf b )2
Set VDC = 0V . From the observed value of the AC gain, calculate CDU T . Vary the DC voltage in
steps while tabulating the following:
• VDC
• VDU T p−p
• Vout p−p
• AC Gain
• CDU T
Take readings until the Op-Amp saturates. After completing measurements for positive values of
VDC , change its polarity and take readings for negative values of VDC as well.
Plotting C-V Characteristics and Calculating MOSCAP Parameters

Using the data collected, plot CDU T versus VDC and obtain the following MOSCAP parameters:
• Oxide capacitance (Cox )
7
• Oxide thickness (tox )
• Doping density (NA )
• Flat band voltage (VF B )
• Flat band capacitance (CF B )
• Debye length (LDebye )
• Debye capacitance (CDebye )
Note: When VDC is positive, the negative part of the C-V curve is obtained, and vice versa, due to
the Op-Amp configuration. Therefore, the C-V plot should reflect this accordingly.
Required Data and Equations

There are four different MOSCAPs in each sample, each with different dimensions:
• Circular MOSCAP with 1mm diameter
• Circular MOSCAP with 2mm diameter
• Square MOSCAP with 1mm side length
• Square MOSCAP with 2mm side length
The area (A) of the MOSCAP should be calculated according to its dimensions.
Key Equations
Intrinsic carrier concentration of silicon, ni = 1.5 × 1010 cm−3 .
The thickness of the oxide layer is given by:
Aεox
tox =
Cox
To calculate the doping density:
r
εsi kT NA
tdep =2 ln
qNA q ni
Aεsi
Cs =
tdep
Cox Cs
Cmin =
Cox + Cs
8
Debye Length and Capacitance
Debye capacitance:
Aεsi
CDebye =
LDebye
Debye length: s
εsi kT
LDebye =
qNA q
Flat Band Capacitance and Voltage

Flat band capacitance:
Cox CDebye
CF B =
Cox + CDebye
Flat band voltage: Voltage corresponding to the flat band capacitance in the C-V curve.

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Lab 7 Report

Roll Number: 22B3950

October 19, 2024

Aim of the Experiment

Figure 1: Circuit Diagram

• The resistor values are configured as Rf = R2 = 1kΩ and R1 = 10kΩ.

Aim of the Experiment

Figure 2: Circuit Diagram

Lowering Frequency to 5 kHz: Observations

Aim of the Experiment

InLAB Output Graphs

Vout p−p CDU T 1

Plotting C-V Characteristics and Calculating MOSCAP Parameters

• Oxide capacitance (Cox )

• Doping density (NA )

• Flat band voltage (VF B )

• Flat band capacitance (CF B )

• Debye length (LDebye )

• Debye capacitance (CDebye )

Required Data and Equations

• Circular MOSCAP with 1mm diameter

• Circular MOSCAP with 2mm diameter

• Square MOSCAP with 1mm side length

• Square MOSCAP with 2mm side length

Flat Band Capacitance and Voltage

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