4442 FB
4442 FB
4442 FB
TYPICAL APPLICATION
LTC4442 Driving 3000pF Capacitive Loads
BOOST
BOTTOM
LTC4442 GATE (BG)
VLOGIC TG 5V/DIV
VCC TS
VOUT TOP GATE
(TG-TS)
PWM IN BG
5V/DIV
GND
4442 TA01a
4442 TA01b
10ns/DIV
4442fb
1
LTC4442/LTC4442-1
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION
(Note 1)
Supply Voltage
VCC......................................................... –0.3V to 10V
VLOGIC .................................................... –0.3V to 10V
BOOST – TS ........................................... –0.3V to 10V TOP VIEW
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4442EMS8E#PBF LTC4442EMS8E#TRPBF LTCTJ 8-Lead Plastic MSOP –40°C to 85°C
LTC4442IMS8E#PBF LTC4442IMS8E#TRPBF LTCTJ 8-Lead Plastic MSOP –40°C to 85°C
LTC4442EMS8E-1#PBF LTC4442EMS8E-1#TRPBF LTCXR 8-Lead Plastic MSOP –40°C to 85°C
LTC4442IMS8E-1#PBF LTC4442IMS8E-1#TRPBF LTCXR 8-Lead Plastic MSOP –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 7V, VTS = GND = 0V, VLOGIC = 5V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Logic Supply (VLOGIC)
VLOGIC Operating Range 3 9.5 V
IVLOGIC DC Supply Current IN = Floating 730 850 μA
UVLO Undervoltage Lockout Threshold VLOGIC Rising ● 2.5 2.75 3.0 V
VLOGIC Falling ● 2.4 2.65 2.9 V
Hysteresis 100 mV
Gate Driver Supply (VCC)
VCC Operating Range 6 9.5 V
IVCC DC Supply Current IN = Floating 300 380 μA
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2
LTC4442/LTC4442-1
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 7V, VTS = GND = 0V, VLOGIC = 5V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
UVLO Undervoltage Lockout Threshold VCC Rising (LTC4442) ● 2.75 3.20 3.65 V
VCC Falling (LTC4442) ● 2.60 3.04 3.50 V
Hysteresis (LTC4442) 160 mV
VCC Rising (LTC4442-1) ● 5.6 6.2 6.7 V
VCC Falling (LTC4442-1) ● 4.7 5.3 5.8 V
Hysteresis (LTC4442-1) 850 mV
Bootstrapped Supply (BOOST – TS)
IBOOST DC Supply Current IN = Floating 325 400 μA
Input Signal (IN)
VIH(TG) TG Turn-On Input Threshold VLOGIC ≥ 5V, IN Rising ● 3.0 3.5 4.0 V
VLOGIC = 3.3V, IN Rising ● 1.9 2.2 2.6 V
VIL(TG) TG Turn-Off Input Threshold VLOGIC ≥ 5V, IN Falling 3.25 V
VLOGIC = 3.3V, IN Falling 2.09 V
VIH(BG) BG Turn-On Input Threshold VLOGIC ≥ 5V, IN Falling ● 0.8 1.25 1.6 V
VLOGIC = 3.3V, IN Falling ● 0.8 1.10 1.4 V
VIL(BG) BG Turn-Off Input Threshold VLOGIC ≥ 5V, IN Rising 1.50 V
VLOGIC = 3.3V, IN Rising 1.21 V
IIN(SD) Maximum Current Into or Out of IN in VLOGIC ≥ 5V, IN Floating 200 300 μA
Shutdown Mode VLOGIC = 3.3V, IN Floating 100 150 μA
High Side Gate Driver Output (TG)
VOH(TG) TG High Output Voltage ITG = –10mA, VOH(TG) = VBOOST – VTG 0.7 V
VOL(TG) TG Low Output Voltage ITG = 100mA, VOL(TG) = VTG – VTS 100 mV
IPU(TG) TG Peak Pull-Up Current ● 1.5 2.4 A
IPD(TG) TG Peak Pull-Down Current ● 1.5 2.4 A
Low Side Gate Driver Output (BG)
VOH(BG) BG High Output Voltage IBG = –10mA, VOH(BG) = VCC – VBG 0.7 V
VOL(BG) BG Low Output Voltage IBG = 100mA 100 mV
IPU(BG) BG Peak Pull-Up Current ● 1.4 2.4 A
IPD(BG) BG Peak Pull-Down Current ● 3.5 5.0 A
Switching Time
tPLH(TG) BG Low to TG High Propagation Delay 20 ns
tPHL(TG) IN Low to TG Low Propagation Delay 12 ns
tPLH(BG) TG Low to BG High Propagation Delay 20 ns
tPHL(BG) IN High to BG Low Propagation Delay 12 ns
tr(TG) TG Output Rise Time 10% – 90%, CL = 3nF 12 ns
tf(TG) TG Output Fall Time 10% – 90%, CL = 3nF 8 ns
tr(BG) BG Output Rise Time 10% – 90%, CL = 3nF 12 ns
tr(BG) BG Output Fall Time 10% – 90%, CL = 3nF 5 ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings TJ is calculated from the ambient temperature TA and power dissipation PD
may cause permanent damage to the device. Exposure to any Absolute according to the following formula:
Maximum Rating condition for extended periods may affect device TJ = TA + (PD • θJA°C/W)
reliability and lifetime. Note 3: This IC includes overtemperature protection that is intended
Note 2: The LTC4442I/LTC4442I-1 are guaranteed to meet specifications to protect the device during momentary overload conditions. Junction
from –40°C to 85°C. The LTC4442E/LTC4442E-1 are guaranteed to meet temperature will exceed 125°C when overtemperature protection is active.
specifications from 0°C to 85°C with specifications over the –40°C to Continuous operation above the specified maximum operating junction
85°C operating temperature range assured by design, characterization and temperature may impair device reliability.
correlation with statistical process controls.
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3
LTC4442/LTC4442-1
TYPICAL PERFORMANCE CHARACTERISTICS
Input Thresholds vs Input Thresholds for VLOGIC = 3.3V Input Thresholds for VLOGIC ≥ 5V
VLOGIC Supply Voltage vs Temperature vs Temperature
5 3.0 5
VLOGIC = 3.3V VLOGIC ≥ 5V
2.5 VIH(TG)
4 VIH(TG) 4
VIH(TG)
1.5
VIL(BG)
2 2
VIL(BG) VIL(BG)
1.0
VIH(BG)
1 VIH(BG) 1
0.5 VIH(BG)
0 0 0
3 4 5 6 7 8 9 10 –40 –10 20 50 80 110 –40 –10 20 50 80 110
VLOGIC SUPPLY (V ) TEMPERATURE (°C) TEMPERATURE (°C)
4442 G01 4442 G02 4442 G03
IN FLOATING
0.9
0.35
0.4 0.8 IVLOGIC
0.30
0 0 0
3 4 5 6 7 8 9 10 –40 –10 20 50 80 110 3 4 5 6 7 8 9 10
VLOGIC SUPPLY (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V)
4442 G04 4442 G05 4442 G06
0.7 5.5
RISING THRESHOLD
0.6 2.8 5.0
0.5 4.5
FALLING THRESHOLD
0.4 2.7 4.0
IBOOST
0.3 3.5 LTC4442 RISING THRESHOLD
IVCC
0.2 2.6 3.0
LTC4442 FALLING THRESHOLD
0.1 2.5
0 2.5 2.0
–40 –10 20 50 80 110 –40 –10 20 50 80 110 –40 –10 20 50 80 110
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
4442 G07 4442 G08 4442 G09
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4
LTC4442/LTC4442-1
TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Threshold Switching Supply Current vs Switching Supply Current vs
Hysteresis vs Temperature Input Frequency Load Capacitance
1000 4 100
NO LOAD VLOGIC = 5V
900 LTC4442-1
UVLO THRESHOLD HYSTERESIS (mV)
300 1
LTC4442 1 IVLOGIC ILOGIC
200 VCC UVLO
fIN = 500kHz
100
VLOGIC UVLO
0 0 0
–40 –10 20 50 80 110 0 200k 400k 600k 800k 1M 0.1 0.3 1 3 10 30
TEMPERATURE (°C) FREQUENCY (Hz) LOAD CAPACITANCE (nF)
4442 G10 4442 G11 4442 G12
30 tPLH(TG) 30
25 tPLH(TG)
25 tPLH(TG) 25
20 tPLH(BG) tPLH(BG)
20 tPLH(BG) tPHL(TG) 20
tPHL(TG) 15 tPHL(BG)
15 15
10 tPHL(BG) tPHL(TG)
10 tPHL(BG) 10
5 5 5
0 0 0
3 4 5 6 7 8 9 10 4 5 6 7 8 9 10 –40 –10 20 50 80 110
VLOGIC SUPPLY VOLTAGE (V) VCC SUPPLY VOLTAGE (V) TEMPERATURE (°C)
4442 G13 4442 G14 4442 G15
Output High Voltage vs Rise and Fall Time vs Rise and Fall Time vs
VCC Supply Voltage VCC Supply Voltage Load Capacitance
10 20 100
BOOST-TS = VCC CLOAD = 3.3nF VCC = BOOST-TS = 7V
9 BOOST-TS = VCC
BG OR TG HIGH OUTPUT VOLTAGE (V)
tr(BG)
8 tr(TG)
–10mA 15
RISE/FALL TIME (ns)
RISE/FALL TIME (ns)
7
–1mA –100mA tr(BG)
6 tf(TG)
tr(TG) tf(BG)
5 10 10
4 tf(TG)
3
5
2 tf(BG)
1
0 0 1
4 5 6 7 8 9 10 4 5 6 7 8 9 10 1 3 10 30
VCC SUPPLY VOLTAGE (V) VCC SUPPLY VOLTAGE (V) LOAD CAPACITANCE (nF)
4442 G17 4442 G18
4442 G16
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5
LTC4442/LTC4442-1
PIN FUNCTIONS
TG (Pin 1): High Side Gate Driver Output (Top Gate). This VLOGIC (Pin 6): Logic Supply. This pin powers the input
pin swings between TS and BOOST. buffer and logic. Connect this pin to the power supply
of the controller that is driving IN (Pin 5) to match input
TS (Pin 2): High Side MOSFET Source Connection (Top
thresholds or to VCC (Pin 7) to simplify PCB routing.
Source).
VCC (Pin 7): Output Driver Supply. This pin powers the
BG (Pin 3): Low Side Gate Driver Output (Bottom Gate).
low side gate driver output directly and the high side
This pin swings between VCC and GND.
gate driver output through an external diode connected
GND (Pin 4, Exposed Pad Pin 9): Chip Ground. The exposed between this pin and BOOST (Pin 8). A low ESR ceramic
pad must be soldered to the PCB ground for electrical bypass capacitor should be tied between this pin and
contact and for rated thermal performance. GND (Pin 4).
IN (Pin 5): Input Signal. Input referenced to an internal BOOST (Pin 8): High Side Bootstrapped Supply. An ex-
supply powered by VLOGIC (Pin 6) and referenced to GND ternal capacitor should be tied between this pin and TS
(Pin 4). If this pin is floating, an internal resistive divider (Pin 2). Normally, a bootstrap diode is connected between
triggers a shutdown mode in which both BG (Pin 3) and VCC (Pin 7) and this pin. Voltage swing at this pin is from
TG (Pin 1) are pulled low. Trace capacitance on this pin VCC – VD to VIN + VCC – VD, where VD is the forward volt-
should be minimized to keep the shutdown time low. age drop of the bootstrap diode.
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6
LTC4442/LTC4442-1
BLOCK DIAGRAM
VCC UNDERVOLTAGE
7
LOCKOUT
BOOST
8
VLOGIC LEVEL TG
UNDERVOLTAGE 1
6 SHIFTER
LOCKOUT
TS
2
INTERNAL
SHOOT-
SUPPLY
THROUGH
PROTECTION
7k VCC
THREE-STATE
INPUT BG
IN 3
5 BUFFER
7k
GND
4
9 GND
4442 BD
TIMING DIAGRAM
VIL(TG)
IN
VIL(BG)
90%
TG
10%
90% 4442 TD
BG
10%
tr(TG) tr(BG)
tpLH(TG) tpLH(BG)
tf(BG) tf(TG)
tpHL(BG) tpHL(TG)
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7
LTC4442/LTC4442-1
OPERATION
Overview The thresholds are positioned to allow for a region in which
The LTC4442 receives a ground-referenced, low voltage both BG and TG are low. An internal resistive divider will
digital input signal to drive two N-channel power MOSFETs pull IN into this region if the signal driving the IN pin goes
in a synchronous buck power supply configuration. The into a high impedance state.
gate of the low side MOSFET is driven either to VCC or GND, One application of this three-state input is to keep both of
depending on the state of the input. Similarly, the gate of the power MOSFETs off while an undervoltage condition
the high side MOSFET is driven to either BOOST or TS by exists on the controller IC power supply. This can be ac-
a supply bootstrapped off of the switch node (TS). complished by driving the IN pin with a logic buffer that
has an enable pin. With the enable pin of the buffer tied
Input Stage to the power good pin of the controller IC, the logic buf-
The LTC4442 employs a unique three-state input stage with fer output will remain in a high impedance state until the
transition thresholds that are proportional to the VLOGIC controller confirms that its supply is not in an undervoltage
supply. The VLOGIC supply can be tied to the controller state. The three-state input of the LTC4442 will therefore
IC’s power supply so that the input thresholds will match pull IN into the region where TG and BG are low until the
those of the controller’s output signal. Alternatively, VLOGIC controller has enough voltage to operate predictably.
can be tied to VCC to simplify routing. An internal voltage The hysteresis between the corresponding VIH and VIL
regulator in the LTC4442 limits the input threshold values voltage levels eliminates false triggering due to noise
for VLOGIC supply voltages greater than 5V. during switch transitions; however, care should be taken
The relationship between the transition thresholds and the to keep noise from coupling into the IN pin, particularly
three input states of the LTC4442 is illustrated in Figure 1. in high frequency, high voltage applications.
When the voltage on IN is greater than the threshold VIH(TG),
TG is pulled up to BOOST, turning the high side MOSFET Undervoltage Lockout
on. This MOSFET will stay on until IN falls below VIL(TG). The LTC4442 contains undervoltage lockout detectors that
Similarly, when IN is less than VIH(BG), BG is pulled up monitor both the VCC and VLOGIC supplies. When VCC falls
to VCC, turning the low side (synchronous) MOSFET on. below 3.04V or VLOGIC falls below 2.65V, the output pins
BG will stay high until IN increases above the threshold BG and TG are pulled to GND and TS, respectively. This
VIL(BG). turns off both of the external MOSFETs. When VCC and
VLOGIC have adequate supply voltage for the LTC4442 to
operate reliably, normal operation will resume.
TG HIGH
VIH(TG)
TG LOW TG HIGH
TG LOW
VIL(TG) Adaptive Shoot-Through Protection
IN Internal adaptive shoot-through protection circuitry
monitors the voltages on the external MOSFETs to ensure
VIL(BG)
BG LOW that they do not conduct simultaneously. The LTC4442
BG HIGH BG LOW
VIH(BG) does not allow the bottom MOSFET to turn on until the
BG HIGH
gate-source voltage on the top MOSFET is sufficiently
4442 F01
low, and vice-versa. This feature improves efficiency by
Figure 1. Three-State Input Operation
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8
LTC4442/LTC4442-1
OPERATION
eliminating cross-conduction current from flowing from Rise/Fall Time
the VIN supply through the MOSFETs to ground during a Since the power MOSFET generally accounts for the major-
switch transition. ity of power loss in a converter, it is important to quickly
turn it on and off, thereby minimizing the transition time
Output Stage
and power loss. The LTC4442’s peak pull-up current of
A simplified version of the LTC4442’s output stage is 2.4A for both BG and TG (Q1 and Q2) produces a rapid
shown in Figure 2. The pull-up device on both the BG and turn-on transition for the MOSFETs. This high current is
TG outputs is an NPN bipolar junction transistor (Q1 and capable of driving a 3nF load with a 12ns rise time.
Q2). The BG and TG outputs are pulled up to within an
It is also important to turn the power MOSFETs off quickly
NPN VBE (~0.7V) of their positive rails (VCC and BOOST,
respectively). Both BG and TG have N-channel MOSFET pull- to minimize power loss due to transition time; however,
down devices (N1 and N2) which pull BG and TG down to an additional benefit of a strong pull-down on the driver
their negative rails, GND and TS. An additional NPN bipolar outputs is the prevention of cross-conduction current. For
junction transistor (Q3) is present on BG to increase its example, when BG turns the low-side power MOSFET off
pull-down drive current capacity. The large voltage swing of and TG turns the high-side power MOSFET on, the volt-
the BG and TG output pins is important in driving external age on the TS pin will rise to VIN very rapidly. This high
frequency positive voltage transient will couple through
power MOSFETs, whose RDS(ON) is inversely proportional
to its gate overdrive voltage (VGS – VTH). the CGD capacitance of the low side power MOSFET to
the BG pin. If the BG pin is not held down sufficiently, the
voltage on the BG pin will rise above the threshold volt-
VIN
8 UP TO 38V age of the low side power MOSFET, momentarily turning
LTC4442
BOOST it back on. As a result, both the high side and low side
Q1 CGD MOSFETs will be conducting, which will cause significant
TG
1
HIGH SIDE
POWER
cross-conduction current to flow through the MOSFETs
N1 CGS
MOSFET from VIN to ground, thereby introducing substantial power
TS
2
loss. A similar effect occurs on TG due to the CGS and CGD
LOAD
INDUCTOR capacitances of the high side MOSFET.
VCC
7 The LTC4442’s powerful parallel combination of the
Q2 CGD N-channel MOSFET (N2) and NPN (Q3) on the BG pull-down
BG LOW SIDE generates a phenomenal 5ns fall time on BG while driving
3 POWER
Q3
MOSFET a 3nF load. Similarly, the 1Ω pull-down MOSFET (N1) on
N2 CGS
GND TG results in a rapid 8ns fall time with a 3nF load. These
4 4442 F02
powerful pull-down devices minimize the power loss as-
sociated with MOSFET turn-off time and cross-conduction
Figure 2. Capacitance Seen by BG and TG During Switching current.
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9
LTC4442/LTC4442-1
APPLICATIONS INFORMATION
Power Dissipation The gate charge losses are primarily due to the large AC
currents required to charge and discharge the capacitance
To ensure proper operation and long-term reliability, the
of the external MOSFETs during switching. For identical
LTC4442 must not operate beyond its maximum tem-
pure capacitive loads CLOAD on TG and BG at switching
perature rating. Package junction temperature can be
frequency fin, the load losses would be:
calculated by:
PCLOAD = (CLOAD)(fIN)[(VBOOST – TS)2 + (VCC)2]
TJ = TA + (PD)(θJA)
In a typical synchronous buck configuration, VBOOST – TS
where:
is equal to VCC – VD, where VD is the forward voltage
TJ = Junction temperature drop across the diode between VCC and BOOST. If this
TA = Ambient temperature drop is small relative to VCC, the load losses can be
PD = Power dissipation approximated as:
θJA = Junction-to-ambient thermal resistance
PCLOAD ≈ 2(CLOAD)(fIN)(VCC)2
Power dissipation consists of standby, switching and
Unlike a pure capacitive load, a power MOSFET’s gate
capacitive load power losses:
capacitance seen by the driver output varies with its VGS
PD = PDC + PAC + PQG voltage level during switching. A MOSFET’s capacitive load
where: power dissipation can be calculated using its gate charge,
QG. The QG value corresponding to the MOSFET’s VGS
PDC = Quiescent power loss value (VCC in this case) can be readily obtained from the
PAC = Internal switching loss at input frequency fIN manufacturer’s QG vs VGS curves. For identical MOSFETs
PQG = Loss due turning on and off the external MOSFET on TG and BG:
with gate charge QG at frequency fIN
PQG ≈ 2(VCC)(QG)(fIN)
The LTC4442 consumes very little quiescent current. The
DC power loss at VLOGIC = 5V and VCC = VBOOST − TS = To avoid damaging junction temperatures due to power
7V is only (730μA)(5V) + (625μA)(7V) = 8mW. dissipation, the LTC4442 includes a temperature monitor
that will pull BG and TG low if the junction temperature
At a particular switching frequency, the internal power loss exceeds 160°C. Normal operation will resume when the
increases due to both AC currents required to charge and junction temperature cools to less than 135°C.
discharge internal nodal capacitances and cross-conduc-
tion currents in the internal logic gates. The sum of the Bypassing and Grounding
quiescent current and internal switching current with no
The LTC4442 requires proper bypassing on the VLOGIC, VCC
load are shown in the Typical Performance Characteristics
and VBOOST – TS supplies due to its high speed switching
plot of Switching Supply Current vs Input Frequency.
(nanoseconds) and large AC currents (Amperes). Careless
component placement and PCB trace routing may cause
excessive ringing and undershoot/overshoot.
4442fb
10
LTC4442/LTC4442-1
APPLICATIONS INFORMATION
To obtain the optimum performance from the LTC4442: C. Plan the power/ground routing carefully. Know where
A. Mount the bypass capacitors as close as possible the large load switching current is coming from and
between the VLOGIC and GND pins, the VCC and GND going to. Maintain separate ground return paths for
pins, and the BOOST and TS pins. The leads should the input pin and the output power stage.
be shortened as much as possible to reduce lead D. Keep the copper traces between the driver output pins
inductance. and the load short and wide.
B. Use a low inductance, low impedance ground plane E. Be sure to solder the Exposed Pad on the back side of
to reduce any ground drop and stray capacitance. the LTC4442 packages to the board. Correctly soldered
Remember that the LTC4442 switches greater than to a 2500mm2 double-sided 1oz copper board, the
5A peak currents and any significant ground drop will LTC4442 has a thermal resistance of approximately
degrade signal integrity. 40°C/W. Failure to make good thermal contact between
the exposed back side and the copper board will result
in thermal resistances far greater.
4442fb
11
LTC4442/LTC4442-1
PACKAGE DESCRIPTION
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev E)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
1 (.081 p .004) 0.29
1.83 p 0.102 REF
2.794 p 0.102 0.889 p 0.127 (.072 p .004)
(.110 p .004) (.035 p .005)
0.05 REF
5.23 DETAIL “B”
(.206) 2.083 p 0.102 3.20 – 3.45 CORNER TAIL IS PART OF
MIN (.082 p .004) (.126 – .136) DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
8
NO MEASUREMENT PURPOSE
3.00 p 0.102
0.42 p 0.038 0.65 (.118 p .004) 0.52
(.0165 p .0015) (.0256) (NOTE 3) 8 7 6 5 (.0205)
TYP BSC REF
RECOMMENDED SOLDER PAD LAYOUT
3.00 p 0.102
4.90 p 0.152
DETAIL “A” (.118 p .004)
0.254 (.193 p .006)
(NOTE 4)
(.010)
0o – 6o TYP
GAUGE PLANE
1 2 3 4
0.53 p 0.152
(.021 p .006) 1.10 0.86
(.043) (.034)
DETAIL “A” MAX REF
0.18
(.007)
SEATING
PLANE 0.22 – 0.38 0.1016 p 0.0508
(.009 – .015) (.004 p .002)
0.65
TYP MSOP (MS8E) 0908 REV E
(.0256)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
4442fb
12
LTC4442/LTC4442-1
REVISION HISTORY (Revision history begins at Rev B)
4442fb
13
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC4442/LTC4442-1
TYPICAL APPLICATION
LTC7510/LTC4442-1 12V to 1.5V/30A Digital Step-Down DC/DC Converter with PMBus Serial Interface
7V VDRIVE
12V
5V
R1
D2 C5
SDATA V12SEN CMDSH3 0.22μF
PMBus VCC
SCLK
INTERFACE
SMB_AL_N VD33
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