FDMC 7692 S
FDMC 7692 S
FDMC 7692 S
September 2010
FDMC7692S
N-Channel Power Trench® SyncFETTM
30 V, 12.5 A, 9.3 m:
Features General Description
Max rDS(on) = 9.3 m: at VGS = 10 V, ID = 12.5 A This FDMC7692S is produced using Fairchild Semiconductor’s
advanced Power Trench® process that has been especially
Max rDS(on) = 13.6 m: at VGS = 4.5 V, ID = 10.4 A tailored to minimize the on-state resistance. This device is well
High performance technology for extremely low rDS(on) suited for Power Management and load switching applications
common in Notebook Computers and Portable Battery packs.
Termination is Lead-free and RoHS Compliant
Applications
DC - DC Buck Converters
Notebook DC - DC application
Top Bottom
Pin 1 D 5 4 G
G
S
S D 6 3 S
S
D 7 2 S
D
D
D D 8 1 S
D
MLP 3.3x3.3
Thermal Characteristics
RTJC Thermal Resistance, Junction to Case 4.7 °C/W
RTJA Thermal Resistance, Junction to Ambient (Note 1a) 53 °C/W
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V 30 V
'BVDSS Breakdown Voltage Temperature
ID = 10 mA, referenced to 25 °C 16 mV/°C
'TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 500 PA
IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V 100 nA
On Characteristics (Note 2)
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 1 mA 1.2 2.0 3.0 V
'VGS(th) Gate to Source Threshold Voltage
ID = 10 mA, referenced to 25 °C -5 mV/°C
'TJ Temperature Coefficient
VGS = 10 V, ID = 12.5 A 7.8 9.3
VGS = 4.5 V, ID = 10.4 A 10.8 13.6
rDS(on) Static Drain to Source On Resistance m:
VGS = 10 V, ID = 12.5 A
9.6 13.0
TJ = 125 °C
gFS Forward Transconductance VDS = 5 V, ID = 12.5 A 62 S
Dynamic Characteristics
Ciss Input Capacitance 1040 1385 pF
VDS = 15 V, VGS = 0 V,
Coss Output Capacitance 445 590 pF
f = 1 MHz
Crss Reverse Transfer Capacitance 40 60 pF
Rg Gate Resistance 1.1 2.9 :
Switching Characteristics
td(on) Turn-On Delay Time 9 17 ns
tr Rise Time VDD = 15 V, ID = 12.5 A, 3 10 ns
td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 : 19 34 ns
tf Fall Time 3 10 ns
Qg Total Gate Charge VGS = 0 V to 10 V 16 23 nC
Qg Total Gate Charge VGS = 0 V to 4.5 V VDD = 15 V 8 10 nC
Qgs Gate to Source Gate Charge ID = 12.5 A 4 nC
Qgd Gate to Drain “Miller” Charge 2 nC
2. Pulse Test: Pulse Width < 300 Ps, Duty cycle < 2.0%.
3. EAS of 21 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 12.0 A, VDD = 27 V, VGS = 10 V. 100% test at L = 3 mH, IAS = 3.2 A .
45 3.5
VGS = 3.5 V
VGS = 4.5 V 2.5
NORMALIZED
27
VGS = 4 V VGS = 4 V
2.0
18 VGS = 4.5 V
VGS = 3.5 V 1.5
VGS = 6 V
9
PULSE DURATION = 80 Ps
1.0
VGS = 10 V
DUTY CYCLE = 0.5% MAX
0 0.5
0 0.2 0.4 0.6 0.8 1.0 0 9 18 27 36 45
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
1.6 40
DRAIN TO SOURCE ON-RESISTANCE
1.2
20
1.0
TJ = 125 oC
10
0.8
TJ = 25 oC
0.6 0
-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)
45 100
PULSE DURATION = 80 Ps VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VDS = 5 V
TJ = 125 oC
27 1
TJ = 125 oC
TJ = 25 oC
18 0.1
TJ = 25 oC
TJ = -55 oC
9 0.01
TJ = -55 oC
0 0.001
1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
10 3000
VGS, GATE TO SOURCE VOLTAGE (V)
IDSS = 12.5 A
VDD = 10 V
8 1000
Ciss
CAPACITANCE (pF)
VDD = 15 V
6 Coss
VDD = 20 V
4 100
2 Crss
f = 1 MHz
VGS = 0 V
0 10
0 3 6 9 12 15 18 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
20 100
IAS, AVALANCHE CURRENT (A)
1ms
TJ = 100 oC
1 THIS AREA IS 10 ms
LIMITED BY rDS(on) 100 ms
SINGLE PULSE 1s
TJ = 125 oC 0.1 TJ = MAX RATED
RTJA = 125 C/Wo 10 s
o DC
TA = 25 C
1 0.01
0.001 0.01 0.1 1 10 50 0.01 0.1 1 10 100
tAV, TIME IN AVALANCHE (ms) VDS, DRAIN to SOURCE VOLTAGE (V)
1000
SINGLE PULSE
VGS = 10V o
P(PK), PEAK TRANSIENT POWER (W)
10
1
0.5
-4 -3 -2 -1 0 1
10 10 10 10 10 10 100 1000
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
NORMALIZED THERMAL
0.2
0.1
IMPEDANCE, ZTJA
0.1
0.05
0.02 PDM
0.01
0.01
t1
SINGLE PULSE t2
o
1E-3 RTJA = 125 C/W NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZTJA x RTJA + TA
1E-4
-4 -3 -2 -1 0 1
10 10 10 10 10 10 100 1000
t, RECTANGULAR PULSE DURATION (sec)
Fairchild’s SyncFET process embeds a Schottky diode in parallel Schottky barrier diodes exhibit significant leakage at high tem-
with PowerTrench MOSFET. This diode exhibits similar perature and high reverse voltage. This will increase the power
characteristics to a discrete external Schottky diode in parallel in the device.
with a MOSFET. Figure 13 shows the reverses recovery
characteristic of the FDMC7692S.
15 10
4
10
2 TJ = 100 oC
5
1
10
0
10
0 TJ = 25 oC
-5 -1
10
0 50 100 150 200 250 0 5 10 15 20 25 30
TIME (ns) VDS, REVERSE VOLTAGE (V)
Figure 13. SyncFET body diode reverse Figure 14. SyncFET body diode reverses
recovery characteristic leakage versus drain-source voltage
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