4C09N NTMFS4C09N

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NTMFS4C09N

Power MOSFET
30 V, 52 A, Single N−Channel, SO−8 FL
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
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OM
Optimized Gate Charge to Minimize Switching Losses
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant V(BR)DSS RDS(ON) MAX ID MAX
5.8 mW @ 10 V
Applications 30 V 52 A
• CPU Power Delivery 8.5 mW @ 4.5 V

.C
• DC−DC Converters
D (5−8)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 30 V
Gate−to−Source Voltage
Continuous Drain
Current RqJA
(Note 1)
Power Dissipation
RqJA (Note 1)
TA = 25°C
TA = 80°C
TA = 25°C
VGS
ID

PD
IC
±20
16.4
12.3
2.51
V
A

W
G (4)

S (1,2,3)
N−CHANNEL MOSFET
T-
Continuous Drain TA = 25°C ID 25.3 A MARKING
Current RqJA ≤ 10 s DIAGRAMS
(Note 1) TA = 80°C 19.0 D
Power Dissipation TA = 25°C PD 6.0 W S D
SO−8 FLAT LEAD
RqJA ≤ 10 s (Note 1) Steady S 4C09N
CASE 488AA
Continuous Drain State TA = 25°C ID 9.0 A S AYWZZ
STYLE 1
SE

Current RqJA G D
TA = 80°C 6.8 1
(Note 2) D
Power Dissipation TA = 25°C PD 0.76 W
RqJA (Note 2) 1
DFN5 5x6
(SO−8 FLAT LEAD) 4C09N
Continuous Drain TC = 25°C ID 52 A
Current RqJC CASE 506CX AAYWZZ
(Note 1) TC =80°C 39
IP

Power Dissipation TC = 25°C PD 25.5 W


RqJC (Note 1) A = Assembly Location
Y = Year
Pulsed Drain TA = 25°C, tp = 10 ms IDM 146 A W = Work Week
Current
ZZ = Lot Traceabililty
Current Limited by Package TA = 25°C IDmax 80 A
CH

Operating Junction and Storage TJ, −55 to °C


Temperature TSTG +150 ORDERING INFORMATION
Source Current (Body Diode) IS 23 A Device Package Shipping†
Drain to Source dV/dt dV/dt 7.0 V/ns NTMFS4C09NT1G SO−8 FL 1500 /
Single Pulse Drain−to−Source Avalanche EAS 42 mJ (Pb−Free) Tape & Reel
Energy (TJ = 25°C, VGS = 10 V, IL = 29 Apk,
L = 0.1 mH, RGS = 25 W) (Note 3) NTMFS4C09NT3G SO−8 FL 5000 /
(Pb−Free) Tape & Reel
Lead Temperature for Soldering Purposes TL 260 °C
(1/8″ from case for 10 s)
NTMFS4C09NT1G−001 SO−8 FL 1500 /
Stresses exceeding those listed in the Maximum Ratings table may damage the (Pb−Free) Tape & Reel
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected. †For information on tape and reel specifications,
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. including part orientation and tape sizes, please
2. Surface−mounted on FR4 board using the minimum recommended pad size. refer to our Tape and Reel Packaging Specifications
3. Parts are 100% tested at TJ = 25°C, VGS = 10 V, IL = 20 Apk, EAS = 20 mJ. Brochure, BRD8011/D.

© Semiconductor Components Industries, LLC, 2014 1 Publication Order Number:


September, 2014 − Rev. 3 NTMFS4C09N/D
NTMFS4C09N

THERMAL RESISTANCE MAXIMUM RATINGS


Parameter Symbol Value Unit
Junction−to−Case (Drain) RqJC 4.9
Junction−to−Ambient – Steady State (Note 4) RqJA 49.8
°C/W
Junction−to−Ambient – Steady State (Note 5) RqJA 164.6
Junction−to−Ambient – (t ≤ 10 s) (Note 4) RqJA 21.0
4. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
5. Surface−mounted on FR4 board using the minimum recommended pad size.

OM
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 V

.C
Drain−to−Source Breakdown Voltage V(BR)DSSt VGS = 0 V, ID(aval) = 8.4 A, 34
V
(transient) Tcase = 25°C, ttransient = 100 ns

Drain−to−Source Breakdown Voltage V(BR)DSS/ 14.4


mV/°C
Temperature Coefficient TJ
Zero Gate Voltage Drain Current IDSS VGS = 0 V, TJ = 25°C 1.0
VDS = 24 V mA

Gate−to−Source Leakage Current


ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
IGSS

VGS(TH)
VGS(TH)/TJ
IC TJ = 125°C
VDS = 0 V, VGS = ±20 V

VGS = VDS, ID = 250 mA 1.3


4.8
10
±100

2.1
nA

V
mV/°C
T-
Drain−to−Source On Resistance RDS(on) VGS = 10 V ID = 30 A 4.6 5.8
mW
VGS = 4.5 V ID = 18 A 6.8 8.5
Forward Transconductance gFS VDS = 1.5 V, ID = 15 A 50 S
Gate Resistance RG TA = 25°C 0.3 1.0 2.0 W
SE

CHARGES AND CAPACITANCES


Input Capacitance CISS 1252
Output Capacitance COSS VGS = 0 V, f = 1 MHz, VDS = 15 V 610 pF
Reverse Transfer Capacitance CRSS 126
IP

Capacitance Ratio CRSS/CISS VGS = 0 V, VDS = 15 V, f = 1 MHz 0.101


Total Gate Charge QG(TOT) 10.9
Threshold Gate Charge QG(TH) 1.9
nC
Gate−to−Source Charge QGS VGS = 4.5 V, VDS = 15 V; ID = 30 A 3.4
CH

Gate−to−Drain Charge QGD 5.4


Gate Plateau Voltage VGP 3.1 V
Total Gate Charge QG(TOT) VGS = 10 V, VDS = 15 V; ID = 30 A 22.2 nC
SWITCHING CHARACTERISTICS (Note 7)
Turn−On Delay Time td(ON) 10
Rise Time tr VGS = 4.5 V, VDS = 15 V, 32
ns
Turn−Off Delay Time td(OFF) ID = 15 A, RG = 3.0 W 16
Fall Time tf 6.0
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.

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NTMFS4C09N

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)


Parameter Symbol Test Condition Min Typ Max Unit
SWITCHING CHARACTERISTICS (Note 7)
Turn−On Delay Time td(ON) 7.0
Rise Time tr VGS = 10 V, VDS = 15 V, 28
ns
Turn−Off Delay Time td(OFF) ID = 15 A, RG = 3.0 W 20
Fall Time tf 4.0
DRAIN−SOURCE DIODE CHARACTERISTICS

OM
Forward Diode Voltage VSD VGS = 0 V, TJ = 25°C 0.79 1.1
V
IS = 10 A TJ = 125°C 0.65
Reverse Recovery Time tRR 31
Charge Time ta VGS = 0 V, dIS/dt = 100 A/ms, 15 ns
IS = 30 A

.C
Discharge Time tb 16
Reverse Recovery Charge QRR 15 nC
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.

IC
T-
SE
IP
CH

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NTMFS4C09N

TYPICAL CHARACTERISTICS

100 100
4.5 V to 10 V 4.0 V
90 TJ = 25°C 90 VDS = 5 V
3.8 V
80 80
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)


70 3.6 V 70
60 60
3.4 V
50 50
40 3.2 V 40

OM
30 30
3.0 V
20 20 TJ = 125°C
2.8 V
10 VGS = 2.6 V 10 TJ = 25°C TJ = −55°C
0 0
0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

.C
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)


0.026 0.009
0.024
0.022
0.020
0.018
0.016
0.014
ID = 30 A
IC 0.008

0.007

0.006
TJ = 25°C

VGS = 4.5 V
T-
0.012
0.010 0.005
VGS = 10 V
0.008
0.006 0.004
0.004
SE

0.002 0.003
3 4 5 6 7 8 9 10 10 20 30 40 50 60 70
VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
IP

1.7 1600
VGS = 0 V
RDS(on), NORMALIZED DRAIN−TO−

1.6 VGS = 10 V 1400 TJ = 25°C


Ciss
SOURCE RESISTANCE (W)

1.5 ID = 30 A
C, CAPACITANCE (pF)

1200
1.4
CH

1000
1.3 Coss
1.2 800
1.1 600
1.0
400
0.9
Crss
200
0.8
0.7 0
−50 −25 0 25 50 75 100 125 150 0 5 10 15 20 25 30
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with Figure 6. Capacitance Variation
Temperature

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NTMFS4C09N

TYPICAL CHARACTERISTICS

10 1000
VGS, GATE−TO−SOURCE VOLTAGE (V)

QT VGS = 10 V
VDD = 15 V
8 ID = 15 A
td(off)
100 tf

t, TIME (ns)
6 tr

QGS QGD
4

OM
VGS = 10 V 10 td(on)
VDD = 15 V
2
ID = 30 A
TJ = 25°C
0 1
0 2 4 6 8 10 12 14 16 18 20 22 24 1 10 100

.C
QG, TOTAL GATE CHARGE (nC) RG, GATE RESISTANCE (W)
Figure 7. Gate−to−Source and Figure 8. Resistive Switching Time Variation
Drain−to−Source Voltage vs. Total Charge vs. Gate Resistance

20 1000
18 VGS = 0 V

IC 0 V < VGS < 10 V


IS, SOURCE CURRENT (A)

16 100
ID, DRAIN CURRENT (A)

10 ms
14
TJ = 125°C TJ = 25°C 100 ms
12 10
10 1 ms
T-
10 ms
8 1
6
4 0.1 RDS(on) Limit
dc
Thermal Limit
2 Package Limit
SE

0 0.01
0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.01 0.1 1 10 100
VSD, SOURCE−TO−DRAIN VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 9. Diode Forward Voltage vs. Current Figure 10. Maximum Rated Forward Biased
Safe Operating Area
IP

20 80
SOURCE AVALANCHE ENERGY (mJ)
EAS, SINGLE PULSE DRAIN−TO−

18 ID = 20 A 70
16
60
14
CH

12 50
GFS (S)

10 40
8 30
6
20
4
2 10
0 0
25 50 75 100 125 150 0 5 10 15 20 25 30 35 40 45 50
TJ, STARTING JUNCTION TEMPERATURE (°C) ID (A)
Figure 11. Maximum Avalanche Energy vs. Figure 12. GFS vs. ID
Starting Junction Temperature

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5
NTMFS4C09N

TYPICAL CHARACTERISTICS

100

ID, DRAIN CURRENT (A)


10

OM
1
1.E−08 1.E−07 1.E−06 1.E−05 1.E−04 1.E−03

.C
PULSE WIDTH (sec)
Figure 13. Avalanche Characteristics

100

10
Duty Cycle = 0.5
0.2
0.1
0.05
IC
R(t) (°C/W)

0.02
1
0.01
T-
0.1

Single Pulse
0.01
SE

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000


PULSE TIME (sec)
Figure 14. Thermal Response
IP
CH

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NTMFS4C09N

PACKAGE DIMENSIONS

DFN5 5x6, 1.27P


(SO−8FL)
CASE 488AA
ISSUE L
2X NOTES:
1. DIMENSIONING AND TOLERANCING PER
0.20 C ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
D A 3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
2 B BURRS.
2X

OM
D1 MILLIMETERS
0.20 C DIM MIN NOM MAX
A 0.90 1.00 1.10
A1 0.00 −−− 0.05
4X b 0.33 0.41 0.51
E1 q c 0.23 0.28 0.33
E D 5.00 5.15 5.30
2 D1 4.70 4.90 5.10
c D2 3.80 4.00 4.20

.C
A1 E 6.00 6.15 6.30
E1 5.70 5.90 6.10
1 2 3 4 E2 3.45 3.65 3.85
e 1.27 BSC
TOP VIEW G 0.51 0.61 0.71
3X C K 1.20 1.35 1.50
SEATING L 0.51 0.61 0.71
e L1 0.125 REF
0.10 C PLANE
M 3.00 3.40 3.80

0.10 C

8X b
SIDE VIEW
A

DETAIL A
IC DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.495
2X
RECOMMENDED
q

SOLDERING FOOTPRINT*

2X
4.560
0_ −−− 12 _
T-
0.10 C A B 1.530
0.05 c L e/2
1 4

K 3.200
4.530
SE

E2
PIN 5 M 1.330
(EXPOSED PAD) L1 2X
0.905
1

G D2 0.965
4X
BOTTOM VIEW 1.000 1.270
IP

4X 0.750 PITCH
DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering


details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
CH

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7
NTMFS4C09N

PACKAGE DIMENSIONS

DFN5 5x6, 1.27P


(SO−8FL)
CASE 506CX
ISSUE O
2X
0.15 C NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
D A 2. CONTROLLING DIMENSION: MILLIMETER.

OM
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
3 FLASH PROTRUSIONS OR GATE BURRS.
B 2X
D1 MILLIMETERS
0.30 C DIM MIN MAX
A 0.90 1.00

ÉÉÉ
b 0.30 0.50
c 0.11 0.22
E1 D 5.30 BSC

ÉÉÉ
D1 4.80 5.20
PIN 1 E

.C
3 D2 4.05 4.45

ÉÉÉ
IDENTIFIER
E 6.00 BSC
E1 4.80 5.20
E2 3.30 3.70
e 1.27 BSC
G 0.70 0.90
TOP VIEW K 0.90 1.30
L 0.50 0.70
A
0.10 C

0.05 C

SIDE VIEW
c
C SEATING
PLANE
IC SOLDERING FOOTPRINT*

0.43

2.10
2X
5.46
T-
8X b
e/2 0.10 C A B 4.74
e 0.05 C 2X
6.59
1 0.79
4 K

4X L
SE

4X 1 4X
E2 1.15 0.75
4X G 1.27
PITCH
*For additional information on our Pb−Free strategy and soldering
D2 details, please download the ON Semiconductor Soldering and
BOTTOM VIEW Mounting Techniques Reference Manual, SOLDERRM/D.
IP
CH

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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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