Phase Locked Loop

Phase Locked Loop
❖ A PLL is an electronic circuit with a voltage – driven oscillator which is

constantly adjusted in order to match the phase of the frequency of an
input signal.
❖ PLL is used for frequency control.

❖ It is a feed back circuit that is designed in order to allow a circuit board to
synchronize the phase of its on board clock with an external timing signal.
❖ Phase lock loop circuits work by comparing the phase of an external

signal to the phase of a clock signal that is produced by a voltage
controlled oscillator.
❖ The circuit adjusts the phase of the oscillator’s clock signal in order for it
to match the phase of the reference signal.
Phase Locked Loop
An electronic circuit that compares an input frequency and phase to a reference

signal and generates a voltage proportional to the difference between input and
reference.
Components
▪ Phase Detector/Comparator
▪ A low pass filter
▪ Error Amplifier
▪ Voltage Controlled Oscillator
PLL is a closed loop device that produces an output signal based on the difference
between the input signal and the VCO's free running frequency
Phase locked loop is found in many items of radio frequency
equipment including radio receivers, test equipment and other items
of radio frequency electronics.
PLLApplications
▪ Frequency Modulation (FM) stereo decoders, FM Demodulation

networks for FM operation
▪ Frequency synthesis that provides multiple of a reference signal

frequency.
▪ Used in motor speed controls, tracking filters.
▪ Used in frequency shift keying (FSK) decodes for demodulation

carrier frequencies.
Error
Block Diagram amplifier
VCO
• An oscillator in which frequency of oscillations can be controlled by an
externally applied voltage (control voltage)
• The frequency is determined by an external timing capacitor or timing
resistor.
Phase Detector
• Acts as a comparator and compares frequency & phase of incoming
signal (vs , fs ) to that of VCO o/p (v0 , f0 )
• If the two signals differ in phase and/or frequency, an error voltage ve is
generated.
Low Pass Filter & ErrorAmplifier

• High frequency component is removed using a low pass filter and the
difference frequency component is amplified using error amplifier
• This is then applied as control voltage to VCO
Phase Detector
Takes input voltages and produces a DC voltage output

proportional to the phase difference.
Two types of phase detectors
▪ Analog Phase Detector

▪ Digital Phase Detector
(i)Using XOR
(ii)Using RS Flip Flop
Digital Phase Detector using XOR
• It uses CMOS type 4070 quad 2 input XOR gate
• Mainly used when both input signals are square waves
• Output of the XOR gate is high only when one of its input signals (𝑓𝑠 , 𝑓0)
is high.
Let 𝑓𝑠 is lead 𝑓0 by 𝜙 degrees
DC o/p voltage of the comparator will be a function

of the phase difference between its two inputs.
The variation of DC o/p voltage with phase difference ϕ is seen. i.e
Maximum DC o/p voltage occurs when phase difference is π since o/p
of gate remains high throughout.
Slope of the curve gives conversion ratio k ϕ of phase detector

e.g. For Vcc = 5v, conversion ratio is
5
k ϕ = V/rad
π
Working:
▪ An input signal 𝑉𝑠of 𝑓𝑠 is applied to PLL.
▪ Phase detector compares this frequency to that of VCO o/p (𝑉0 , 𝑓0 )
▪ If the two signals differ in phase and/or frequency, an error voltage 𝑣𝑒 is
generated.
• The phase detector is basically a multiplier and produces the sum (𝑓𝑠 + 𝑓0 ) and
difference (𝑓𝑠 - 𝑓0 ) components at the output
▪ High frequency component (𝑓𝑠 + 𝑓0 ) is removed using a low pass filter and
the difference frequency component (𝑓𝑠 - 𝑓0 ) is amplified using error amplifier
▪ This is then applied as control voltage 𝑣𝑐 to VCO
▪ The signal 𝑣𝑐 shifts the VCO frequency so as to reduce frequency difference
between 𝑓𝑠& 𝑓0
▪ Once this action starts, signal is now said to be in capture range
▪ VCO continues changing frequency till 𝑓𝑠 = 𝑓0 : Circuit is now said to be
locked
▪ Once locked o/p frequency of VCO 𝑓0 is identical to 𝑓𝑠except for a finite phase
difference 𝜙
▪ 𝜙 generates a corrective control voltage 𝑣𝑐 to shift VCO frequency from 𝑓0to 𝑓𝑠and
maintain lock
▪ Once locked PLL tracks frequency changes of input signal.
Stages : PLL goes through 3 stages
▪ Free Running Stage

▪ Capture Stage
▪ Phase Lock/Tracking Stage
Free Running Stage: Before input is applied, PLL is in a free running stage.
Capture Stage: Once i/p is applied, VCO frequency starts to change & PLL is
said to be in capture stage.
Phase Lock/Tracking Stage: VCO continues to change till it equals i/p
frequency and PLL is said to be in a phase-locked state.
Important Definitions
Lock In Range: Once the PLL is locked, it can track frequency changes in
the incoming signal.
The range of frequencies over which the PLL can maintain lock with
incoming signal is called the lock –in range Or tracking range.
The lock range is usually expressed as a percentage of fo , the VCO
frequency.
Capture Range: The range of frequencies over which the PLL can acquire
lock with an input signal is called the capture range.
This parameter is also expressed as a percentage of fo
Pull in Time: The total time taken by the PLL to establish lock is called
pull in time.
This depends on the initial phase ad frequency difference between the two
signals as well as on the overall loop gain and loop filter characteristics.
PLL-IC 565
PLL - IC 565
It is the most commonly used PLL; It
is a 14 pin DIP
The o/p frequency of VCO (both 2and

3 grounded) is given by
0.25
𝑓0 =
𝑅𝑇 𝐶𝑇
▪ VCO free running frequency is

adjusted using 𝑅𝑇𝐶𝑇 so as to be at
centre of input frequency range
▪ A short circuit between pins 4 and 5
connects VCO to phase comparator
so as to compare 𝑓0 with 𝑓𝑠
▪ C is connected between pin 7 and
pin 10 to make a LPF with internal
resistance of 3.6k
SPECIFICATIONS OF PLL
1) Operating frequency range : 0.001 Hz to 500 KHz
2) Operating voltage range : ±6 to ±12V
3) Inputs level required for tracking : 10mV rms minimum to 3v
(p-p) max.
4) Input impedance : 10 KΩ typically
5) Output sink current : 1mA typically
6) Drift in VCO center frequency : 300 PPM/oC typically (fout)
with temperature
7) Drift in VCO center frequency with : 1.5%/V maximum supply
voltage
8) Triangle wave amplitude : typically 2.4 VPP at ± 6V
9) Square wave amplitude : typically 5.4 VPP at ± 6V
10) Output source current : 10mA typically
11) Bandwidth adjustment range : <±1 to >± 60%
APPLICATIONS
▪ Frequency Multiplication/Division
▪ Frequency Translation
▪ AM Detection
▪ FM Demodulation
▪ FSK Demodulator

Phase Locked Loop

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Phase Locked Loop

❖ A PLL is an electronic circuit with a voltage – driven oscillator which is

❖ PLL is used for frequency control.

❖ Phase lock loop circuits work by comparing the phase of an external

An electronic circuit that compares an input frequency and phase to a reference

▪ Frequency Modulation (FM) stereo decoders, FM Demodulation

▪ Frequency synthesis that provides multiple of a reference signal

▪ Used in motor speed controls, tracking filters.

▪ Used in frequency shift keying (FSK) decodes for demodulation

Low Pass Filter & ErrorAmplifier

Takes input voltages and produces a DC voltage output

Two types of phase detectors

▪ Analog Phase Detector

DC o/p voltage of the comparator will be a function

Slope of the curve gives conversion ratio k ϕ of phase detector

▪ Free Running Stage

The o/p frequency of VCO (both 2and

▪ VCO free running frequency is

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