Computer Architecture Assignment 1

KIBABII UNIVERSITY
REG NO: COM/0036/18
NAME: COLLINCE ODUOR OKEYO
COURSE CODE: CSC 315
COURSE TITTLE: COMPUTER ARCHITECTURE II
TASK: ASSIGNMENT 1
Date: 10/6/2021
a) Distinguish between programmed i/o and interrupt driven
i/o and state how each effects the performance.
i) Programmed I/O
The data transfer in this mode is initiated by instructions written in a computer

program. To store data from the device to the CPU, an input instruction is
required, and to transfer data from the CPU to the device, a store instruction is
required. Data transfer in this mode necessitates constant monitoring of the
peripheral device by the CPU, as well as monitoring the possibility of new
transfers once the transfer has begun. As a result, the CPU remains in a loop
until the I/O device indicates that it is ready to transfer data.
When the processor issues a command to the I/O module, it must wait until the
I/O
operation is complete. If the processor is faster than the I/O module, this is
wasteful of processor time.
Thus, programmed I/O is a time-consuming process that keeps the processor

busy unnecessarily and wastes CPU cycles.
ii) Interrupt Driven I/O

This mode uses an interrupt facility and special commands to inform the interface to
issue the interrupt command when data becomes available and interface is ready for
the data transfer.
In the meantime CPU keeps on executing other tasks and need not check for the flag.
When the flag is set, the interface is informed and an interrupt is initiated. This
interrupt causes the CPU to deviate from what it is doing to respond to the I/O
transfer.
The CPU responds to the signal by storing the return address from the program
counter (PC) into the memory stack and then branches to service that processes the
I/O requested. After the transfer is complete, CPU returns to the previous task it was
executing.
The branch address of the service can be chosen in two ways known as vectored and
non-vectored interrupt. In vectored interrupt, the source that interrupts, supplies the
branch information to the CPU while in case of non-vectored interrupt the branch
address is assigned to a fixed location in memory.
b) Explain the performance effect of bus width to a
computer system.
The width of the data bus has an impact on system performance:
The wider the data bus, the greater the number of bits transferred at one time. The
width of the address bus has an impact on system capacity the wider the address bus,
the greater the range of locations that can be referenced.
c) Explain the basic concept of RAID and its potential

contribution to reliability and performance.
The RAID strategy employs multiple disk drives and distributes data in such a way
as to enable simultaneous access to data from multiple drives, thereby improving I/O
performance and allowing easier incremental increase in capacity.
The unique contribution of the RAID proposal is to address effectively the need for
redundancy. Although allowing multiple heads and actuators to operate in a
simultaneous manner achieves higher I/O and transfer rates, the use of multiple
devices increases the probability of failure. To compensate for this decreased
reliability, RAID makes use of stored parity information that enables the recovery of
data lost due to a disk failure.
RAID storage techniques

The main data storage methods in the array are:
1) Striping: In this storage technique it splits the flow of data into blocks of a certain
size called block size then these blocks are written across the RAID one by one. This
type of data storage effects the performance.
2) Mirroring: In this storage technique the identical copies of data are stored on the
RAID members simultaneously. This way of data storage affects the fault tolerance as
well as the performance.
3) Parity: In this storage technique it uses striping and checksum methods. A certain
parity function is calculated for the data blocks. The missing blocks can be
recalculated from the checksum, providing the RAID fault tolerance.
d) Explain the major functions of an I/O module and with an aid of a
diagram describe the basic architecture of an I/O module.
1. Control an Timing
It coordinate the flow of traffic between internal resources and external devices.
2. Processor communication
The I/O module ensures processor communication to enable data processing and
storage.
3. Data Buffering
The data are buffered in the I/O module and then sent to the peripheral device at its
data rate. In the opposite direction, data are buffered so as not to tie up the memory in
a slow transfer operation.
4. Device Communication
This communication involves commands, status information, and data.
5. Error Detection
An I/O module is often responsible for error detection and for subsequently reporting
of errors to the processor.
Diagram of an I/O Module
 The data lines provide a path for moving data among system modules.
 The address lines are used to designate the source or destination of the data on
the data bus.
 The control lines are used to control the access to and the use of the data and
address lines.
 The I/O Module provides an interface between the computer system and the
outside wold.
e) Define instructional level pipelining and explain how it

improves performance.
Pipelining is a technique where multiple instructions are overlapped during
execution. Pipeline is divided into stages and these stages are connected with one
another to form a pipe like structure. Instructions enter from one end and exit from
another end.
Instruction Pipeline
In this, a stream of instructions can be executed by overlapping fetch, decode and
execute phases of an instruction cycle. This type of technique is used to increase the
throughput of the computer system.
An instruction pipeline reads instruction from the memory while previous
instructions are being executed in other segments of the pipeline. Thus we can
execute multiple instructions simultaneously. The pipeline will be more efficient if
the instruction cycle is divided into segments of equal duration.
Advantages of Pipelining
1. The cycle time of the processor is reduced.
2. It increases the throughput of the system
3. It makes the system reliable.

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KIBABII UNIVERSITY

REG NO: COM/0036/18

NAME: COLLINCE ODUOR OKEYO

COURSE CODE: CSC 315

COURSE TITTLE: COMPUTER ARCHITECTURE II

The data transfer in this mode is initiated by instructions written in a computer

Thus, programmed I/O is a time-consuming process that keeps the processor

ii) Interrupt Driven I/O

c) Explain the basic concept of RAID and its potential

RAID storage techniques

e) Define instructional level pipelining and explain how it

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