DR Ahmed Heikal Lecture 4 PDF
DR Ahmed Heikal Lecture 4 PDF
DR Ahmed Heikal Lecture 4 PDF
Ninth Edition
Floyd
Chapter 8
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The FET
The idea for a field-effect transistor (FET) was first
proposed by Julius Lilienthal, a physicist and inventor. In
1930 he was granted a U.S. patent for the device.
His ideas were later refined and
developed into the FET. Materials
were not available at the time to
build his device. A practical FET
was not constructed until the
1950’s. Today FETs are the most
widely used components in
integrated circuits.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
The JFET (or Junction Field Effect Transistor) is a normally
ON device. For the n-channel device illustrated, when the
drain is positive with respect to the source and there is no
gate-source voltage, there is current in the channel.
When a negative gate voltage is
applied to the FET, the electric
field causes the channel to
narrow, which in turn causes
current to decrease.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
As in the base of bipolar transistors, there are two types of
JFETs: n-channel and p-channel. The dc voltages are
opposite polarities for each type.
RD
The symbol for an n-channel JFET is
shown, along with the proper polarities of Drain
+
the applied dc voltages. For an n-channel Gate VDD
device, the gate is always operated with a –
–
VGG Source
negative (or zero) voltage with respect to +
the source.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
There are three regions in the characteristic curve for a JFET
as illustrated for the case when VGS = 0 V.
Between A and B is the Ohmic ID
The JFET
When VGS is set to different values, the relationship between
VDS and ID develops a family of characteristic curves for the
device. I D
An n-channel
IDSS VGS = 0
characteristic is
illustrated here.
Notice that Vp is VGS = –1 V
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
A plot of VGS to ID is called the transfer or transconductance
curve. The transfer curve is a is a plot of the output current
(ID) to the input voltage (VGS). ID
The transfer curve is based on the IDSS
equation
2
VGS
=I D I DSS 1 −
V
GS(off) IDSS
2
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
The transconductance is the ratio of a change in output
current (∆ID) to a change in the input voltage (∆VGS).
∆I D
This definition is g m = ID
∆VGS
The following approximate formula IDSS
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The JFET
Because the slope changes at every point along the curve,
the transconductance is not constant, but depends on where
it is measured. I D (mA)
10 mA
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
JFET Biasing
Self-bias is simple and effective, so it is the most common
biasing method for JFETs. With self bias, the gate is
essentially at 0 V. +V = +12 V DD
VG = 0 V
Assume the resistors are as shown and the
drain current is 3.0 mA. What is VGS? + IS
RG RS 330 Ω
1.0 MΩ –
VG = 0 V; VS = (3.0 mA)(330 Ω) = 0.99 V
VGS = 0 – 0.99 V = − 0.99 V
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
JFET Biasing
You can use the transfer curve to obtain a reasonable value
for the source resistor in a self-biased circuit.
I D (mA)
6.0
The Q point is approximately at Q 4.0
ID = 4.0 mA and VGS = −1.25 V.
2.0
VGS 1.25 V
=
RS = = 375 Ω –VGS
ID 3.0 mA −4 −3 −2 −1 0
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
JFET Biasing
Voltage-divider biasing is a combination of a voltage-divider
and a source resistor to keep the source more positive than
the gate. +V DD
VS IS
Voltage-divider bias helps stabilize the bias for
R2 RS
variations between transistors.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
JFET Biasing
A graphical analysis of voltage-divider biasing is illustrated.
A typical transconductance curve for the 2N5485 is shown
with IDSS = 6.5 mA and VGS(off) = −2.2 V. +V DD
+12 V
Start with VG: ID (mA)
The Q-point
VG = 2.79 V
8.0 is read from R1 RD
VG/RS = 2.79 mA the plot. It is 3.3 MΩ 820 Ω
6.0
Connect the 3.3 mA and 2.79 V 2N5485
points to Q 4.0 −0.7 V.
establish the
load line. 2.0 R2 RS
1.0 MΩ 1.0 kΩ
–VGS VGS
−3 −2 −1 0 +1 +2 +3
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
Q-Point Stability
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
Current-Source Bias
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
JFET Biasing
+VDD
An even more stable form of bias is +15 V
− VSS
− 15 V
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
Vs = R2 10 µF R3
400 mV pp 39 kΩ RE Q2
100 k Ω −VGG
1.0 kHz 6.2 kΩ 2N5458
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The MOSFET
The metal oxide semiconductor FET uses an insulated gate
to isolate the gate from the channel. Two types are the
enhancement mode (E-MOSFET) and the depletion mode
(D-MOSFET). E-MOSFET
Drain RD
An E-MOSFET has no ID
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The MOSFET
The D-MOSFET has a channel that can is controlled by the
gate voltage. For an n-channel type, a negative voltage
depletes the channel; and a positive voltage enhances the
channel. D-MOSFET RD RD
A D-MOSFET can
operate in either n n
mode, depending on –
–
+
+
+
+
–
–
+ +
the gate voltage. –
–
+
+
p
–
VDD
+
+
–
– p
–
VDD
– + + –
– + + –
– +
VGG n VGG n
+ –
The MOSFET
MOSFET symbols are shown. Notice the broken line
representing the E-MOSFET that has an induced channel.
The n channel has an inward pointing arrow.
E-MOSFETs D-MOSFETs
D D D D
G G G G
S S S S
n channel p channel n channel p channel
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The MOSFET
The transfer curve for a MOSFET is has the same parabolic
shape as the JFET but the position is shifted along the x-axis.
The transfer curve for an n-channel E-MOSFET is entirely in
the first quadrant as shown. I D
0 VGS(th) +VGS
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The MOSFET
Recall that the D-MOSFET can be operated in either mode.
For the n-channel device illustrated, operation to the left of
the y-axis means it is in depletion mode; operation to the
right means is in enhancement mode. I D
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
MOSFET Biasing
E-MOSFETs can be biased using bias methods like the BJT
methods studied earlier. Voltage-divider bias and drain-
feedback bias are illustrated for n-channel devices.
+V DD +VDD
RD RD
R1 RG
R2
MOSFET Biasing
The simplest way to bias a D-MOSFET is with zero bias. This
works because the device can operate in either depletion or
enhancement mode, so the gate can go above or below 0 V.
+VDD +V DD
RD RD
C
VG = 0 V IDSS ac
input
VGS = 0
RG RG
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Selected Key Terms
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
b. VGS
c. VS
d. Vth
VDS
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
c. at VCC R1
RC
3.9 kΩ Vout
56 kΩ
C1
Q1
d. undefined 2N3904 C2
1.0 µF
Vs = R2 10 µF R3
400 mV pp 39 kΩ RE Q2
100 k Ω −VGG
1.0 kHz 6.2 kΩ 2N5458
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
c. capacitor R1
RC
3.9 kΩ Vout
56 kΩ
C1
Q1
d. resistor 2N3904 C2
1.0 µF
Vs = R2 10 µF R3
400 mV pp 39 kΩ RE Q2
100 k Ω −VGG
1.0 kHz 6.2 kΩ 2N5458
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
D D D D
G G G G
S S S S
a. b. c. d.
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
b. D-MOSFET
c. JFET
d. all of the above
0 VGS(th) +VGS
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
10. A type of FET that can use the same bias method as a
BJT is a(n)
a. E-MOSFET
b. D-MOSFET
c. JFET
d. all of the above
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Quiz
Answers:
1. b 6. a
2. d 7. d
3. b 8. b
4. a 9. a
5. c 10. a
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.