MOSFETs Withstand Stress

of Linear-Mode Operation
By Abdus Sattar
Sattar, Applications Engineering Manager,
Vladimir Tsukanov
Tsukanov, Vice President of Engineering,
IXYS, Santa Clara, Calif.
For applications like electronic loads that require
power MOSFETs to operate in their linear region,
a novel transistor structure and process technol-
ogy provides an extended FBSOA.

P
ower MOSFETs are most often used in switched-
mode applications where they function as on- ���
off switches. But in applications like electronic
loads, linear regulators or Class A amplifiers, ��� ������
power MOSFETs must operate in their linear ����
region. In this operating mode, the MOSFETs are subjected ����
to high thermal stress due to the simultaneous occurrence ����
of high drain voltage and current, resulting in high power ������������������������ ����
dissipation.
����� ����
When the thermo-electrical stress exceeds some critical ������
����
limit, thermal hot spots occur in the silicon causing the
devices to fail. To prevent such failure, MOSFETs operating ���
in the linear region require high power dissipation capa- ������ �����
���������������������������
bility and an extended forward-bias safe operating area
(FBSOA). Fig. 1. As shown in this generalized graph of output characteristics, an
A series of linear power MOSFETs developed by IXYS n-channel power MOSFET has three possible modes of operation.
achieves an extended FBSOA capability by suppressing the
positive feedback of electro-thermal instability. The design condition can occur as a result of thermal hot spots or “cur-
of these new MOSFETs features a nonuniform distribution rent focusing” in the silicon, which in turn are caused by the
of transistor cells, as well as cells with different threshold spurious activation of the MOSFET’s parasitic BJT.
voltages. Normally, when the current attempts to self-constrict to
Every transistor cell is designed with a ballast resistor at a localized area, the increasing temperature of the spot will
the source to limit its current. The parasitic bipolar junction raise the resistance of the spot due to a positive temperature
transistor (BJT) of each cell is heavily bypassed so that it coefficient, and will redistribute the current away from the
will not turn on under extreme electrical stress conditions. hot spot.[1] This attribute facilitates parallel operation of
In addition, the thermal response of each power MOSFET multiple MOSFETs.
is tested to assure no solder voids. The linear MOSFET’s ef- However, applications like programmable resistors and
fectiveness can be demonstrated in the design of an electronic Class A, AB amplifiers cause the power MOSFETs to oper-
load developed for power-supply testing. ate in their linear region, where they must dissipate higher
power levels than in the more common on-off switching. In
Second Breakdown such cases, the current focusing and hot spots may not be
In power MOSFETs, the term “second breakdown” refers self-correcting, which can lead to device failure.
to a sudden reduction in a MOSFET’s blocking-voltage capa- In the linear mode, a power MOSFET is subjected to
bility followed by a loss of current control by MOSFET cur- high thermal stress due to the simultaneous occurrence of
rent. Although in most applications, MOSFETs are typically high drain voltage and current resulting in high power dis-
not subject to second breakdown. This potentially destructive sipation. When the thermo-electrical stress exceeds some

Power Electronics Technology April 2007 34 www.powerelectronics.com

 POWER MOSFETS

critical limit, thermal hot spots occur in the silicon causing

����������� ��������� the device to fail.[2]
���
��� Fig. 1 shows a typical output characteristic of an n-chan-
����� nel power MOSFET in which the different modes of opera-
������
���� ���������������� tion are delineated. In the cutoff region, the gate-source volt-
�� ����� age (VGS) is less than the gate-threshold voltage (VGSTH) and
��
the device is an open circuit or off. In the ohmic region, the
�����

device acts as a resistor with an almost constant on-resistance

� (RDSON) and is equal to the drain voltage (VDS) divided by
��������������� the drain current (IDS). In the linear mode of operation, the
�����������
�������� device operates in the current-saturated region where IDS is
��� a function of the gate-source voltage (VGS) and defined by:
��� ���� ����� ������ ������ (Eq. 1)
IDS = K(VGS − VGSTH )2 = g FS (VGS − VGSTH ),
�������
where K is a parameter depending on the temperature
Fig. 2. Power MOSFETs optimized for switched-mode designs have
limited ability to operate in the corner of the FBSOA graph, where
and device geometry and gFS is the current gain or trans-
electro-thermal instability can occur as shown here for a typical conductance.
n-channel power MOSFET. When VDS is increased, the positive drain potential op-
poses the gate-voltage bias and reduces the surface potential
in the channel. The channel inversion-layer charge decreases
����������� ���������
��� with increasing VDS and, ultimately, becomes zero when the
��� drain voltage equals to VGS - VGSTH. This point is called the
�����
������ “channel pinch-off point,” where the drain current becomes
����� saturated.[3]
����������������
�� ����
The FBSOA is a datasheet figure of merit that defines the
�����

�� maximum allowed operating points. Fig. 2 shows a typical

FBSOA characteristic for an n-channel power MOSFET. It
� is bound by the maximum drain-to-source voltage (VDSS),
��������� maximum conduction current (IDM) and constant power
��������������� dissipation lines for various pulse durations.
��� In Fig. 2, the set of curves shows a dc line and four single-
��� ���� ����� ������ ������ pulse operating lines: 10 ms, 1 ms, 100 µs and 25 µs. The top
������� of each line is truncated to limit the maximum drain current
Fig. 3. By suppressing the positive feedback of electro-thermal instabil- and is bounded by a positive slope line defined by the on-
ity, IXYS’ IXTK22N100L linear power MOSFET extends the FBSOA when resistance of the device. The right-hand side of each line is
compared with devices developed for switched-mode operation. terminated at the rated drain-to-source voltage limit. Each
line has a negative slope and is determined by the maximum
allowed power dissipation of the device PD:
����������� ����������
��� (TJ max − TC )
PD = = VDS ID ,
Z θJC
(Eq. 2)
����� where ZJC is the junction-to-case transient thermal
impedance and TJmax is the maximum allowed junction
�� ������
temperature of the MOSFET.
These theoretical constant power curves are derived from
�����

���� calculation with the assumption that junction temperature

is essentially uniform across the power MOSFET die. For
�
����� several reasons, this assumption is not always valid, especially
for a large-die MOSFET. First, the edge of a MOSFET die
�� soldered to the mounting tab of a power package generally
has a lower temperature compared to the center of the die,
���
��� ���� ����� ������ which is the result of lateral heat flow. Second, material im-
������� perfections (die attach voids, thermal grease cavities, etc.)
may cause a local decrease in thermal conductivity, or in
Fig. 4. At TC equals 90oC, the IXTK22N100L FBSOA shows its SOA point at other words, an increase in local temperature, with “local”
VDS equals 800 V and ID equals 0.3 A with 240-W capability. meaning a specific spot on the die. Third, fluctuations in

Power Electronics Technology April 2007 36 www.powerelectronics.com

 POWER MOSFETS

rating is normally used in the circuit

Part No. VDSS ID ROJC SOA specification power Package
(V) (A) C/W
o
(W), TC = 90oC type design for switched-mode operation,
but not for linear applications. For
IXTH24N50L 500 24 0.31 200 at VDS = 400 V, ID = 0.5 A TO-247
linear operation, IXYS provides a safe
IXTN46N50L 500 46 0.18 240 at VDS = 400 V, ID = 0.6 A SOT-227B operating area rating that is obtained
IXTK22N100L 1000 22 0.18 240 at VDS = 800 V, ID = 0.3 A TO-264 under a strict dc operation condition
IXTN30N100L 1000 30 0.156 300 at VDS = 600 V, ID = 0.5 A SOT-227B such as 240 W at VDS equals 800 V, ID
equals 0.3 A and TC equals 90°C for
Table 1. Select n-channel power MOSFETs with extended FBSOA . IXTK22N100L.

dopant concentrations and gate-oxide to lose gate control, and turns on the Application Example
thickness, and fixed charge will cause parasitic BJT with consequent destruc- Electronic loads such as those used
fluctuations of local threshold voltage tion of the device. to test power supplies can benefit from
and the current gain (gFS) of MOSFET In response to these problems, the use of linear MOSFETs with an
cells, which will also affect the local IXYS has developed a power MOSFET extended FBSOA. An electronic load
temperature of the die. structure and process that provides an is essentially a programmable resistor
Die temperature variations are extended FBSOA capability by sup- and is typically implemented with
mostly harmless in the case of switched- pressing the positive feedback of ETI. multiple high-voltage power MOSFETs
mode operation. However, these varia- The design of these new MOSFETs operating in parallel. In parallel opera-
tions can trigger catastrophic failure in features a nonuniform distribution tion, it’s highly unlikely that current
linear-mode operation, with pulse du- of transistor cells, as well as cells with will be shared equally in each MOSFET
rations longer than the time required different threshold voltages.[3] because of variations in device geom-
for a heat transfer from the junction to

Die temperature variations can trigger catastropic

the heatsink. Modern power MOSFETs
optimized for switched-mode ap-

failure in linear-mode operation.

plications were found to have limited
capability to operate in the bottom
right-hand corner of the FBSOA
graph in Fig. 2, the area to the right of
the electro-thermal instability (ETI) Every transistor cell is designed with etry and mechanical assembly, which
boundary. a ballast resistor at the source to limit in turn cause variations in device pa-
ETI can be understood as a result its current.[4] The parasitic BJT of each rameters such as breakdown voltage,
of a positive-feedback mechanism on cell is heavily bypassed so that it will current gain, etc.
the surface of a power MOSFET forced not turn on under extreme electrical To assure equal current sharing, a
into linear mode of operation: stress conditions. In addition, the ther- feedback mechanism is usually em-
● There is a local increase in junc- mal response of each power MOSFET ployed by installing a resistor in series
tion temperature is tested to assure no solder voids. This with each MOSFET source. That resis-
● Increasing junction temperature design has been used to develop a fam- tor monitors current in each MOSFET
causes a local decrease in VGSTH, since ily of power MOSFETs with extended and develops a voltage whose value is
MOSFET threshold voltage has nega- FBSOA suitable for reliable operation based on the adjustment of dynamic
tive temperature coefficient in linear mode. range, the noise level at the output,
● Decreasing V GS causes an in- Datasheets of these MOSFETs the minimum load resistance and
TH
crease in local current density such that contain guaranteed FBSOA graphs. the stability of the system. It is typically
JDS ~ (VGS - VGSTH)2 For example, Fig. 3 shows the FBSOA designed for 1 V to 2 V maximum. The
● The increase in local current den- graph for IXYS IXTK22N100L linear temperature stability of the system
sity causes an increase in local power power MOSFET with its tested dc op- is determined by the temperature
dissipation, which leads to a further lo- eration point marked. To illustrate the coefficient of the resistors.[2]
cal increase in junction temperature. range of performance available with Consider a 2-A, 600-V regulated
Depending on the duration of the the linear power MOSFET design, the power supply that needs to be tested
power pulse, heat-transfer conditions table lists key specifications for a few with a programmable resistor com-
and features of the design of MOSFET of the devices with extended FBSOA prised of multiple power MOSFETs
cells, the ETI may cause a concentra- capability. connected in parallel. The load needs
tion of all the MOSFET current into Based on Eq. 2, a single power power MOSFETs with a breakdown
a current filament and formation MOSFET such as the IXTK22N100L voltage of at least 600V and which are
of a hot spot. This normally causes with a voltage rating of 1000 V provides capable of dissipating the entire output
MOSFET cells in the affected areas a power rating of 700 W. This power power. The output power is defined as:

Power Electronics Technology April 2007 38 www.powerelectronics.com

 POWER MOSFETS

���������������������������
����������

��
�� ��
�� ��� �� ��� ��
�� ���

���
��� ���
��� ��� ���

Fig. 5. Linear MOSFETs can be used to build a programmable resistive load for testing power
supplies at 2 A and 600 V.

PO = IO  VO , (Eq. 3) ance of the resistances determines the

where IO equals 2 A and VO equals relative matching between the power
600 V. This brings the total power dis- MOSFETs. The voltage across the
sipation to: PO = 2  600 = 1200 W. source resistor is applied to the invert-
For this application, assume that ing input of each op amp driving the
the IXTK22N100L power MOSFET is power MOSFET and the noninverting
used. This device has a voltage rating input is connected to a control drain
of 1000 V, a current rating of 22 A, current that goes to the noninverting
an FBSOA (or simply SOA) rating of terminal of the op amp.[2]
240 W and a rated power dissipation The IXYS linear power MOSFETs
of 700 W. In Fig. 4, the FBSOA shows overcome the limitations of conven-
its SOA point at VDS equals 800 V, ID tional power MOSFETS in linear
equals 0.3 A and TC equals 90oC with applications by extending the transis-
240-W capability. Its rated power dis- tors’ FBSOA. This capability has been
sipation of 700 W is only applicable realized by the nonuniform distribu-
for switched-mode application, so for tion of transistor cells and the use of
linear operation, one must use the SOA cells with different threshold voltages,
rating due to high power dissipation. which helps to suppress the positive
Assuming a 20% safety margin with feedback of ETI. PETech
this rating, this reduces its allowable
SOA rating to 192 W. References
The maximum output power for 1. Consoli, Alfio and et al, “Thermal
the power supply is 1440 W with a 20% Instability of Low-Voltage Power
safety margin with the rated power MOSFETs,” IEEE Transactions on Power
rating of 1200 W. As can be seen, a Electronics, Vol. 15, No. 3, May 2000.
single MOSFET such as IXTK22N100L 2. Frey, Richard, Grafham, Denis,
cannot dissipate the total power. Thus Mackewich, Tom, “New 500V Linear
multiple power MOSFETs connected MOSFETs for a 120 kW Active Load,”
in parallel are needed to carry the Application Note, Advanced Power
total power. The number of MOSFETs Technology (APT), 2000.
required for this application is 1440 3. Baliga, B. Jayant, “Power Semicon-
divided by 192 equals 7.5. A typical ductor Devices,” PWS Publishing Co.,
arrangement for the programmable 1996.
resistor circuit is shown in Fig. 5.[2] 4. Zommer, Nathan, “Monolithic
The gate resistor shown in Fig. 5, Semiconductor Device and Method of
connected between each op-amp out- Manufacturing Same,” U.S. Patent No.
put and each gate of MOSFET, is used US4860072, August 1989.
to limit the gate current. It is optional,
and its value can be chosen between
5  and 50 . The source resistors
(RS1 through RS8) monitor the drain
current in each MOSFET. The toler-

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