DATASHEET

ISL55001 FN6200
High Supply Voltage 220MHz Unity-Gain Stable Operational Amplifier Rev 3.00
Nov 3, 2009

The ISL55001 is a high speed, low power, low cost Features

monolithic operational amplifier. The ISL55001 is
unity-gain stable and features a 300V/µs slew rate and • 220MHz -3dB Bandwidth
220MHz bandwidth while requiring only 9mA of supply • Unity-gain Stable
current.
• Low Supply Current: 9mA @ VS = ±15V
The power supply operating range of the ISL55001 is • Wide Supply Range: ±2.5V to ±15V Dual-Supply
from ±15V down to ±2.5V. For single-supply operation, and 5V to 30V Single-Supply
the ISL55001 operates from 30V down to 5V.
• High Slew Rate: 300V/µs
The ISL55001 also features an extremely wide output • Fast Settling: 75ns to 0.1% for a 10V Step
voltage swing of -12.75V/+13.4V with VS = ±15V and
• Wide Output Voltage Swing: -12.75V/+13.6V with
RL = 1k.
VS = ±15V, RL = 1k
At a gain of +1, the ISL55001 has a -3dB bandwidth of • Low Cost, Enhanced Replacement for the EL2044
220MHz with a phase margin of 50°. Because of its
• Pb-free (RoHS compliant)
conventional voltage-feedback topology, the ISL55001
allows the use of reactive or non-linear elements in its
feedback network. This versatility combined with low Applications
cost and 140mA of output-current drive makes the • Video Amplifiers
ISL55001 an ideal choice for price-sensitive • Single-supply Amplifiers
applications requiring low power and high speed.
• Active Filters/Integrators
The ISL55001 is available in an 8 Ld SO package and • High Speed Sample-and-Hold
specified for operation over the full -40°C to +85°C
• High Speed Signal Processing
temperature range.
• ADC/DAC Buffers
Ordering Information • Pulse/RF Amplifiers
• Pin Diode Receivers
PART PACKAGE PKG.
PART NUMBER MARKING (Pb-free) DWG. # • Log Amplifiers

ISL55001IBZ 55001 IBZ 8 Ld SO M8.15E

• Photo Multiplier Amplifiers
(Note 2) • Difference Amplifier
ISL55001IBZ-T7 55001 IBZ 8 Ld SO M8.15E
(Note 1, 2) Pin Configuration
ISL55001IBZ-T13 55001 IBZ 8 Ld SO M8.15E ISL55001
(Notes 1, 2) (8 LD SO)
TOP VIEW
NOTES:
NC 1 8 NC
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ IN- 2 7 VS+
-
special Pb-free material sets, molding compounds/die +
attach materials, and 100% matte tin plate plus anneal IN+ 3 6 OUT
(e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering VS- 4 5 NC
operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
3. For Moisture Sensitivity Level (MSL), please see device
information page for ISL55001. For more information on
MSL please see techbrief TB363.

FN6200 Rev 3.00 Page 1 of 12

Nov 3, 2009
ISL55001

Absolute Maximum Ratings (TA = +25°C) Thermal Information

Supply Voltage (VS) . . . . . . . . . . . . . . . . . . ±16.5V or 33V Continuous Output Current . . . . . . . . . . . . . . . . . . . 60mA
Input Voltage (VIN). . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS Power Dissipation (PD). . . . . . . . . . . . . . . . . . . . see Curves
Differential Input Voltage (dVIN) . . . . . . . . . . . . . . . . ±10V Operating Temperature Range (TA) . . . . . . . -40°C to +85°C
ESD Rating Operating Junction Temperature (TJ) . . . . . . . . . . . . +150°C
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . 3kV Storage Temperature (TST) . . . . . . . . . . . -65°C to +150°C
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 250V Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.

DC Electrical Specifications VS = ±15V, RL = 1k, TA = +25°C, unless otherwise specified.

PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT

VOS Input Offset Voltage 0.06 3 mV

TCVOS Average Offset Voltage Drift 18 µV/°C

IB Input Bias Current 1.72 3.5 µA

IOS Input Offset Current 0.27 1.5 µA

TC-IOS Average Offset Current Drift 0.8 nA/°C

(Note 4)

AVOL Open-loop Gain VOUT = ±10V, RL = 1k 10 17 kV/V

PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 75 90 dB

CMRR Common-mode Rejection Ratio VCM = ±10V, VOUT = 0V 70 90 dB

CMIR Common-mode Input Range VS = ±15V ±14 V

VOUT Output Voltage Swing VO+, RL = 1k 13.25 13.5 V

VO-, RL = 1k -12.6 -12.8 V

VO+, RL = 150 10.7 11.5 V

VO-, RL = 150 -8.8 -9.9 V

ISC Output Short Circuit Current 120 145 mA

IS Supply Current No load 8.3 9.25 mA

RIN Input Resistance 2.0 2.75 M

CIN Input Capacitance AV = +1 1 pF

ROUT Output Resistance AV = +1 50 m

PSOR Power Supply Operating Range Dual supply ±2.25 ±15 V

Single supply 4.5 30 V

NOTE:
4. Measured from TMIN to TMAX.

AC Electrical SpecificationsVS = ±15V, AV = +1, RL = 1k, unless otherwise specified.

PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT

BW -3dB Bandwidth (VOUT = 0.4VP-P) AV = +1 220 MHz

AV = -1 55 MHz

AV = +2 53 MHz

AV = +5 17 MHz
GBWP Gain Bandwidth Product 70 MHz

PM Phase Margin RL = 1k, CL = 5pF 55 °

SR Slew Rate (Note 5) RL = 100 250 280 V/µs

FN6200 Rev 3.00 Page 2 of 12

Nov 3, 2009
ISL55001

AC Electrical SpecificationsVS = ±15V, AV = +1, RL = 1k, unless otherwise specified. (Continued)

PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT

FPBW Full-power Bandwidth (Note 6) VS = ±15V 9.5 MHz

tS Settling to +0.1% (AV = +1) VS = ±15V, 10V step 75 ns

dG Differential Gain (Note 7) NTSC/PAL 0.01 %

dP Differential Phase NTSC/PAL 0.05 °

eN Input Noise Voltage 10kHz 12 nV/H

z
iN Input Noise Current 10kHz 1.5 pA/H
z

NOTES:
5. Slew rate is measured on rising edge.
6. For VS = ±15V, VOUT = 10VP-P, for VS = ±5V, VOUT = 5VP-P. Full-power bandwidth is based on slew rate measurement using
FPBW = SR/(2*VPEAK).
7. Video performance measured at VS = ±15V, AV = +2 with two times normal video level across RL = 150. This corresponds
to standard video levels across a back-terminated 75 load. For other values or RL, see “Typical Performance Curves” on
page 4.

FN6200 Rev 3.00 Page 3 of 12

Nov 3, 2009
ISL55001

Typical Performance Curves

Vs=+/-15V
RVLS=1K
= ±15V
RL = 1k
Source Power=-20dBm
SOURCE POWER = -20dBm

VS = ±15V
RL = 1k
SOURCE POWER = -20dBm

FIGURE 1. OPEN-LOOP GAIN vs FREQUENCY FIGURE 2. OPEN-LOOP PHASE vs FREQUENCY

VS = ±15V VS = ±15V
CL = 5pF CL = 5pF
SOURCE POWER = -20dBm SOURCE POWER = -20dBm
RL = 1k RL = 1k
RL = 500 RL = 500

RL = 150
RL = 150
RL = 75
RL = 75
RL = -50
RL = 50

FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS RLOAD
RLOAD (AV = +1) (AV = +2)

VS = ±15V CL = 82pF
CL = 82pF RL = 1k
SOURCE POWER = -20dBm

CL = 39pF
CL = 39pF

CL = 10pF
CL = 5pF CL = 10pF

VS = ±15V
RL = 1k CL = 5pF
SOURCE POWER = -20dBm

FIGURE 5. FREQUENCY RESPONSE FOR VARIOUS FIGURE 6. FREQUENCYRESPONSE FOR VARIOUS CLOAD
CLOAD (AV = +1) (AV = +2)

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Nov 3, 2009
ISL55001

Typical Performance Curves (Continued)

270 360
VS = ±15V VS = ±15V
RF = 500 315 RF = 500
180 RL= 500 RL= 500
270
90
225
PHASE (°)

AV = +1 AV = -1

PHASE (°)
0 180

135
-90
AV = +5
90 AV = -5
-180 AV = +2
AV = -2
45
NOTE: FOR AV = +1, RF = 0
-270 0
100k 1M 10M 100M 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 7. PHASE vs FREQUENCY FOR VARIOUS FIGURE 8. PHASE vs FREQUENCY FOR VARIOUS
NON-INVERTING GAIN SETTINGS INVERTING GAIN SETTINGS

100 350
RL = 500 AV = +2
AV = +2
GAIN BANDWIDTH PRODUCT (MHz)

RF = 500
RF ==500
R 500
80 300 L
CLL ==5pF
R 500 POSITIVE SLEW
POSITIVE SLEW RATE
RATE
CL = 5pF
SLEW RATE (V/µs)

60 250 NEGATIVE SLEW RATE

NEGATIVE SLEW RATE

40 200

20 150

0 100
0 3 6 9 12 15 0 3 6 9 12 15
SUPPLY VOLTAGES (±V) SUPPLY VOLTAGES (±V)

FIGURE 9. GAIN BANDWIDTH PRODUCT vs SUPPLY FIGURE 10. SLEW RATE vs SUPPLY

5 5
VS = ±15V VS = ±15V
AV = +1 RF = 500 AV = +2
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)

RL = 500 RL = 500
3 3 CL = 5pF
CL = 5pF RF = 250 RFR=F 500
= 1k

1 1

RF = 100 -1 RF = 250
-1 RF = 0

-3 -3 RF = 100

-5 -5
100k 1M 10M 100M 100k 1M 10M 100M 100M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS
RFEEDBACK (AV = +1) RFEEDBACK (AV = +2)

FN6200 Rev 3.00 Page 5 of 12

Nov 3, 2009
ISL55001

Typical Performance Curves (Continued)

5 5
VS = ±15V AV = +1
AV = +2 CIN = 10pF RF = 0
NORMALIZED GAIN (dB)

RF = 500 CIN = 6.8pF RL = 500

3 R = 500 3 CL = 5pF VS = ±2.5V

NORMALIZED GAIN (dB)

L
CL = 5pF VS = ±5V
CIN = 4.7pF
1 1

CIN = 2.2pF VS = ±15V

-1 -1
CIN = 0pF VS = ±10V

-3 -3

-5 -5
100k 1M 10M 100M 100k 1M 10M 100M 1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS SUPPLY
INVERTING INPUT CAPACITANCE (CIN) SETTINGS

-10 -10
VS = ±15V VS = ±15V
-20 -20

-30 -30 NEG_PSRR

-40 -40
CMRR (dB)

PSRR (dB)

-50 -50

-60 -60 POS_PSRR

-70 -70

-80 -80

-90 -90

-100 -100
10k 100k 1M 10M 100M 10k 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 15. COMMON-MODE REJECTION RATIO (CMRR) FIGURE 16. POWER SUPPLY REJECTION RATIO (PSRR)

-30
HARMONIC DISTORTION (dBc)

VS = ±15V
VS = ±15V AV = +2
RL = 500 -40 RF = 500
THD
HARMONIC DISTORTION (dB)

VOUT = 2VP-P RL = 500

THD
-50 CL = 5pF
FIN = 2MHz
-60

-70
2nd HD
3rd HD
3rd HD -80

2nd HD -90

-100
0 2 4 6 8 10 12 14 16 18 20 22 24 26
OUTPUT VOLTAGE (V)

FIGURE 17. HARMONIC DISTORTION vs FREQUENCY FIGURE 18. HARMONIC DISTORTION vs OUTPUT
(AV = +1) VOLTAGE(AV = +2)

FN6200 Rev 3.00 Page 6 of 12

Nov 3, 2009
 ISL55001

Typical Performance Curves (Continued)

30 25
RL =R500
L = 500 AVV == +1
+1
VS = ±15V
CL =C5pF
L = 5pF
OUTPUT VOLTAGE SWING (V)

OUTPUT VOLTAGE SWING (VP-P)

25 RL = 500
20
CL = 5pF
AV ==+2
A +2
20 RF =V 500
AV = +1 RF = 500
RF = 0 15
15

10
10
AV = +1
RF = 500
5
5

0 0
1M 10M 100M
0 3 6 9 12 15
FREQUENCY (Hz)
SUPPLY VOLTAGES (±V)
FIGURE 19. OUTPUT SWING vs FREQUENCY FOR
VARIOUS GAIN SETTINGS FIGURE 20. OUTPUT SWING vs SUPPLY VOLTAGE FOR
VARIOUS GAIN SETTINGS

VS = ±15V VS = ±15V
AV = +1 AV = +1
RF = 0 RF = 0
RL = 500 RL = 500
CL = 5pF CL = 5pF
VOUT = 4V tRISE = tFALL = VOUT = 400mV
2ns 2.2ns
20% to 80% 80% to 20%
tRISE = 8.4ns tFALL = 7.2ns
20% to 80% 80% to 20%

FIGURE 21. LARGE SIGNAL RISE AND FALL TIMES FIGURE 22. SMALL SIGNAL RISE AND FALL TIMES

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD
12.5 1.8

1.6
TOTAL SUPPLY CURRENT (mA)

10.0
1.4
POWER DISSIPATION (W)

1.2
75
1.0 1.136W

0.8
5.0 SO8
0.6 JA = +120°C/W
AVV==+1+1
A
2.5 RFF==0
R 0 0.4
RLL==500
R 500
CLL==5pF
C 5pF 0.2

0 0
0 3 6 9 12 15 0 25 50 75 85 100 125 150
SUPPLY VOLTAGES (±V)
AMBIENT TEMPERATURE (°C)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE

FN6200 Rev 3.00 Page 7 of 12

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ISL55001

Product Description setting is greater than 1, the gain resistor RG can then
be chosen to make up for any gain loss which may be
The ISL55001 is a wide bandwidth, low power, and low
created by the additional series resistor at the output.
offset voltage feedback operational amplifier. This device
is internally compensated for closed loop gain of +1 or When used as a cable driver, double termination is
greater. Connected in voltage follower mode and driving always recommended for reflection-free performance.
a 500 load, the -3dB bandwidth is around a 220MHz. For those applications, a back-termination series resistor
Driving a 150 load and a gain of 2, the bandwidth is at the amplifier's output will isolate the amplifier from the
about 90MHz while maintaining a 300V/µs slew rate. cable and allow extensive capacitive drive. However,
other applications may have high capacitive loads
The ISL55001 is designed to operate with supply voltage
without a back-termination resistor. Again, a small series
from +15V to -15V. That means for single supply
resistor at the output can help to reduce peaking.
application, the supply voltage is from 0V to 30V. For split
supplies application, the supply voltage is from ±15V. Output Drive Capability
The amplifier has an input common-mode voltage range The ISL55001 does not have internal short circuit
from 1.5V above the negative supply (VS- pin) to 1.5V protection circuitry. It has a typical short circuit current of
below the positive supply (VS+ pin). If the input signal is 140mA. If the output is shorted indefinitely, the power
outside the above specified range, it will cause the output dissipation could easily overheat the die or the current
signal to be distorted. could eventually compromise metal integrity. Maximum
The outputs of the ISL55001 can swing from -12.75V to reliability is maintained if the output current never
+13.4V for VS = ±15V. As the load resistance becomes exceeds ±60mA. This limit is set by the design of the
lower, the output swing is lower. internal metal interconnect. Note that in transient
applications, the part is robust.
Choice of Feedback Resistor and Gain
Bandwidth Product Short circuit protection can be provided externally with a
back match resistor in series with the output placed close
For applications that require a gain of +1, no feedback as possible to the output pin. In video applications this
resistor is required. Just short the output pin to the would be a 75 resistor and will provide adequate short
inverting input pin. For gains greater than +1, the circuit protection to the device. Care should still be taken
feedback resistor forms a pole with the parasitic not to stress the device with a short at the output.
capacitance at the inverting input. As this pole becomes
smaller, the amplifier's phase margin is reduced. This Power Dissipation
causes ringing in the time domain and peaking in the With the high output drive capability of the ISL55001, it
frequency domain. Therefore, RF can't be very big for is possible to exceed the +150°C absolute maximum
optimum performance. If a large value of RF must be junction temperature under certain load current
used, a small capacitor in the few Pico Farad range in conditions. Therefore, it is important to calculate the
parallel with RF can help to reduce the ringing and maximum junction temperature for an application to
peaking at the expense of reducing the bandwidth. For determine if load conditions or package types need to be
gain of +1, RF = 0 is optimum. For the gains other than modified to assure operation of the amplifier in a safe
+1, optimum response is obtained with RF with proper operating area.
selection of RF and RG (see Figures 15 and 16 for
The maximum power dissipation allowed in a package is
selection).
determined according to Equation 1:
Video Performance T JMAX – T AMAX
PD MAX = --------------------------------------------- (EQ. 1)
For good video performance, an amplifier is required to  JA
maintain the same output impedance and the same
frequency response as DC levels are changed at the Where:
output. This is especially difficult when driving a standard
video load of 150, because of the change in output • TJMAX = Maximum junction temperature
current with DC level. The dG and dP of this device is • TAMAX = Maximum ambient temperature
about 0.01% and 0.05°, while driving 150 at a gain
of 2. Driving high impedance loads would give a similar • JA = Thermal resistance of the package
or better dG and dP performance. The maximum power dissipation actually produced by an
Driving Capacitive Loads and Cables IC is the total quiescent supply current times the total
power supply voltage, plus the power in the IC due to the
The ISL55001 can drive 47pF loads in parallel with 500 load, or: For sourcing use Equation 2:
with less than 3dB of peaking at gain of +1 and as much
n
as 100pF at a gain of +2 with under 3db of peaking. If V OUTi
less peaking is desired in applications, a small series PD MAX = (V S + – V S -   I SMAX +   VS + – V OUTi   --------------------
R LOADi
-
resistor (usually between 5 to 50) can be placed in i=1
series with the output to eliminate most peaking. (EQ. 2)
However, this will reduce the gain slightly. If the gain

FN6200 Rev 3.00 Page 8 of 12

Nov 3, 2009
ISL55001

For sinking use Equation 3: capacitor from VS+ to GND will suffice. This same
n capacitor combination should be placed at each supply
V OUTi
PD MAX = (V S + – V S -   I SMAX +   VOUTi – VS -   --------------------
R LOADi
- pin to ground if split supplies are to be used. In this case,
i=1 the VS- pin becomes the negative supply rail.
(EQ. 3) Printed Circuit Board Layout
Where: For good AC performance, parasitic capacitance should
be kept to minimum. Use of wire wound resistors should
• VS+ = Positive supply voltage
be avoided because of their additional series inductance.
• VS- = Negative supply voltage Use of sockets should also be avoided if possible. Sockets
add parasitic inductance and capacitance that can result
• ISMAX = Maximum quiescent supply current
in compromised performance. Minimizing parasitic
• VOUT = Average output voltage of the application capacitance at the amplifier's inverting input pin is very
important. The feedback resistor should be placed very
• RLOAD = Load resistance tied to ground close to the inverting input pin. Strip line design
• ILOAD = Load current techniques are recommended for the signal traces.

• n = number of amplifiers (n = 1 for ISL55001) Application Circuits

By setting the two PDMAX equations (Equations 1, 2 or 3)
Sallen-Key Low Pass Filter
equal to each other, we can solve the output current and
RLOAD to avoid the device overheat. A common and easy to implement filter taking advantage
of the wide bandwidth, low offset and low power
Power Supply Bypassing Printed Circuit demands of the ISL55001. A derivation of the transfer
Board Layout function is provided for convenience (see Figure 25).
As with any high frequency device, a good printed circuit Sallen-Key High Pass Filter
board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power Again this useful filter benefits from the characteristics of
supply pin must be well bypassed to reduce the risk of the ISL55001. The transfer function is very similar to the
oscillation. For normal single supply operation, where the low pass so only the results are presented (see
VS- pin is connected to the ground plane, a single 4.7µF Figure 26).
tantalum capacitor in parallel with a 0.1µF ceramic

Holp  K
V2
5V 1
C5
wo 
R 1C 1 R 2 C 2
1nF
C1 1
Q 
R 1C 1 R 1C 2 R 2C 2
R1 R2
1nF (1  K )  
V+
R 2C 2 R 2C 1 R 1C 1
+ VOUT
V1 1k 1k C2
1nF R7
- V- 1k
RB

1k
RA C5 K
1k Holp 
1nF
4K
2
V3
5V
wo 
RC
2
Q 
4K
FIGURE 25. SALLEN-KEY LOW PASS FILTER

FN6200 Rev 3.00 Page 9 of 12

Nov 3, 2009
ISL55001

V2
5V
Holp  K
C5 1
wo 
R 1 C 1 R 2C 2
1nF
R1 1
Q 
C2 1k R 1C 1 R 1C 2 R 2C 2
(1  K )  
C1 1nF R 2C 2 R 2C 1 R 1C 1
+ V+
VOUT
V1 1nF R2
1k R7 Equations simplify if we let
- V- 1k
all components be equal R = C
RB
K
1k Holp 
RA C5 4 K
1k
2
1nF
wo 
RC
V3 2
5V Q 
4  K

FIGURE 26. SALLEN-KEY HIGH PASS FILTER

Differential Output Instrumentation coupled noise and ground potential errors inherent in
Amplifier remote transmission. This configuration also provides
enhanced bandwidth, wider output swing and faster slew
The addition of a third amplifier to the conventional three
rate than conventional three amplifier solutions with only
amplifier instrumentation amplifier introduces the
the cost of an additional amplifier and few resistors (see
benefits of differential signal realization, specifically the
Figure 27).
advantage of using common-mode rejection to remove

A1
e1 R3 R3
+
-

A3
R2 eo
- e o3 = –  1 + 2R 2  R G   e 1 – e 2  e o4 =  1 + 2R 2  R G   e 1 – e 2 
+
+
e o = – 2  1 + 2R 2  R G   e 1 – e 2 
R3 R3
2f C1 2
RE BW = ------------------ A Di = – 2  1 + 2R 2  R G 
RG eo A Di
R3 R3

A4
R2 -
+
-
eo
A2
R3 R3
-
e2 +

FIGURE 27. DIFFERENTIAL OUTPUT INSTRUMENTATION AMPLIFIER

FN6200 Rev 3.00 Page 10 of 12

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ISL55001

Strain Gauge to increasing strain, its resistance changes, resulting in

The strain gauge is an ideal application to take an imbalance in the bridge. A voltage variation from
advantage of the moderate bandwidth and high the referenced high accuracy source is generated and
accuracy of the ISL55001. The operation of the circuit translated to the difference amplifier through the buffer
is very straightforward. As the strain variable stage. This voltage difference as a function of the strain
component resistor in the balanced bridge is subjected is converted into an output voltage (see Figure 28).

+V
2
5V
-
C6
VARIABLE
SUBJECT TO 1nF

1k
V5 + R15 R16 R17 1k
V+
+
0V 1k 1k
- R18 1k VOUT
RL
- V- (V1+V2+V3+V4)
1k 1k
RF

1k
C12

1nF
+
V4
- 5V

FIGURE 28. STRAIN GAUGE AMPLIFIER

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For information regarding Intersil Corporation and its products, see www.intersil.com

FN6200 Rev 3.00 Page 11 of 12

Nov 3, 2009
ISL55001

Package Outline Drawing

M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09

4
4.90 ± 0.10 A
DETAIL "A" 0.22 ± 0.03

6.0 ± 0.20

3.90 ± 0.10

PIN NO.1
ID MARK

(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27

0.25 M C A B
SIDE VIEW “B”
TOP VIEW

1.75 MAX
1.45 ± 0.1

0.25
GAUGE PLANE
C
0.175 ± 0.075 SEATING PLANE
0.10 C
SIDE VIEW “A

0.63 ±0.23

DETAIL "A"
(1.27) (0.60)

NOTES:
(1.50)
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.

2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.

(5.40) 3. Unless otherwise specified, tolerance : Decimal ± 0.05

4. Dimension does not include interlead flash or protrusions.

Interlead flash or protrusions shall not exceed 0.25mm per side.

5. The pin #1 identifier may be either a mold or mark feature.

6. Reference to JEDEC MS-012.

TYPICAL RECOMMENDED LAND PATTERN

FN6200 Rev 3.00 Page 12 of 12

Nov 3, 2009
Mouser Electronics

Authorized Distributor

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