ECTE212 Electronics

Lecture 13: FET Amplifiers (Cont)

& Power Amplifiers

Dr. Le Chung Tran

Email: [email protected]
Room: 35.138A. Ext: 3846
Consultation: 14.00 am – 16.00 pm,
Wednesdays & Fridays

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 This Lecture
FET AC analysis
• Hybrid-π model of DMOSFET and EMOSFET
• AC analysis of EMOSFET amplifiers (CS configuration)
– Example: CS voltage divider
Power amplifiers
• Classification (A, AB, B, C and D)
• Class-A amplifier (Serial-fed, Transformer-Coupled)
• Class-B and class-AB amplifiers (Push-pull, Quasi- Complementary
Push Pull)
Exam overviews
Appendices

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 D-Type MOSFET AC Equivalent

Hybrid-π model of DMOSFET (both n-channel and p-channel) is

exactly the same as that of JFET

The only different is VGS can be negative or positive

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 E-Type MOSFET AC Equivalent
I D = k(VGS − VGS(Th) ) 2
ΔI D
gm =
ΔVGS
g m = 2k(VGS − VGS(Th) )

gm and rd can be found

in the specification
sheet for the FET in
the form of the form of
the forward transfer Hybrid-π model of EMOSFET is
admittance yfs and exactly the same as that of JFET and
output admittance DMOSFET. The difference is that the
yos, respectively. input voltage should be Vgs>VGS(Th)>0.

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 EMOSFET CS Voltage-Divider Bias

Note: we may also use notations

- FET output resistance: ro
- Input impedance: Rin
- Output impedance: Rout
- Voltage gain (ignoring the effects of
Rsig and RL): Avo

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 Calculations

Input impedance:
Z i = R 1 || R 2

Output impedance:
Z o = rd || R D

Zo ≅ R D AC analysis and results

rd ≥10R D
(Zi, Zo and Av) are exactly
the same for DMOSFET
Voltage gain: (and the same as JFET)
Vo − g m Vgs (rd || R D ) in the same voltage-
Av = = = −g m (rd || R D )
Vi Vgs divider bias configuration.
See Slides 30 & 31,
A v ≅ − g m R D rd ≥ 10R D Lecture 12.

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 Power Amplification - Introduction
• Usually used to deliver a large amount of power (typically from
8W for speakers to 300W for antennas) to a low resistance load
(typically some Ω for speakers to some hundreds Ω for antennas)
• In practice, a power amplifier cannot provide 100% of the power it
draws from the DC supply, because all components in the circuit
dissipate some power

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 Power Amplification - Introduction
In small-signal amplifiers the main factors are mainly considered:
• Amplification types (typically voltage amplification)
• Linearity (or distortion level)
• Gain
Since large-signal, or power, amplifiers handle relatively large voltage
signals and current levels, the main factors are:
• Efficiency (in turns, power amplification classes)
• Maximum power capability (power rating, typically 1W or more)
• Impedance matching to the output device (e.g. 8Ω for audio
speaker, 75 Ω or 300 Ω for antennas)

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 Amplifier Types
Class A (Fig. a)
- Amplifier conducts full 360° of the input.
- Q-point is set (by the DC bias voltage)
near the middle of the load line.
Class B (Fig. b)
- Amplifier conducts 180° (half-cycle).
- Q-point is set at the cutoff point.
- Two class-B operations – one provides
the positive half-cycle and the other
provides the negative half – are required
to preserve the input signal shape.
Class AB (Fig. c)
-Compromise between the class-A and -B amplifiers.
- Conduct somewhere between 180° and 360°
- Q-point is located between the mid-point and cutoff.
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 Amplifier Types
Class C (Fig. d)
- Conducts less than 180o.
- Q-point is located below the cutoff level.
- Class C is usually not used for delivering large amounts of power, but usually
used in tuned (resonant) circuits in radio and communication (radiating
Electromagnetic wave)
Class D
Amplifier is biased
especially for digital
signals.
Amplifier is on for one
duration, off for another
duration, thus it just
consumes the DC
power when it is on, i.e.
high efficiency.

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 Class-A Amplifier
The output of a class A amplifier
conducts for the full 360° of the
cycle.

The Q-point is set at the middle of

the load line so that the AC signal
can swing a full cycle.

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 Class-B Amplifier
A class B amplifier IC IC
output only conducts
for 180° or one-half of
the AC input signal.

VCE
IB

The Q-point is at ICQ = 0 mA on the load line, so that

the AC signal can only swing for one-half cycle.
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 Class AB Amplifier

This amplifier is a compromise between the class A and class B

amplifier—the Q-point is above that of the Class B but below the class A.

The output conducts between 180° and 360° of the AC input signal.
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 Class C
The output of the class C
conducts for less than 180°
of the AC cycle. The Q-point
is below cutoff.

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 Amplifier Efficiency

Efficiency refers to the ratio of output to input power

Load power (Po(ac) )
η=
Supply power (Pi(dc) )
From the table, the lower the amount of conduction of the amplifier,
- the higher the efficiency, and
- the higher the distortion

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 Series-Fed Class-A Amplifier
This is similar to the small-signal
amplifier except that it will handle
higher voltages. The transistor
used is a high-power transistor.

DC equations revisited
VCC − 0.7
IB=
RB
I C = βI B

VCE = VCC − I C R C (DC load line)

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 Series-Fed Class-A Amplifier
A small input signal causes
the output voltage to swing
from 0V to a maximum of
Vcc.
The current can also swing
from 0mA to VCC/RC.
Denote ICSAT = VCC/RC

maximumVce(p− p) = VCC
VCC
maximum I c(p− p) =
RC
VCC
I CQ =
2R C

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 Series-Fed Class A Amplifier
Input Power
The power into the amplifier is from the DC supply
Pi(dc) = VCC I CQ = VCC (VCC /2R C )

Output Power Po(ac) = Vce(rms) I c(rms) =

V 2
ce(rms)
=
(V
ce(p - p) /2 2 )
2

RC RC

Max Output Power Po(ac) = V 2 CC / 8R C

Po(ac)
Efficiency η= ×100 (%)
Pi(dc)
Po(ac) VCC2
/8R C
Max Efficiency η= × 100 = × 100 = 25%
Pi(dc) VCC (VCC /2R C )

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 Transformer-Coupled Class-A Amplifier

Series-fed amplifier has low efficiency

as the max Vce(p-p) is limited by VCC (Q is
in the middle of the DC load line - VCEQ
= VCC/2)
Transformer makes RC ≈ 0 (the DC
internal resistance of the primary).
DC load line is now in parallel with the
vertical axis, thus VCEQ = VCC and now DC load line
the max Vce(p-p) ≈2 VCC
Q Q’
This improves the efficiency of the
Class A to twice that of the previous
amplifier, i.e. 50%.

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 Transformer Action
V2 N 2
Voltage ratio =
V1 N1

I 2 N1
=
Current ratio I1 N 2

Denote the AC impedances of the

primary and secondary are R’L and RL
respectively

Impedance ratio
2
R ′L V1 / I1 V1 I 2 ⎛ N1 ⎞
= = = ⎜⎜ ⎟⎟
R L V2 / I 2 V2 I1 ⎝ N 2 ⎠

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 Transformer-Coupled Class-A Amplifier

DC Load Line
Due to the extremely low DC load
resistance, DC load line is parallel
with IC-axis.
Q-point
Intersection between the DC load
line and the IB-curve determined by
the circuit

AC Load Line
Drawn by the -1/R’L slope through Q point. Intersections with 2 axes:
Icmax =Vcc/R′L and V2= 2VCC if Q is in the middle of AC load line. This
almost doubles the maximum output swing, thus doubling the efficiency
(theoretically 50%).

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 Transformer-Coupled Class-A Amplifier

Signal Swing and Output AC Power

The voltage swing: Vce(p− p) = Vcemax − Vcemin

The current swing: I c(p-p) = I cmax − I cmin

The AC power:
Vce(p-p) I c(p-p)
Po(ac) = Vce(rms) I c(rms) =
2 2 2 2

(Vcemax − Vcemin )(I cmax − I cmin )

Po(ac) = Vce(rms) I c(rms) =
8

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 Efficiency
Power input from the DC source:

Pi(dc) = VCC I CQ

Power dissipated as heat across the transistor:

Note: The larger the output signal,
PQ = Pi(dc) − Po(ac)
the lower the heat dissipation.

Maximum efficiency:
2
⎛ Vcemax − Vcemin ⎞ Note: The larger Vcemax and smaller
%η = 50⎜⎜ ⎟⎟ Vcemin, the closer the efficiency
⎝ Vcemax + Vcemin ⎠ approaches the theoretical
maximum of 50%.

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 Class B Amplifier

Transistor is biased just to

be off, and only on when
the AC signal is applied.

The transistor only

conducts when it is turned
on by one-half of the AC
cycle (sort of rectifier).

To get a full AC cycle, 2 transistors are needed. Typically, use the

complementary configuration:
• One npn transistor provides one half of the AC cycle
• One pnp transistor provides the other half of the AC cycle
This configuration is call the push-pull circuit

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 Class B Amplifier: Efficiency
2 2
The output power Vo(rms) VL(p)
Po(ac) = =
RL 2R L
2
VCC
The max output power Po(ac) = (when VL(p)=VCC)
2R L
2 2V (p)
The DC current I dc(max) = I L (p) = L
π πR L
⎛ 2V (p) ⎞ 2V V (p)
The input (DC) power Pi(dc) = VCC I dc = VCC ⎜⎜ L ⎟⎟ = CC L
⎝ πR L ⎠ πR L
Efficiency of a class B is
Po(ac) π VL (p)
η= ×100 = ×100 (% )
Pi(dc) 4 VCC

Maximum efficiency of a class B

π VCC π
η= ×100 = × 100 = 78.5%
4 VCC 4
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 Class-B Amplifier Circuits
• Center-tapped transformer on the
input produces opposite polarity
voltages to the two transistor inputs.
Same npn BJTs can be used.
– Positive half-cycle: Q1 is on, Q2 is
off.
– Negative half-cycle: Q2 is on, Q1
is off.

• Complementary configuration (one

npn BJT and one pnp BJT) is used.
No need for the transformer.

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 Crossover Distortion
Due to Q1 and Q2 do not turn on and
off exactly at the same time
Overcome: biasing two BJTs with a
slightly non-zero DC current. When
vi=0 or small, both BJTs are on. When
vi is larger, only one BJT is on at a
time. This is actually a class-AB
amplifier

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 Transformer-Coupled Push-Pull Amplifier

• Positive half-
cycle: Q1 is on,
Q2 is off.

• Negative half-
cycle: Q2 is on,
Q1 is off.

Each transistor produces one-half of an AC cycle. The transformer

combines the two outputs to form a full AC cycle.

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 Quasi-Complementary Push-Pull Amplifier
ƒ (Q1, Q3) is a Darlington pair –
equivalent to a super npn BJT
(see Lecture 9)
ƒ (Q2, Q4) is a feedback pair –
equivalent to a super pnp BJT
(see Lecture 9)
ƒ Darlington and feedback pairs
increases the output power
capability.
ƒ Both have low output impedance,
that is suitable with the load (e.g.
speakers – some Ω - or coaxial
cable - 75Ω)

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 Exam Overview (1)

ƒ Time 3 hours 15 minutes

ƒ Final Exam Weight: 65%
ƒ Part A (Daniel’s part) – 50 Marks - 3 questions. Use separate
booklet for your answers
ƒ Part B (My part) – 50 Marks - 3 questions. Use separate
booklet for your answers
ƒ Each question might include multiple sections
ƒ Any assumption made by you should be recorded with your
answer
ƒ Exam papers must be written in ink. Papers written in pencil
will not be marked (School Policy)

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 Exam Overview (2)

ƒ The following list of content is for your reference. Note that it

might not be the comprehensive list of content covered in the
exam
ƒ Shockley equation for diode. Using it to calculate (DC) current
through the diode from the (DC) voltage across the diode.

(
I = IS e VDiode nVT
)
− 1 ≅ ISe VDiode nVT

ƒ Collector feedback bias configuration analysis for BJT. Also

revise Question 6 in Tutorial 8, Question 2 in Tutorial 13.
ƒ Voltage-divider bias configuration for BJT. Approximation
condition and approximation analysis. Advantages of this bias
configuration compared to fix-biased configuration. Also revise
Question 5 in Tutorial 8.

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 Exam Overview (3)

ƒ The content list (cont.)

ƒ Hybrid-π model of BJT. Calculation of parameters gm, rπ and ro.
Early voltage. Revise Question 1 in Tutorial 9.
ƒ AC small signal, low frequency analysis of a BJT amplifier. Find the
AC equivalent circuit from the original circuit of the BJT amplifier
(don’t need to calculate Zi, Zo and Av). Revise Question 1 in
Tutorial 9.
ƒ Self-bias configuration of a JFET circuit. Its analysis in DC operation
(calculate VGS, ID and VDS). Also revise Tutorial 11 and 12
ƒ Hybrid-π model of DMOSFET. Given gm, and ro, draw the AC
equivalent circuit of the original DMOSFET amplifier. Calculate Rin,
Rout and Avo when ignoring the effects of Rsig and RL. Revise
Question 1 in Tutorial 13.

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 Summary
FET AC analysis
• Hybrid-π model of DMOSFET and EMOSFET
• AC analysis of EMOSFET amplifiers (CS configuration)
– Example: CS voltage-divider amplifier
Power amplifiers
• Classification (A, AB, B, C and D)
• Class-A amplifier (Serial-fed, Transformer-Coupled)
• Class-B & class-AB amplifiers (Push-pull, Quasi-Complementary
Push Pull)
Exam overviews
Appendices

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 Appendix: FET Bias

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 Appendix: FET Bias

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