EXPERIMENT – 1

AIM: To plot the characteristic curve between current and time, voltage and
time in a RLC circuit in three different conditions:

(i)Over damped

(ii)Critically damped

(iii)Under damped

SOFTWARE USED:

MATLAB SIMULINK 2010

THEORY:

Discre te ,
Ts = 5e -005 s.

powe rgui

Scope
+ -i

RESISTOR C urrent Measurement

INDUC TOR

+
DC Voltage Source C APAC ITOR - v
Voltage Measurement

Consider a series RLC circuit (one that has a resistor, an inductor and a
capacitor) with a constant driving electro-motive force (emf) E. The KVL
equation for the circuit is

-V L + V R + V C = E

L(di/dt) + iR + 1/C∫Idt = E
 where V R, VL and VC are the voltages across R, L and C respectively
and V(t) is the time-varying voltage from the source.

Three condition arise in RLC Circuits :

(i) UNDER DAMPED : R2< (4L/C)

(ii) CRITICALLY DAMPED : R2 = (4L/C)

(iii) OVER DAMPED : R2 > (4L/C)

CIRCUIT DIAGRAM:
Discre te ,
Ts = 5e -005 s.

powe rgui

Scope
+ -i

RESISTOR C urrent Measurement

INDUC TOR

+
DC Voltage Source C APAC ITOR - v
Voltage Measurement

SIMULATION RESULT:

1. UNDERDAMPED:
Values-
R=1Ω, L= 1H, C= 1F
 60

50

40
current(Ampere)

30

20

10

-10
0 2 4 6 8 10 12
time(second)

Fig. 1. Current through inductor for under damped condition

120

100

80
voltage(V)

60

40

20

0
0 5 10 15
time(second)

Fig. 2 Voltage across capacitor for under damped condition

 2. CRITICALLY DAMPED:
R= 2Ω, L=1H , C=1F

35

30

25
current(A)

20

15

10

0
0 2 4 6 8 10 12
time(second)

Fig. 3 Current through inductor for critically damped condition

120

100

80
voltage (V)

60

40

20

0 1 2 3 4 5 6 7 8 9 10 11
time second)

Fig. 4 Voltage across capacitor for critically damped condition

3. OVER DAMPED
R= 8Ω , L= 1H, C= 1F

12

10
CURRENT(A)

0
0 5 10 15 20 25 30 35 40 45 50
TIME(SECOND)

Fig. 5 Current through inductor for overdamped condition

100

80
VOLTAGE(V)

60

40

20

0
0 5 10 15 20 25 30 35 40 45 50
TIME(SECOND)

Fig. 6 Voltage across capacitor for over damped condition

 EXPERIMENT-2

AIM:

To plot the characteristic curve between current and time, voltage and time in
Series RLC circuit, when the inductor is having some initial current and the
capacitor is with some initial voltage in three different conditions:

(i)Over damped

(ii)Critically damped

(iii)Under damped

SOFTWARE USED:

MATLAB SIMULINK 2010

THEORY:

Discre te ,
Ts = 5e -005 s.

powe rgui

Scope
+ -i

RESISTOR C urrent Measurement

INDUC TOR

+
DC Voltage Source C APAC ITOR - v
Voltage Measurement
Consider a series RLC circuit (one that has a resistor, an inductor and a
capacitor) with a constant driving electro-motive force (emf) E. The KVL
equation for the circuit is

VL + VR + VC = E

L(di/dt) + iR + 1/C∫Idt = E

where V R, VL and VC are the voltages across R, L and C respectively

and V(t) is the time-varying voltage from the source.

Three condition arise in RLC Circuits :

(i) UNDER DAMPED : R2< (4L/C)

(ii) CRITICALLY DAMPED : R2 = (4L/C)

(iii) OVER DAMPED : R2 > (4L/C)

CIRCUIT DIAGRAM:

Discre te ,
Ts = 5e -005 s.

powe rgui

Scope
+ -i

RESISTOR C urrent Measurement

INDUC TOR

+
DC Voltage Source C APAC ITOR - v
Voltage Measurement
OBSERVATIONS:

1.OVER DAMPED:

R= 8Ω, L=1H , C=1F

INITIAL VOLTAGE=10V

INITIAL CURRENT=10A

12

10
current(A)

0
0 5 10 15 20 25 30 35 40 45 50
time(second)

Fig. 1 Current through inductor for overdamped condition

100

80
voltage(V)

60

40

20

0 5 10 15 20 25 30 35 40 45 50
time(Second)

Fig. 2 Voltage across capacitor for over damped condition

2.CRITICALLY DAMPED:

R= 2Ω, L=1H , C=1F

INITIAL VOLTAGE=10V

INITIAL CURRENT=10A

35

30

25
CURRENT(A)

20

15

10

0
0 2 4 6 8 10 12
TIME(SECOND)

Fig. 3 Current through inductor for critically damped condition

 100

80
voltage(V)

60

40

20

0 2 4 6 8 10 12
TIME(S)

Fig. 4 Voltage across capacitor critically damped condition

3.UNDER DAMPED

R=1Ω, L= 1H, C= 1F

INITIAL CURRENT=10A

INITIAL VOLTAGE=10V

50

40

30
current(A)

20

10

-10
0 5 10 15
time(second)

Fig. 5 current through inductor for under damped condition

 120

100

80
voltage (V)

60

40

20

0
0 5 10 15
time(second)

Fig. 6 Voltage through capacitor for under damped condition

EXPERIMENT - 3

AIM: To plot graph of voltage and current with respect to time in a R-L circuit
and RC circuit.

SOFTWARE USED:

MATLAB SIMULINK 2010

CIRCUIT DIAGRAM:

L= 1 F, R= 1Ω V=100V

Discre te ,
Ts = 5e -005 s.

powe rgui

i
+ -

RESISTOR C urrent Measurement

INDUC TOR

Scope
DC VOLTAGE SOURC E
+
v -

Voltage Measurement
THEORY:

The RL circuit shown above has a resistor and an inductor connected in series
.A constant voltage V is applied when the switch is closed.
The (variable) voltage across the resistor is given by :
VR=iR
The (variable) voltage across the inductor is given by :
VL=L di/dt
Kirchhoff’s voltage law says that the directed sum of the voltage around a
circuit must be zero .This results in the following differential equation:
Ri +L di/dt =V
Once the switch is closed , the current in the circuit is not constant Instead,it
will build up from zero to some steady state

OBSERVATIONS:

100

80
Current ( A )

60

40

20

0
0 1 2 3 4 5 6 7 8 9 10
Time ( second )

Fig. 1 current through inductor with respect to time

 100

80
Voltage ( V )

60

40

20

0
0 1 2 3 4 5 6 7 8 9 10
Time ( second )

Fig. 2 voltage across inductor with respect to time

3. FOR RC CIRCUIT:
CIRCIT DIAGRAM:

Discre te ,
Ts = 5e -005 s.

powe rgui

i
+ -

RESISTOR C urrent Measurement

C APAC ITOR

Scope
DC VOLTAGE SOURC E
+
v -

Voltage Measurement

THEORY:

In an RC circuit, the capacitor stores energy between a pair of plates. When

voltage is applied to the capacitor, the charge builds up in the capacitor and the
current drops off to zero.
The voltage across the resistor and capacitor are as follows:
VR=Ri
And
VC=1/C (∫idt)
Kirchhoff’s voltage law says the total voltages must be zero. So applying this
this Law to a series RC circuits results in the equation
Ri +1/C ʃidt = V
One way to solve this equation is to convert it into a Differential equation, by
differentiating throughout with respect to t:
R di/dt +i/C= 0
Solving the equation gives us:
i=V/Re-t/RC

OBSERVATIONS:
 100

80
current(A)

60

40

20

0
0 1 2 3 4 5 6 7 8 9 10
Time(second)

Fig.3 current through capacitor

100

80
voltage(V)

60

40

20

0
0 1 2 3 4 5 6 7 8 9 10
time(second)

Fig. 4 voltage across capacitor

EXPERIMENT-4

AIM - To plot the graph between voltage and current with time in RLC
parallel.

Apparatus required:
MATLAB SIMULINK 2010
CIRCUIT DIAGRAM:
 Discrete,
Ts = 5e-005 s.

powergui
Scope1

i
+ -
I

+
v
-
C APAC ITOR
RESISTOR V

AC C urrent Source INDUC TOR

i
+ -
I1

+
v
-
C APAC ITOR 1
RESISTOR1 V1

AC C urrent Source1 INDUC TOR1

Scope
i
+ -

I2

+
v
-
C APAC ITOR 2
RESISTOR2 V2

AC C urrent Source2 INDUC TOR2

Theory-

Consider a RLC circuit in which resistor, inductor and capacitor are connected
in parallel to each other.
This parallel combination is supplied
by voltage supply, VS. This parallel
RLC circuit is exactly opposite to
series RLC circuit. In series RLC
circuit, the current flowing through
all the three components i.e the
resistor, inductor and capacitor
remains the same, but in parallel
circuit, the voltage across each
element remains the same and the current gets divided in each component
depending upon the impedance of each component. That is why parallel RLC
circuit is said to have dual relationship with series RLC circuit.
 1 𝑗𝑤𝐶
𝑌= + +jwL
𝑅 1+𝑗𝑤𝐶𝑅

The total current, IS drawn from the supply is equal to the vector sum of the
resistive, inductive and capacitive current, not the mathematic sum of the three
individual branch currents, as the current flowing in resistor, inductor and
capacitor are not in same phase with each other; so they cannot be added
arithmetically. Apply Kirchhoff's current law, which states that the sum of
currents entering a junction or node, is equal to the sum of current leaving that
node we get,

𝐼𝑆2 = 𝐼𝑅2 + (𝐼𝐿 − 𝐼𝐶 )2

200
Over Damped
Critically Damped
150
Under Damped

100

50
Voltage(V)

-50

-100

-150

-200

-250
0 5 10 15 20 25 30 35 40 45 50
Time(s)

Figure 1 voltage across capacitor

 50 overdamped
critically damped
underdamped
current (A)

-50
0 5 10 15 20 25 30 35 40 45 50
time(sec)

Figure 2 current through inductor

EXPERIMENT NO -5

AIM: To verify superposition theorem.

SOFTWARE USED : MATLAB SIMULINK 2010

THEORY:

The superposition theorem for electrical circuits states that for a linear system
the response (voltage or current) in any branch of a bilateral linear
circuit having more than one independent source equals the algebraic sum of the
responses caused by each independent source acting alone, where all the other
independent sources are replaced by their internal impedances.

CIRCUIT DIAGRAM AND OBSERVATIONS:

DC VOLTAGE SOURCE 1= 100V

DC VOLTAGE SOURCE 2= 150V

R1= 10 Ω

R2= 10 Ω

R3= 10 Ω
 Continuous

powe rgui R1 R2

R3 DC Voltage Source 2
DC
VOLTAGE SOURC E

i +
C urrent Measurement

-
8.333

Display

Current passing through R3(I)= 8.333 A

After applying superpostion theorm:

Continuous

powe rgui
R1 R2

R3 DC Voltage Source 2
i +

C urrent Measurement
-

Display

Figure 3 Shorting dc voltage source 1

Current through R3 (Ia=5A)

 C ontinuous

powe rgui
R1 R2

R3
DC
VOLTAGE SOURC E

- +
C urrent Measurement

i 3.333

Display

Figure 4 Shorting voltage source 2

Current through R3 (Ib=3.33A)

Calculation:

IA+IB=I

RESULT: The superposition theorem is verified.

EXPERIMENT NO: 6

Aim: To verify Thevenin theorem.

Software used : Matlab 2010

THEORY:

Thevenin theorem states that any linear electrical network with voltage and
current sources and resistances only can be replaced at terminals A-B by an
equivalent voltage source VTH in series connect with an equivalent resistance rth

To calculate Vth:

 The equivalent voltage Vth is the voltage obtained at terminals A-B of the
network with terminals A-B open circuited.

To calculate Rth :
 The equivalent resistance Rth is the resistance that the circuit between
terminals A and B would have if all ideal voltage sources in the circuit were
replaced by a short circuit and all ideal current sources were replaced by an
open circuit.

CIRCUIT DIAGRAM AND OBSERVATIONS:

V1 =100 V

R1 = 10 Ω

R2 = 17 Ω

R3 = 15 Ω

LOAD =10Ω

C ontinuous

powe rgui
R1 R2

R3

V1 LOAD

FIG :1 MAIN CIRCUIT

Applying Thevenin theorem and measuring VTH:
 Continuous

powe rgui
R1 R2

R3

V1

+ 60
- v
Voltage Measurement Display

MEASURING Vth
VTH=60V

Calculating Rth:

We find Vth/Rth which is the current measured by ammeter

Continuous

powe rgui
R1 R2

R3

V1
C urrent
- +

Measurement
i

2.609

Display

Calculating Rth
I=2.6A

𝑅th = Vth ÷ I

𝑅𝑡ℎ = 60 ÷ 2.609

𝑅𝑡ℎ = 22.9Ω
FINAL CIRCUIT:

Continuous

powe rgui
Rth

+ v
Vth load
-
60V Voltage Measurement

C urrent Measurement1 50

i +
- Display1

Display

RESULT : THEVENIN THEOREM IS VERIFIED.

EXPERIMENT NO:7

AIM: TO VERIFY NORTON THEOREM

SOFTWARE USED: MATLAB 2010

THEORY:

Norton theorem states that in any linear electrical network with voltage and
current sources and only resistances can be replaced at terminals A-B by an
current source Ino in parallel connection with an equivalent resistance Rno .

To measure Ino:

Ino is the current obtained at terminals A-B of the network with terminals A-
B short circuited.

To measure Rno:

Rno is the resistance obtained at terminals A-B of the network with all its voltage
sources short circuited and all its current sources open circuited.

CIRCUIT DIAGRAM AND OBSERVATIONS:

V1 =100 V

R1 = 10 Ω
 R2 = 17 Ω

R3 = 15 Ω

LOAD =10Ω

C ontinuous

powe rgui
R1 R2

R3

V1 LOAD

APPLYING NORTON THEOREM AND FINDING INO:

Continuous

powe rgui
R1 R2

R3
i +

V1 C urrent Measurement
-

2.609

Display

INO=2.609A

MEASURING RTH:

RTH=R2+R3||R1(As the voltage source gets short circuited )

RTH=23 Ω

Final circuit:

I across load =2.609A

Rno=23 Ω

Figure created by converting current source into voltage source.

C ontinuous

powe rgui
Rno

LOAD
V1
60.007V

RESULT :NORTON THEOREM IS VERIFIED.