3 Video Ampop - Tda6107q

INTEGRATED CIRCUITS
DATA SHEET
TDA6107Q
Triple video output amplifier
Product specification
Supersedes data of 1999 Jun 18
File under Integrated Circuits, IC02
1999 Oct 26
Philips Semiconductors
TDA6107Q
FEATURES
Black-Current Stabilization (BCS) circuit
Typical bandwidth of 5.5 MHz for an output signal of

60 V (p-p)
Thermal protection.
High slew rate of 900 V/s
GENERAL DESCRIPTION
No external components required
The TDA6107Q includes three video output amplifiers in

one plastic DIL-bent-SIL 9-pin medium power (DBS9MPF)
package (SOT111-1), using high-voltage DMOS
technology, and is intended to drive the three cathodes of
a colour CRT directly. To obtain maximum performance,
the amplifier should be used with black-current control.
Very simple application

Single supply voltage of 200 V
Internal reference voltage of 2.5 V
Fixed gain of 50
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
TDA6107Q
DBS9MPF
DESCRIPTION
VERSION
plastic DIL-bent-SIL medium power package with fin; 9 leads
SOT111-1
BLOCK DIAGRAM
VDD
handbook, full pagewidth
6
MIRROR 5
MIRROR 1
TDA6107Q
CASCODE 1
MIRROR 4
CURRENT
SOURCE
9, 8, 7
Voc(3),
Voc(2),
Voc(1)
1
THERMAL
PROTECTION
CIRCUIT
Vi(1),
Vi(2),
Vi(3)
1, 2, 3
Rf
VIP
REFERENCE
DIFFERENTIAL
STAGE
MIRROR 3
Ri
Ra
CASCODE 2
MIRROR 2
4
MGK278
Fig.1 Block diagram (one amplifier shown).
1999 Oct 26
Io(m)
TDA6107Q
PINNING
SYMBOL
PIN
DESCRIPTION
Vi(1)
inverting input 1
Vi(2)
inverting input 2
Vi(3)
inverting input 3
GND
ground (fin)
Iom
black-current measurement output
VDD
supply voltage
Voc(3)
Voc(2)
Voc(1)
handbook, halfpage
Vi(1)
Vi(2)
Vi(3)
GND
cathode output 3
Iom
cathode output 2
VDD
cathode output 1
Voc(3)
Voc(2)
Voc(1)
TDA6107Q
MGK277
Fig.2 Pin configuration.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages measured with respect to pin 4 (ground);
currents as specified in Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VDD
supply voltage
250
Vi
input voltage at pins 1 to 3
12
Vo(m)
measurement output voltage
Vo(c)
cathode output voltage
VDD
Tstg
storage temperature
55
+150
Tj
junction temperature
20
+150
Ves
electrostatic handling
Human Body Model (HBM)
2000
Machine Model (MM)
300
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see Handling MOS Devices ).
QUALITY SPECIFICATION
Quality specification SNW-FQ-611 part D is applicable and can be found in the Quality reference Handbook.
The handbook can be ordered using the code 9397 750 00192.
1999 Oct 26
TDA6107Q
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
Rth(j-a)
thermal resistance from junction to ambient
Rth(j-fin)
thermal resistance from junction to fin
Rth(h-a)
thermal resistance from heatsink to ambient
VALUE
note 1
UNIT
56
K/W
11
K/W
18
K/W
Note
1. An external heatsink is necessary.
Thermal protection
The internal thermal protection circuit gives a decrease of
the slew rate at high temperatures: 10% decrease at
130 C and 30% decrease at 145 C (typical values on the
spot of the thermal protection circuit).
MBH989
handbook, halfpage
Ptot
(W)
(1)
(2)
handbook, halfpage
outputs
5 K/W
thermal protection circuit
0
40
40
80
6 K/W
120
160
Tamb (C)
fin
MGK279
(1) Infinite heatsink.

(2) No heatsink.
Fig.4 Equivalent thermal resistance network.
Fig.3 Power derating curves.
1999 Oct 26
TDA6107Q
CHARACTERISTICS
Operating range: Tj = 20 to +150 C; VDD = 180 to 210 V. Test conditions: Tamb = 25 C; VDD = 200 V;
Vo(c1) = Vo(c2) = Vo(c3) = 12VDD; CL = 10 pF (CL consists of parasitic and cathode capacitance); Rth(h-a) = 18 K/W
(measured in test circuit of Fig.8); unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Iq
quiescent supply current
5.9
6.9
7.9
mA
Vref(int)
internal reference voltage

(input stage)
2.5
Ri
input resistance
3.6
gain of amplifier
47.5
51.0
55.0
gain difference
2.5
+2.5
VO(c)
nominal output voltage at

pins 7, 8 and 9 (DC value)
Ii = 0 A
116
129
142
VO(c)(offset)
differential nominal output

offset voltage between
pins 7 and 8, 8 and 9 and
9 and 7 (DC value)
Ii = 0 A
Vo(c)(T)
output voltage temperature

drift at pins 7, 8 and 9
10
mV/K
mV/K
50
+50
100 A < Io(c) < 100 A;

1.5 V < Vi < 5.5 V;
3 V < Vo(m) < 6 V
0.9
1.0
1.1
at CRT discharge;
Io(c) = 1 mA;
1.5 V < Vi < 5.5 V;
3 V < Vo(m) < 5.4 V
1.0
Vo(c)(T)(offset) differential output offset

voltage temperature drift
between pins 7 and 8,
8 and 9 and 7 and 9
Io(m)(offset)
offset current of measurement Io(c) = 0 A;

output
1.5 V < Vi < 5.5 V;
3 V < Vo(m) < 6 V
Io(m)/Io(c)
linearity of current transfer
Io(c)(max)
maximum peak output current 50 V < Vo(c) < VDD 50 V

(pins 7, 8 and 9)
20
mA
Vo(c)(min)
minimum output voltage

(pins 7, 8 and 9)
Vi = 7.0 V; note 1
10
Vo(c)(max)
maximum output voltage

(pins 7, 8 and 9)
Vi = 1.0 V; note 1
VDD 15
BS
small signal bandwidth

(pins 7, 8 and 9)
Vo(c) = 60 V (p-p)
5.5
MHz
BL
large signal bandwidth

(pins 7, 8 and 9)
Vo(c) = 100 V (p-p)
4.5
MHz
1999 Oct 26
SYMBOL
PARAMETER
TDA6107Q
CONDITIONS
MIN.
TYP.
MAX.
UNIT
tPco
cathode output propagation

time 50% input to 50% output
(pins 7, 8 and 9)
Vo(c)( = 100 V (p-p) square

wave; f <1 MHz;
tr = tf = 40 ns
(pins 1, 2 and 3);
see Figs 6 and 7
60
ns
tPco
difference in cathode output

propagation time 50% input to
50% output (pins 7 and 8,
7 and 9 and 8 and 9)
Vo(c) = 100 V (p-p) square

wave; f < 1 MHz;
tr = tf = 40 ns
(pins 1, 2 and 3)
10
+10
ns
to(r)
cathode output rise time

10% output to 90% output
(pins 7, 8 and 9)
Vo(c) = 50 to 150 V square

wave; f < 1 MHz; tf = 40 ns
(pins 1, 2 and 3); see Fig.6
67
91
113
ns
to(f)
cathode output fall time

90% output to 10% output
(pins 7, 8 and 9)
Vo(c) = 150 to 50 V square

wave; f < 1 MHz; tr = 40 ns
(pins 1, 2 and 3); see Fig.7
67
91
113
ns
tst
settling time 50% input to

99% < output < 101%
(pins 7, 8 and 9)

wave; f < 1 MHz;
tr = tf = 40 ns
(pins 1, 2 and 3);
see Figs 6 and 7
350
ns
SR
slew rate between

50 V to (VDD 50 V)
(pins 7, 8 and 9)
Vi = 4 V (p-p) square wave;

f < 1 MHz; tr = tf = 40 ns
(pins 1, 2 and 3)
900
V/s
Ov
cathode output voltage

overshoot (pins 7, 8 and 9)

wave; f < 1 MHz;
tr = tf = 40 ns
(pins 1, 2 and 3);
see Figs 6 and 7
PSRR
power supply rejection ratio
f < 50 kHz; note 2
55
dB
ct(DC)
DC crosstalk between
channels
50
dB
Notes
1. See also Fig.5 for the typical DC-to-DC transfer of VI to VO(c).
2. The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage.
1999 Oct 26
TDA6107Q
MBH988
200
handbook, halfpage
Vo(c)
(V)
160
129
120
80
40
0
0
2.5
Vi (V)
Fig.5 Typical DC-to-DC transfer of VI to VO(c).
1999 Oct 26
TDA6107Q
4.04
Vi
(V)
3.08
t
2.12
tst
Ov (in %)
151
150
140
149
Vo(c)
(V)
100
60
50
t
to(r)
MGK280
tPco
Fig.6 Output voltage (pins 7, 8 and 9) rising edge as a function of the AC input signal.
1999 Oct 26
TDA6107Q
4.04
Vi
(V)
3.08
t
2.12
tst
150
140
Vo(c)
(V)
100
Ov (in %)
51
60
50
49
t
to(f)
MGK281
tPco
Fig.7 Output voltage (pins 7, 8 and 9) falling edge as a function of the AC input signal.
1999 Oct 26
TDA6107Q
External flashover protection
Dissipation
For sufficient flashover protection it is necessary to apply

an external diode and 100 resistor for each channel.
See application note Application and Product description
of TDA6107Q/N1 (report number AN96072).
Regarding dissipation, distinction must first be made

between static dissipation (independent of frequency) and
dynamic dissipation (proportional to frequency).
The static dissipation of the TDA6107Q is due to voltage
supply currents and load currents in the feedback network
and CRT.
To limit the diode current an external 1 k carbon

high-voltage resistor in series with the external diode and
a 2 kV spark gap are needed (for this resistor value, the
CRT has to be connected to the main PCB).
The static dissipation Pstat equals:

P stat = V DD I DD + 3 V O(c) I O(c)
VDD must be decoupled to GND:
Where:
1. With a capacitor >20 nF with good HF behaviour

(e.g. foil); this capacitor must be placed as close as
possible to pins 6 and 4, but definitely within 5 mm.
VDD = supply voltage

IDD = supply current
2. With a capacitor >3.3 F on the picture tube base

print.
VO(c) = DC value of cathode voltage

IO(c) = DC value of cathode current.
Switch-off behaviour
The dynamic dissipation Pdyn equals:
The switch-off behaviour of the TDA6107Q is controllable.

This is due to the fact that the output pins of the
TDA6107Q are still under control of the input pins for low
power supply voltages (approximately 30 V and higher).
P dyn = 3 V DD ( C L + C int ) f i V o(c)(p-p)

Where:
CL = load capacitance
Cint = internal load capacitance (4 pF)
Bandwidth
fi = input frequency
The addition of the flash resistor produces a decreased

bandwidth and increases rise and fall times.
Vo(c)(p-p) = output voltage (peak-to-peak value)

= non-blanking duty cycle.
The IC must be mounted on the picture tube base print to
minimize the load capacitance CL.
1999 Oct 26
10
TDA6107Q
TEST AND APPLICATION INFORMATION
VDD
C1
Vi(1)
J1
22 F
Rf
1
Ri
Vof
C2
1
Ra
C7
20 nF
Voc(1)
Iom
22 nF
C8
10 F
C10
6.8 pF
R1
2 M
C11
136 pF
R2
100 k
C13
6.8 pF
R3
2 M
C14
136 pF
R4
100 k
C16
6.8 pF
R5
2 M
C17
136 pF
R6
100 k
C9
3.2 pF
C3
Vi(2)
J2
22 F
Rf
2
Ri
Vof
C4
2
Ra
Voc(2)
Iom
22 nF
probe 1
C12
3.2 pF
C5
Vi(3)
22 F
J3
Rf
3
Ri
Vof
C6
3
Ra
Voc(3)
Iom
22 nF
probe 2
C15
3.2 pF
VIP
REFERENCE
probe 3
TDA6107Q
Vo(m)
4V
MGK282
Current sources J1, J2 and J3 are to be tuned so that Vo(c) of pins 9, 8 and 7 is set to 100 V.
Fig.8 Test circuit.
1999 Oct 26
11
TDA6107Q
INTERNAL CIRCUITRY
GND
VDD
to cascode
stage
to black current
measurement circuit
TDA6107Q
1, 2, 3
(1)
esd
from
input
circuit
esd
flash
7, 8, 9
esd
to black current
measurement circuit
from
control
circuit
5
esd
6.8 V
from
input
circuit
Vbias
from black
current
measurement
circuit
esd
esd
from
control
circuit
to black current
measurement circuit
to black current
measurement circuit
MGK283
(1) All pins have an energy protection for positive or negative overstress situations.
Fig.9 Internal pin configuration.
1999 Oct 26
12
TDA6107Q
PACKAGE OUTLINE
DBS9MPF: plastic DIL-bent-SIL medium power package with fin; 9 leads
SOT111-1
D1
A2
q
P
P1
A3
q2
q1
seating plane
A4
pin 1 index
L
1
9
e2
Z
b2
w M
b1
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
18.5
17.8
A2
A3
max.
3.7
8.7
8.0
A4
b1
b2
D (1)
D1
E (1)
e2
15.5 1.40 0.67 1.40 0.48 21.8 21.4 6.48 2.54 2.54
15.1 1.14 0.50 1.14 0.38 21.4 20.7 6.20
P1
3.9
3.4
2.75
2.50
3.4
3.2
1.75 15.1
1.55 14.9
q1
q2
Z (1)
max.
4.4
4.2
5.9
5.7
0.25
1.0
65o
55o
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
92-11-17
95-03-11
SOT111-1
1999 Oct 26
EUROPEAN
PROJECTION
13
TDA6107Q
The total contact time of successive solder waves must not
exceed 5 seconds.
SOLDERING
Introduction to soldering through-hole mount
packages
The device may be mounted up to the seating plane, but

the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
This text gives a brief insight to wave, dip and manual

soldering. A more in-depth account of soldering ICs can be
found in our Data Handbook IC26; Integrated Circuit
Packages (document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 C, contact may be up to 5 seconds.
Soldering by dipping or by solder wave

The maximum permissible temperature of the solder is
260 C; solder at this temperature must not be in contact
with the joints for more than 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
DBS, DIP, HDIP, SDIP, SIL
WAVE
suitable(1)
suitable
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Oct 26
14
TDA6107Q
NOTES
1999 Oct 26
15
Philips Semiconductors a worldwide company

Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
Tel. +61 2 9704 8141, Fax. +61 2 9704 8139
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773
Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920
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Tel. +33 1 4099 6161, Fax. +33 1 4099 6427
Germany: Hammerbrookstrae 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
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TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
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Tel. +82 2 709 1412, Fax. +82 2 709 1415
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Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
SCA 68
Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/200/04/pp16
Date of release: 1999
Oct 26
Document order number:
9397 750 06485

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INTEGRATED CIRCUITS

Triple video output amplifier

Black-Current Stabilization (BCS) circuit

Typical bandwidth of 5.5 MHz for an output signal of

High slew rate of 900 V/s

No external components required

The TDA6107Q includes three video output amplifiers in

Very simple application

plastic DIL-bent-SIL medium power package with fin; 9 leads

handbook, full pagewidth

Fig.1 Block diagram (one amplifier shown).

Triple video output amplifier

black-current measurement output

Fig.2 Pin configuration.

input voltage at pins 1 to 3

measurement output voltage

cathode output voltage

Machine Model (MM)

Triple video output amplifier

thermal resistance from junction to ambient

thermal resistance from junction to fin

thermal resistance from heatsink to ambient

(1) Infinite heatsink.

Fig.4 Equivalent thermal resistance network.

Fig.3 Power derating curves.

Triple video output amplifier

quiescent supply current

internal reference voltage

nominal output voltage at

differential nominal output

output voltage temperature

100 A < Io(c) < 100 A;

Vo(c)(T)(offset) differential output offset

offset current of measurement Io(c) = 0 A;

linearity of current transfer

maximum peak output current 50 V < Vo(c) < VDD 50 V

minimum output voltage

maximum output voltage

small signal bandwidth

large signal bandwidth

Vo(c) = 100 V (p-p)

Triple video output amplifier

cathode output propagation

Vo(c)( = 100 V (p-p) square

difference in cathode output

Vo(c) = 100 V (p-p) square

cathode output rise time

Vo(c) = 50 to 150 V square

cathode output fall time

Vo(c) = 150 to 50 V square

settling time 50% input to

Vo(c) = 100 V (p-p) square

slew rate between

Vi = 4 V (p-p) square wave;

cathode output voltage

Vo(c) = 100 V (p-p) square

power supply rejection ratio

f < 50 kHz; note 2

Triple video output amplifier