6t Sram

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Term paper Leading to Thesis on 6T SRAM

Department Of Electronics & Communication


Engineering
Bhagalpur College Of Engineering, Bhagalpur
Presented By
Anu Kumari
Reg No. - 21141108003
Content
 Introduction
 Components

 Circuit diagram

 Theory and working

 Advantages and Disadvantages

 Future scope

 Conclusion

1
Introduction

• It is a type of semiconductor that stores digital data in


a static form.
• Read stability and write stability are major concerns
• 60% - 70 % area of chip is consumed by memory
• SRAM cells are constructed using a combination of
transition arranged in flip flop configuration.
RAM (RANDOM ACCESS MEMORY)
• SHORT TERM MEMORY
• VOLATILE MEMORY
• FASTER ACCESS TO DATA

• TYPES OF RAM –

1. SRAM ( STATIC RANDOM ACCESS MEMORY )


2. DRAM ( DYNAMIC RANDOM ACCESS
MEMORY)
DIFFERENCE
SRAM DRAM
• Requires less memory • Requires more time
• Access time is more
• Needs to be refreshed
• Access time is low • Slower access time
• Do not refresh • Less power consumption
• Faster access time • Used in main memory
• More power
consumption
• Used in cache
memory
Evolution
1st generation SRAM ( 1960)
2nd generation SRAM( 1970 )

3rd generation SRAM (1990)

4th generation SRAM (2000)

5th generation SRAM (2005)

6
Components

• 6 transistor
2 access transistor
• Word line
• Pre charge
capacitor
• Bit line

Circuit design Of 6T SRAM


Working principle
• 2 inverters are connected in back to back connection
• The output of the 1st inverter is connected to the input of 2nd
inverter and vice versa
• S RAM performs 3 operations –
1. Hold
2. Read
3. Write
• Whenever the two access pass transistor of the word line are in
off state then the bit line and bit line bar are also in off
condition , hence memory cell is in hold state
• If both the bit and bit bar lines act as input then write operator
can be performed
• If both the bit and bit bar lines acts as outputs then the read
operation can be performed
Advantages
• Simple and less area consumed design
• Can be used in high density chip
• Non- volatile need not to refresh
• Faster response ( compared to other memory )

Disadvantage
• Relatively large size comapredto other memory
technology
• Costly
FUTURE SCOPE
• Artificial intelligence - Cache memory .

• Autonomous vehicles - Used to reduce power


consumption.

• IoT - Reduce response time and delays.

• High performance computing – access time less ,


less power consumption .
Conclusion
Despite its limitations, 6T SRAM remains an important
memory cell in modern digital circuits. Its high speed and
low power consumption make it ideal for many
applications, and its reliability and stability have been
proven in many years of use. As technology continues to
advance, new memory cells may emerge that offer even
better performance, but for now, 6T SRAM remains an
important building block in many digital systems.
References
[1]. H. Tran, “Demonstration of 5T SRAM and 6T Dual Port RAM Cell Arrays, Symposium
on VLSI Circuits, pp. Demonstration Dual-Port Arrays,” 74-79, Jun. 2005.
[2]. V. De and S. Borkar, “Technology and design challenges for low power and high
performance”, International Symposium Low Power Electronics and Design, pp.167- 170,
2000.
[3]. S. Borkar, “Technology trends and design challenges for microprocessor
design”,ESSIRC, pp. 10-18, Sep. 1995.
[4]. S. Narendra, S. Borkar, V. De, D. Antoniadis, and A. Chandrakasan, “Scaling of stack
effect and its application for leakage reduction,” in Proc. IEEE/ACM International
Symposium on Low Power Electronics and Design, pp. 175– g y g 182, Aug.2006.
[5].T. Floyd, “Digital Fundamentals”, Prentice Hall, ninth edition, 2007.
[6]. J. M. Rabaey, A. Chandrakasan, [6] J M Rabaey A Chandrakasan and B Nikolic “Digital
Integrated Circuits: A Design Perspective”, Prentice Hall B. Nikolic, Digital Perspective
series in electronics and VLSI, Prentice Hall,second edition, 2006.
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