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    Unit 3 PDSP

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    1627sakthi
    The document discusses RISC processors and their architecture. It begins by explaining that RISC uses a reduced instruction set with smaller, simpler instructions that can operate at higher speeds. It then contrasts RISC with CISC, describing how RISC was developed in response to advancing compiler and memory technologies. The document outlines key aspects of the RISC approach including pipelining and register-to-register operations.

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    Unit 3 PDSP

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    1627sakthi
    79 views20 pages
    The document discusses RISC processors and their architecture. It begins by explaining that RISC uses a reduced instruction set with smaller, simpler instructions that can operate at higher speeds. It then contrasts RISC with CISC, describing how RISC was developed in response to advancing compiler and memory technologies. The document outlines key aspects of the RISC approach including pipelining and register-to-register operations.

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    UNIT 3 PDSP

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    UNIT 3 PDSP

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    The document discusses RISC processors and their architecture. It begins by explaining that RISC uses a reduced instruction set with smaller, simpler instructions that can operate at higher speeds. It then contrasts RISC with CISC, describing how RISC was developed in response to advancing compiler and memory technologies. The document outlines key aspects of the RISC approach including pipelining and register-to-register operations.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    79 views20 pages

    Unit 3 PDSP

    Uploaded by

    1627sakthi
    The document discusses RISC processors and their architecture. It begins by explaining that RISC uses a reduced instruction set with smaller, simpler instructions that can operate at higher speeds. It then contrasts RISC with CISC, describing how RISC was developed in response to advancing compiler and memory technologies. The document outlines key aspects of the RISC approach including pipelining and register-to-register operations.

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    © All Rights Reserved
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    Download as pptx, pdf, or txt
    of 20

    UNIT 03

    RISC PROCESSORS (ARM)

    BY
    Mr. M. SAKTHIMOHAN
    MICROPROCESSOR VS MICROCONTROLLER:
    MICROCONTROLLER TYPES
    What is a Microcontroller?
    A microcontroller is a small, low-cost and self contained
    computer-on-a-chip that can be used as an embedded
    system.
    Microcontroller is a compressed micro computer
    manufactured to control the functions of embedded systems
    in office machines, robots, home appliances, motor vehicles,
    and a number of other gadgets.
    A microcontroller is comprises components like – memory,
    peripherals and most importantly a processor.
    The basic structure of a microcontroller comprise of:-
    CPU, Memory, Input/output ports, Serial Ports, Timers, ADC
    (Analog to digital converter), DAC (digital to analog converter),
    Interpret Control, Special Functioning Block
    How are Microcontrollers Classified?

    The microcontrollers are characterized regarding bus-


    width, instruction set, and memory structure. For the same
    family, there may be different forms with different
    sources.

    Classification According to Number of Bits:


    8-bit microcontroller
    16-bit microcontroller
    32-bit microcontroller
    Classification According to Memory Devices:
    The memory devices are divided into two types, they are
    Embedded memory microcontroller
    External memory microcontroller
    Embedded memory microcontroller:
    When an embedded system has a microcontroller unit that
    has all the functional blocks available on a chip is called an
    embedded microcontroller. For example, 8051 having
    program & data memory, I/O ports, serial communication,
    counters and timers and interrupts on the chip is an
    embedded microcontroller.
    External Memory Microcontroller:
    When an embedded system has a microcontroller unit that
    has not all the functional blocks available on a chip is called
    an external memory microcontroller. For example, 8031 has
    no program memory on the chip is an external memory
    microcontroller.
    Classification According to Instruction Set:
    CISC: CISC is a Complex Instruction Set Computer. It allows the
    programmer to use one instruction in place of many simpler
    instructions.
    RISC: The RISC is stands for Reduced Instruction set Computer, this
    type of instruction sets reduces the design of microprocessor for
    industry standards. It allows each instruction to operate on any
    register or use any addressing mode and simultaneous access of
    program and data.
    From below example, RISC systems shorten execution time by
    reducing the clock cycles per instruction and CISC systems shorten
    execution time by reducing the number of instructions per program.
    The RISC gives a better execution than the CISC.
    Classification According to Memory Architecture:
    On the basis of architecture the types of microcontroller
    are:
    1) Havard Architecture: In Havard architecture separate
    storage and signal buses are provided for different set of
    instructions and data. This architecture has the entire
    data storage within the CPU and there is no access
    available for instruction storage as data.
    • This architecture provides simultaneous access to an
    instructions and data stored inside internal buses of
    microcontroller.
    2) Von Neumann Architecture: This architecture of
    microcontroller was proposed by scientist John Von
    Neumann. In this architecture for both instruction and data
    a single data path or bus is present.
    • Therefore the CPU performs a single operation at a time.
    It either performs Read/Write operation on data, or
    fetches a set of instruction from memory. Hence
    instruction fetch and a data transfer operation cannot
    occur simultaneously by using a common bus.
    • Let's see the block diagram of Von Neumann
    Architecture:
    Classification According to the basis of Service Provider:

    1) AVR: AVR microcontroller is developed by Atmel service provider,


    AVR architecture is based on the Harvard architecture. It is based
    on Reduced Instruction Set Computers(RISC). AVR is not an
    acronym it is just a name given to the RISC architecture based
    microcontroller.
    2) PIC: PIC microcontroller is also a Harvard architecture based
    controller. PIC is an acronym stands for "Peripheral Interface
    Controller". This type of microcontroller supports programming in
    C, Assembly and BASIC C.
    3) Hitachi: Hitachi microcontroller belongs to H8 family of the
    controller. H8 is name used in large family of 8-bit, 16-bit and 32-bit
    microcontroller developed by Renesas Technology, founded in an
    early 1990s within Hitachi semiconductors.
    4) Motorola: Motorola microcontroller is highly integrated
    microcontroller that is used for high-performance data manipulation
    operation. This microcontroller unit uses a System Integration
    Module (SIM), Time Processing Unit (TPU) and Queued Serial
    RISC
    ARCHITECTURE
    HISTORY

    BY
    Mr. M. SAKTHIMOHAN
    RISC
    Reduced Instruction Set Computers
    • Microprocessor architecture
    • Designed to perform a set of smaller
    computer instructions so that it can operate
    at higher speeds
    CISC vs RISC
    Before the RISC era
    • Compilers were hard to build especially for machines with registers
    • Make machine do more work than software
    • Have instructions load and store directly to memory (memory-to-memory
    operations)
    • Software costs were rising and hardware costs were dropping
    • Move as much functionality to hardware
    • Magnetic core memory was used as main memory which was slow and
    expensive
    • Minimize assembly code
    • Complex Instruction Set Computers (CISC)
    • Use complex instructions “MULT”, “ADD”…
    Technology was advancing
    • Compilers were improving
    • Simple compilers found it difficult to use more complex instructions
    • Optimizing compilers rarely needed more powerful instructions
    • Caches
    • allowed main memory to be accessed at similar speeds to control memory
    • Semiconductor memory was replacing magnetic core memory
    • Reduced performance gap between control and main memory
    Inception of RISC
    • 1974 – John Cocke (IBM) proved that 80% of work was done using
    only 20% of the instructions
    • Three RISC projects
    • IBM 801 machine (1974)
    • Berkeley’s RISC-I and RISC-II processors (1980)
    • Stanford’s MIPS processor (1981)
    • 1986 – announcement of first commercial RISC chip
    RISC Approach
    • Use only simple instructions that can be executed within one clock
    cycle
    • Fewer transistors for instructions = more registers
    • Pipelining
    • Register-to-register operations
    • Operand reuse
    • Reduction of load/store
    Pipelining
    Sequential
    IF ID O OE O
    F S
    IF ID O OE O
    F S
    Clock Cycle IF ID O OE O
    F S

    Pipelined
    IF – Instruction Fetch
    IF ID O OE O
    F S ID – Instruction Decode
    IF ID O OE O
    Clock Cycle

    F S OF – Operand Fetch
    IF ID O OE O
    OE – Operand Execution
    F S
    OS – Operation Store

    Time
    Pipelining
    Data Dependency
    IF – Instruction Fetch
    IF ID O OE O
    ID – Instruction Decode
    F S
    IF ID O OE O OF – Operand Fetch
    F S
    OE – Operand Execution
    OS – Operation Store

    IF ID O OE O
    F S

    Branch Address Dependency


    IF ID O OE O
    F S
    IF ID O OE O
    F S
    Pipelining
    • Data dependencies can be addressed by reordering the instructions
    when possible (compiler)
    • Performance degradation from branches can be reduced by branch
    prediction or executing instructions for both branches until the
    correct branch is identified
    Other Advantages
    • New microprocessors can be developed and tested more quickly if
    being less complicated is one of it’s aims
    • Smaller instruction sets are easier for compiler programmers to use

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