Lecture13 BJT Transistor Circuit Analysis

Bipolar Junction
Transistor Circuit Analysis

EE314
Chapter 13: Bipolar
Junction Transistors

1.Large signal DC analysis
2.Small signal equivalent
3.Amplifiers
BJT Transistor Circuit Analysis
Circuit with BJTs
Our approach: Operating point - dc operating point
Analysis of the signals - the signals to be amplified
Circuit is divided into: model for large-signal dc analysis of BJT circuit
bias circuits for BJT amplifier
small-signal models used to analyze circuits for
signals being amplified
Remember !
Large-Signal dc Analysis: Active-Region Model
Important: a current-controlled current source models the
dependence of the collector current on the base current
The constrains for I
B
and V
CE
must be satisfy to keep BJT in the
active-mode
V
BE
forward bias
V
CB
reverse bias ?
?
Large-Signal dc Analysis: Saturation-Region Model
V
BE
forward bias
V
CB
forward bias
?
?
Large-Signal dc Analysis: Cutoff-Region Model
V
CB
reverse bias
V
BE
reverse bias
?
?
If small forward-bias voltage of up to about 0.5 V are applied, the
currents are often negligible and we use the cutoff-region model.
Large-Signal dc Analysis: characteristics of an npn BJT
Large-Signal dc Analysis
Procedure: (1) select the operation mode of the BJT
(2) use selected model for the device to solve the circuit
and determine I
C
, I
B
, V
BE
, and V
CE

(3) check to see if the solution satisfies the constrains for
the region, if so the analysis is done
(4) if not, assume operation in a different region and
repeat until a valid solution is found
This procedure is very important in the analysis and design
of the bias circuit for BJT amplifier.

The objective of the bias circuit is to place the operating point in
the active region.

Bias point it is important to select I
C
, I
B
, V
BE
, and V
CE
independent of the | and operation temperature.
Example 13.4, 13.5, 13.6
Large-Signal dc Analysis: Bias Circuit
From Example 13.6
Remember: that the Q point should be independent of the |
(stability issue)
V
BB
& V
CC
provide this stability, however this impractical solution
Other approach is necessary to solve this problem-resistor network
V
BB
acts as a short
circuit for ac signals
Large-Signal dc Analysis: Four-Resistor Bias Circuit
1
2
3
4
Thevenin
equivalent
2 1
R R R
B
= ( ) ( )
2 1 2
/ R R R V V
CC B
+ =
Equivalent
circuit for
active-region
model
Solution of the bias problem:
Input
Output
E E BE B B B
I R V I R V + + =
( )
B E
I I 1 + = | V V
BE
7 . 0 ~
( )
E B
BE B
B
R R
V V
I
1 + +
=
|
E E C C CC CE
I R I R V V =
Small-Signal Equivalent Circuit
Thevenin
equivalent
Small signal equivalent circuit
for BJT:
( )
so
V
t v
I t i I
x x
V
t v
I
V
t v v
I
t i I i
T
be
BQ b BQ
T
be
BQ
T
be BEQ
ES
b BQ B
|
|
.
|
\
|
+ = +
+ =
(
|
|
.
|
\
|
=
(
|
|
.
|
\
| +
=
= + =
) (
1 ) (
, 1 ) exp(
) (
exp
) (
exp 1
) (
o
t
r
t v
V
t v
I t i
be
T
be
BQ b
) ( ) (
) ( = =
BQ
T
I
V
r =
t and
Common Emitter Amplifier
Find voltage gain:
First perform DC analysis to find
small-signal equivalent
parameters at the operating point.
Find input impedance:
Common Emitter Amplifier
Find power gain:
Find current gain
Find output impedance:
Problem 13.13:
Suppose that a certain npn transistor has V
BE
= 0.7V for I
E
=10mA.
Compute V
BE
for I
E
= 1mA.

Repeat for I
E
= 1A. Assume that V
T
= 26mV.
| | V V
V
sides both divide
and
BE
BE
64 . 0 10 ln * 026 . 0 7 . 0
7 . 0 10 ln * 0.026
0.026
V - 0.7
exp = 10
0.026
V
exp I = 1mA
0.026
0.7
exp I = 10mA
V
V
exp I 1 -
V
V
exp I = I
BE
BE
ES ES
T
BE
ES
T
BE
ES E
= =
=
|
.
|
\
|
|
.
|
\
|
|
.
|
\
|
|
|
.
|
\
|
~
|
|
.
|
\
|
|
|
.
|
\
|
Problem 13.14:
Consider the circuit shown in Figure P13.14. Transistors Q
1
and Q
2
are
identical, both having I
ES
= 10
-14
A and = 100. Calculate V
BE
and I
C2
.
Assume that V
T
= 26mV for both transistors.

Hint: Both transistors are operating in the active region.
Because the transistors are identical and have identical values of V
BE
,
their collector currents are equal.
( ) V
I
I
V V
have we
V
V
I I ce
mA I I
mA
mA
I mA I
I I mA I I I
ES
E
T BE
T
BE
ES E
C E
C C
B C C B B
658 . 0 10 * 99 . 0 ln * 026 . 0 ln
exp sin
99 . 0
1
1
98 . 0
02 . 1
1
1 1
2
& 1
11
2 1
= = =
|
|
.
|
\
|
~
=
|
|
.
|
\
|
+ =
= = =
|
|
.
|
\
|
+
= = + +
|
|
|
Problem 13.50:
The transistors shown in Figure P13.50 operate in active region and
have = 100, V
BE
=0.7V. Determine I
C
and V
CE
for each transistor.
I
1
I
E2
V
BE
( ) ( )
( )
V
I
mA k V
V I k I I k V
mA I I mA I
I mA
I
mA
I
k
I
I
k
k I
mA I I A
M
I
C
CE
E E C CE
E C E
E
E E
E
C
E
C
6126 . 4 1 * 10 15
213 . 7 * 99 . 1 15 * 1 15
8735 . 3 99 . 0 9126 . 3
10
1
101
1
* 43 . 0
101
1
10 10
3 . 14
1 10
7 . 0 1 * 15
1 10
43 . 1
3 . 14
2
1
2 2 2 2
2 2 2
2
2 2
2
1
2
1 1 1
=
|
|
.
|
\
|
+ =
= = + =
= = => =
|
.
|
\
|
+ =
+ =
+
+ =
+
= = =
O
=
|
|
|
I
I
1
I
E
Problem 13.52:
Analyze the circuit of Figure P13.52 to determine I
C
and V
CE
.
( )
( )
( )
( )
( ) ( )
( ) V mA k I I k V V
mA I I
A
k k k
k mA
I
k k I k k I
V k I k I k I k I
V k I k I I
I I mA
K
V
I
I I I I I
B BE CE
B C
B
B
B B
B
B E
B C E
04 . 6 1137 . 0 * 47 7 . 0 * 47
8 . 1
0 . 9
7 . 991
413 . 5 3 . 14
7 . 944 47
7 . 51 * 1047 . 0 3 . 14
7 . 4 * 201 47 * 7 . 0 15 7 . 4 47 *
15 7 . 4 * * 1 7 . 4 * 7 . 0 47 * 47 *
15 7 . 4 * 7 . 0 47 *
1 1047 . 0
150
15 7 . 0
1
1
1 1
1
1
1
= + = + + =
= =
=
=
+
=
+ = +
= + + + + +
= O + + O +
+ = =
O
+
=
= + =
|
|
|
|
I
B
I
C
Problem 13.45:
Analyze the circuits shown in Figure P13.45 to determine I and V. For
all transistors, assume that = 100 and |V
BE
| = 0.7V in both the active
and saturation regions. Repeat for = 300.
( )
2 . 187
8 . 23
42 . 4
43 . 4
2 . 2
8 . 9
8 . 9 V Since
Incorrect 73 . 15 2 . 2 * 15 . 7
300 for
236 . 5 2 . 2 * 38 . 2
8 . 23
390
3 . 9
3 . 9 7 . 0
100 for (a)
max
max
max max
= = = =>
= = => =
= = => =
=
= = => = =
= =
= => =
=
A
mA
I
I
mA
k
I V
V k I V mA I
V k I V mA I I
A
k
I
V V V
B
C
C C
C B C
B
B BE
|
|
|
|
Problem 13.45: Contd.
5 . 124
953 . 0
8 . 14
8 . 14 8 . 14 V since and
Incorrect) , 8 . 85 V give would (
8 . 85 * 286 I , 300 For
533 . 9 1 * 533 . 9 *
33 . 95 9533 . 0
15
3 . 14
100 For (d)
1
max 2
max
max 2 max max 1
2
2
2 2 B2
2 2
2 1 1 1
= = =
= = = =
=
= = => = =
= = => = = =
= = = =
O
=
=
A
mA
I
I
I mA I V I I
V
mA I I A
V k I V mA I I I
I A I I A
M
I
B
C
C B C
B C
B C
B B C B
|
|
| |
|
|
|
I
1
Problem 13.67:
Consider the emitter-follower amplifier of Figure P13.67 . Draw the dc
circuit and find I
CQ
. Next, determine the value of r
. Then, calculate
midband values for A
v
, A
voc
, Z
in
, A
i
, G and Z
0
.
( )
( )
( )
mA I I
A
k
I k k I
one f irst the subtract and by equation nd multiply
V k I k I k I k I
V k I k I V k I I k I
B CQ
B B
B B
B BE
42 . 6 *
2 . 64
212
6 . 13
15 6 . 28 10 202 *
2 2
3 . 14 101 * 10 * 1 * * 1 7 . 0 10 * 15
15 10 * 20 * 15 10 * 10 *
Analysis DC
1 1
1 1 1
= =
= = = +
= + O + =
= = +
|
|
npn
BJTs Practical Aspects
R
V
I =
http://www.4p8.com/eric.brasseur/vtranen.html

Lecture13 BJT Transistor Circuit Analysis

Uploaded by

Copyright:

Available Formats

Lecture13 BJT Transistor Circuit Analysis

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Lecture13 BJT Transistor Circuit Analysis

Uploaded by

Copyright:

Available Formats

What are the different operating regions of a BJT?

What is the procedure for large-signal DC analysis of a BJT circuit?

Bipolar Junction

Transistor Circuit Analysis

You might also like