This document contains questions from 5 units on the subject of Computer Architecture for a second year exam. The units cover basic computer structure, the arithmetic unit, basic processing unit, memory systems, and input/output organization. The questions range from short 2-mark definition and description questions to longer 16-mark questions requiring explanations of concepts such as Booth's multiplication algorithm, cache memory mapping techniques, and direct memory access transfer.
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This document contains questions from 5 units on the subject of Computer Architecture for a second year exam. The units cover basic computer structure, the arithmetic unit, basic processing unit, memory systems, and input/output organization. The questions range from short 2-mark definition and description questions to longer 16-mark questions requiring explanations of concepts such as Booth's multiplication algorithm, cache memory mapping techniques, and direct memory access transfer.
This document contains questions from 5 units on the subject of Computer Architecture for a second year exam. The units cover basic computer structure, the arithmetic unit, basic processing unit, memory systems, and input/output organization. The questions range from short 2-mark definition and description questions to longer 16-mark questions requiring explanations of concepts such as Booth's multiplication algorithm, cache memory mapping techniques, and direct memory access transfer.
Copyright:
Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOC, PDF, TXT or read online from Scribd
This document contains questions from 5 units on the subject of Computer Architecture for a second year exam. The units cover basic computer structure, the arithmetic unit, basic processing unit, memory systems, and input/output organization. The questions range from short 2-mark definition and description questions to longer 16-mark questions requiring explanations of concepts such as Booth's multiplication algorithm, cache memory mapping techniques, and direct memory access transfer.
Copyright:
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RAJALAKSHMI ENGINEERING COLLEGE
Thandalam,Sri Perumbadur.
QUESTION BANK Subject Name: Computer Architecture Year/Sem:II/IV
UNIT-I BASIC STRUCTURE OF COMPUTERS
PART-A(2 MARKS) 1. What is computer? 2. Explain (i)ENIAC (II)UNIVAC . 3. Define Multiprocessing. 4. Give the name of the Von Neumann Computer. 5. Define Time sharing. 6. What is meant by VLSI Technology? 7. Define parallel processing. 8. Define Pipeline processing. 9. What is an operating system? 10. Define system throughput. 11. Mention some applications of parallel processing. 12. What is Mainframe Computer? 13. What is Workstation? 14. List the steps involved in the instruction execution. 15. Define Microcomputer. 16. What is Personal Computer? 17. Write the features of the third generation of computers. 18. What is Mini Computer? 19. Classify Parallel Computers. 20. What are the main components of a uniprocessor? PART-B (16 MARKS) 1. Explain the Differences between CISC & RISC. 2. Explain the various Instruction types? 3. Write in detail about various addressing modes. 4. Explain the architecture of a basic Computer. 5. Explain the various generations of Computer.
UNIT-II ARITHMETIC UNIT
PART-A(2 MARKS) 1. What are the types of ALU? 2. Give any 2s Complement Multiplier algorithm. 3. Give advanced features of ALU. 4. What is a Co-Processor? 5. Define Micro operation. 6. What are the types of micro operations? 7. Draw the circuits which performs both addition and subtraction. 8. Perform arithmetic operation with binary numbers with negative numbers in signed 2s complementary form (-35) + (-40). 9. Draw the block diagram of n-bit twos complement adder sub tractor. 10. Design 4-bit combinational circuit using 4 full adders. 11. Write IEEE standard for floating point format. 12. Give a schematic of 2-bit array multiplier. 13. What is the difference between the restoring and non restoring method of division? 14. What is meant by bit slice processor? 15. State the principle of carry look ahead adder. 16. Give the principle of operation of Booths multiplication algorithm. PART-B (16 MARKS) 1. Explain the Booths algorithm for multiplication of signed twos complement numbers. 2. Explain the floating point addition and subtraction . 3. State the Non restoring division technique. 4. Explain with a diagram the design of a fast multiplier using carry save adder circuit. 5. Give the block diagram for a floating point adder and subtractor unit and discuss its operation. 6. Draw and explain the flowchart of floating point addition process.
UNIT-III BASIC PROCESSING UNIT
PART-A(2 MARKS) 1. What are the types of control organizations we have? 2. What are the differences between the hardwired control organization and micro programmed Control organization. 3. What is a control word? 4. What is micro programmed control unit? 5. What is micro instruction? 6. What is micro program? 7. What are the differences between the main memory and control memory? 8. What is micro program sequencer? 9. What is meant by mapping process? 10. Give the micro instruction format. 11. What is hard wired logic? 12. What is micro programming? 13. What are the advantages and disadvantages of micro programming? 14. What is pipelined computer? 15. List the various pipelined processor. 16. Classify the pipeline computer. 17. Give the basic structure of the pipeline processor. 18. Write down the expressions for speedup factor in a pipelined architecture. 19. Name two types of memory interleaving. 20. Give the instruction format of Vector instruction. 21. What is space diagram? PART-B (16 MARKS) 1. Explain Hardware control unit. 2. Write in detail about Micro program control unit. 3. Describe in detail about pipeline processing. 4. Explain in detail about hazards. 5. Explain the different wired controllers. 6. Write short notes on superscalar processors.
UNIT-IV MEMORY SYSTEM
PART-A(2 MARKS) 1. What is Memory system? 2. Give classification of memory. 3. Define cache. 4. What is Read Access Time? 5. Define Random Access Memory. 6. What are PROMS? 7. Define Memory refreshing. 8. What is SRAM and DRAM? 9. What is Volatile memory? 10. Define data transfer or bandwidth. 11. What is Flash memory? 12. What is multilevel memories? 13. Give the basic structure of cache and what is its use? 14. What is associate memory? 15. Define Seek time and latency time. 16. What is DVD? 17. Define Magneto Optical Disk. 18. Define Virtual Memory. 19. Distinguish between Static and Dynamic. 20. Define the term LRU and LFU. PART-B (16 MARKS) 1. Illustrate the characteristics of some common memory technologies. 2. Describe in detail about associative memory. 3. What is Memory Interleaving? Explain the addressing of multiple module memory system. 4. Discuss the different mapping techniques used in cache memories and their relative merits and demerits. 5. Comparing paging and segmentation mechanisms for implementing the virtual memory. 6. What do you mean by virtual memory? Discuss how paging helps in implementing virtual memory. 7. Discuss any six ways of improving the cache performance.
UNIT-V I/O ORGANIZATION
PART-A(2 MARKS) 1. Define intra segment and inter segment communication. 2. Mention the group of lines in the system bus. 3. What is bus master and slave master? 4. Differentiate synchronous and asynchronous bus. 5. What is strobe signal? 6. What is bus arbitration? 7. Mention types of bus arbitration. 8. What is IO control method? 9. What is DMA? 10. Why does the DMA priority over CPU when both request memory transfer? 11. List out the types of interrupts. 12. What is dumb terminal? 13. What is the need for DMA transfer? 14. List down the functions performed by an Input/Output. PART-B (16 MARKS) 1. Explain with the block diagram the DMA transfer in a computer system. 2. Describe in detail about IOP organization. 3. Describe the data transfer method using DMA. 4. Write short notes on the following (a) Magnetic disk drive (8) (b) Optical drives (8) 5. Discuss the design of a typical input or output interface. 6. What are interrupts? How are they handled?