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S-818 Series

www.ablic.com
www.ablicinc.com
LOW DROPOUT CMOS VOLTAGE REGULATOR
© ABLIC Inc., 2000-2015 Rev.3.1_02

The S-818 Series is a positive voltage regulator developed by CMOS technology and featured by low dropout
voltage, high output voltage accuracy and low current consumption.
Built-in low on-resistance transistor provides low dropout voltage and large output current. A ceramic
capacitor of 2 F or more can be used as an output capacitor. An ON/OFF circuit ensures long battery life.
The SOT-23-5 miniaturized package and the SOT-89-5 package are recommended for configuring portable
devices and large output current applications, respectively.

 Features
 Output voltage: 2.0 V to 6.0 V, selectable in 0.1 V step
 Output voltage accuracy: 2.0%
 Dropout voltage: 170 mV typ. (5.0 V output product, IOUT = 60 mA)
 Current consumption: During operation: 30 A typ., 40 A max.
During power-off: 100 nA typ., 500 nA max.
 Output current: Possible to output 200 mA (3.0 V output product, VIN = 4 V)*1
Possible to output 300 mA (5.0 V output product, VIN = 6 V)*1
 Output capacitor: A ceramic capacitor of 2 F or more can be used.
 Built-in ON/OFF circuit: Ensures long battery life.
 Operation temperature range: Ta = 40C to 85C
 Lead-free, Sn 100%, halogen-free*2

*1. Attention should be paid to the power dissipation of the package when the output current is large.
*2. Refer to “ Product Name Structure” for details.

 Applications
 Constant-voltage power supply for battery-powered device, personal communication device and home
electric appliance

 Packages
 SOT-23-5
 SOT-89-5

1
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

 Block Diagram
*1

VIN VOUT

ON/OFF 
ON/OFF 
circuit

Reference
voltage

VSS
*1. Parasitic diode
Figure 1

2
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

 Product Name Structure


1. Product name

S-818 x xx A xx - xxx T2 x

Environmental code
U: Lead-free (Sn 100%), halogen-free
G: Lead-free (for details, please contact
our sales office)
IC direction in tape specifications*1
Product code*2
Package code*2
MC : SOT-23-5
UC : SOT-89-5
Output voltage
20 to 60
(e.g., When the output voltage is 2.0 V,
it is expressed as 20.)
Product type*3
A: ON/OFF pin positive logic
B: ON/OFF pin negative logic

*1. Refer to the tape drawing.


*2. Refer to the “Table 1” under the “3. Product name list”.
*3. Refer to “3. ON/OFF pin” in the “ Operation”.

2. Package

Drawing Code
Package Name
Package Tape Reel
SOT-23-5 MP005-A-P-SD MP005-A-C-SD MP005-A-R-SD
SOT-89-5 UP005-A-P-SD UP005-A-C-SD UP005-A-R-SD

3
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

3. Product name list

Table 1
Output Voltage SOT-23-5 SOT-89-5
2.0 V±2.0% S-818A20AMC-BGAT2x S-818A20AUC-BGAT2x
2.1 V±2.0% S-818A21AMC-BGBT2x S-818A21AUC-BGBT2x
2.2 V±2.0% S-818A22AMC-BGCT2x S-818A22AUC-BGCT2x
2.3 V±2.0% S-818A23AMC-BGDT2x S-818A23AUC-BGDT2x
2.4 V±2.0% S-818A24AMC-BGET2x S-818A24AUC-BGET2x
2.5 V±2.0% S-818A25AMC-BGFT2x S-818A25AUC-BGFT2x
2.6 V±2.0% S-818A26AMC-BGGT2x S-818A26AUC-BGGT2x
2.7 V±2.0% S-818A27AMC-BGHT2x S-818A27AUC-BGHT2x
2.8 V±2.0% S-818A28AMC-BGIT2x S-818A28AUC-BGIT2x
2.9 V±2.0% S-818A29AMC-BGJT2x S-818A29AUC-BGJT2x
3.0 V±2.0% S-818A30AMC-BGKT2x S-818A30AUC-BGKT2x
3.1 V±2.0% S-818A31AMC-BGLT2x S-818A31AUC-BGLT2x
3.2 V±2.0% S-818A32AMC-BGMT2x S-818A32AUC-BGMT2x
3.3 V±2.0% S-818A33AMC-BGNT2x S-818A33AUC-BGNT2x
3.4 V±2.0% S-818A34AMC-BGOT2x S-818A34AUC-BGOT2x
3.5 V±2.0% S-818A35AMC-BGPT2x S-818A35AUC-BGPT2x
3.6 V±2.0% S-818A36AMC-BGQT2x S-818A36AUC-BGQT2x
3.7 V±2.0% S-818A37AMC-BGRT2x S-818A37AUC-BGRT2x
3.8 V±2.0% S-818A38AMC-BGST2x S-818A38AUC-BGST2x
3.9 V±2.0% S-818A39AMC-BGTT2x S-818A39AUC-BGTT2x
4.0 V±2.0% S-818A40AMC-BGUT2x S-818A40AUC-BGUT2x
4.1 V±2.0% S-818A41AMC-BGVT2x S-818A41AUC-BGVT2x
4.2 V±2.0% S-818A42AMC-BGWT2x S-818A42AUC-BGWT2x
4.3 V±2.0% S-818A43AMC-BGXT2x S-818A43AUC-BGXT2x
4.4 V±2.0% S-818A44AMC-BGYT2x S-818A44AUC-BGYT2x
4.5 V±2.0% S-818A45AMC-BGZT2x S-818A45AUC-BGZT2x
4.6 V±2.0% S-818A46AMC-BHAT2x S-818A46AUC-BHAT2x
4.7 V±2.0% S-818A47AMC-BHBT2x S-818A47AUC-BHBT2x
4.8 V±2.0% S-818A48AMC-BHCT2x S-818A48AUC-BHCT2x
4.9 V±2.0% S-818A49AMC-BHDT2x S-818A49AUC-BHDT2x
5.0 V±2.0% S-818A50AMC-BHET2x S-818A50AUC-BHET2x
5.1 V±2.0% S-818A51AMC-BHFT2x S-818A51AUC-BHFT2x
5.2 V±2.0% S-818A52AMC-BHGT2x S-818A52AUC-BHGT2x
5.3 V±2.0% S-818A53AMC-BHHT2x S-818A53AUC-BHHT2x
5.4 V±2.0% S-818A54AMC-BHIT2x S-818A54AUC-BHIT2x
5.5 V±2.0% S-818A55AMC-BHJT2x S-818A55AUC-BHJT2x
5.6 V±2.0% S-818A56AMC-BHKT2x S-818A56AUC-BHKT2x
5.7 V±2.0% S-818A57AMC-BHLT2x S-818A57AUC-BHLT2x
5.8 V±2.0% S-818A58AMC-BHMT2x S-818A58AUC-BHMT2x
5.9 V±2.0% S-818A59AMC-BHNT2x S-818A59AUC-BHNT2x
6.0 V±2.0% S-818A60AMC-BHOT2x S-818A60AUC-BHOT2x
Remark 1. Please contact our sales office for type B products.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.

4
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

 Pin Configurations
SOT-23-5 Table 2
Top view Pin No. Symbol Pin description
5 4 1 VIN Input voltage pin
2 VSS GND pin
3 ON/OFF ON/OFF pin
4 NC*1 No connection
5 VOUT Output voltage pin
*1. The NC pin is electrically open.
1 2 3 The NC pin can be connected to VIN pin or VSS
pin.
Figure 2

SOT-89-5 Table 3
Top view Pin No. Symbol Pin description
5 4 1 VOUT Output voltage pin
2 VSS GND pin
3 NC*1 No connection
4 ON/OFF ON/OFF pin
5 VIN Input voltage pin
*1. The NC pin is electrically open.
The NC pin can be connected to VIN pin or VSS
pin.
1 2 3

Figure 3

5
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

 Absolute Maximum Ratings


Table 4
(Ta25C unless otherwise specified)
Item Symbol Absolute Maximum Rating Unit
VIN VSS0.3 to VSS12 V
Input voltage
VON/OFF VSS0.3 to VSS12 V
Output voltage VOUT VSS0.3 to VIN0.3 V
250 (When not mounted on board) mW
SOT-23-5
600*1 mW
Power dissipation PD
500 (When not mounted on board) mW
SOT-89-5
1000*1 mW
Operation ambient temperature Topr 40 to 85 C
Storage temperature Tstg 40 to 125 C
*1. When mounted on board
[Mounted on board]
(1) Board size : 114.3 mm  76.2 mm  t1.6 mm
(2) Board name : JEDEC STANDARD51-7

Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.

1000
Power Dissipation (PD) [mW]

800 SOT-89-5

600 SOT-23-5

400

200

0
0 50 100 150
Ambient Temperature (Ta) [C]

Figure 4 Power dissipation of package (When mounted on board)

6
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

 Electrical Characteristics
Table 5
(Ta25C unless otherwise specified)
Test
Item Symbol Condition Min. Typ. Max. Unit
circuit
VOUT(S) VOUT(S) VOUT(S)
Output voltage*1 VOUT(E) VINVOUT(S)1 V, IOUT30 mA V 1
0.98 1.02
*2 *5
Output current IOUT VOUT(S)1 V 2.0 VVOUT(S)2.4 V 100   mA 3
*5
VIN10 V 2.5 VVOUT(S)2.9 V 150   mA 3
*5
3.0 VVOUT(S)3.9 V 200   mA 3
*5
4.0 VVOUT(S)4.9 V 250   mA 3
*5
5.0 VVOUT(S)6.0 V 300   mA 3
Dropout voltage*3 Vdrop IOUT60 mA 2.0 VVOUT(S)2.4 V  0.51 0.87 V 1
2.5 VVOUT(S)2.9 V  0.38 0.61 V 1
3.0 VVOUT(S)3.4 V  0.30 0.44 V 1
3.5 VVOUT(S)3.9 V  0.24 0.33 V 1
4.0 VVOUT(S)4.4 V  0.20 0.26 V 1
4.5 VVOUT(S)4.9 V  0.18 0.22 V 1
5.0 VVOUT(S)5.4 V  0.17 0.21 V 1
5.5 VVOUT(S)6.0 V  0.17 0.20 V 1
VOUT1 VOUT(S)0.5 VVIN10 V,
Line regulation 1  0.05 0.2 %/V 1
VIN  VOUT IOUT30 mA
VOUT 2 VOUT(S)0.5 VVIN10 V,
Line regulation 2  0.05 0.2 %/V 1
VIN  VOUT IOUT10 A
VINVOUT(S)1 V,
Load regulation VOUT3  30 50 mV 1
10 AIOUT80 mA
Output voltage VOUT VINVOUT(S)1 V, IOUT=30 mA, ppm
 100  1
temperature coefficient*4 Ta  VOUT 40CTa85C /C
Current consumption VINVOUT(S)1 V,
ISS1  30 40 A 2
during operation ON/OFF pinON, no load
Current consumption VINVOUT(S)1 V,
ISS2  0.1 0.5 A 2
during power-off ON/OFF pinOFF, no load
Input voltage VIN    10 V 1
ON/OFF pin VINVOUT(S)1 V, RL1 k,
VSH 1.5   V 4
input voltage "H" determined by VOUT output level.
ON/OFF pin VINVOUT(S)1 V, RL1 k,
VSL   0.3 V 4
input voltage "L" determined by VOUT output level.
ON/OFF pin
ISH VINVOUT(S)1 V, VON/OFF7 V 0.1  0.1 A 4
input current "H"
ON/OFF pin
ISL VINVOUT(S)1 V, VON/OFF0 V 0.1  0.1 A 4
input current "L"
RR VINVOUT(S)1 V, f100 Hz,
Ripple rejection  45  dB 5
Vrip0.5 V p-p, IOUT30 mA

7
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

*1. VOUT(S): Set output voltage


VOUT(E): Actual output voltage
Output voltage when fixing IOUT (30 mA) and inputting VOUT(S)1.0 V
*2. The output current at which output voltage becomes 95 % of VOUT(E) after gradually increasing output
current.
*3. VdropVIN1*1(VOUT(E)0.98)
*1. The Input voltage at which output voltage becomes 98 % of VOUT(E) after gradually decreasing input
voltage.
*4. A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
VOUT VOUT
Ta
[mV/°C]*1 = VOUT(S) [V]*2  TaV [ppm/°C]*3  1000
OUT

*1. Change in temperature of output voltage


*2. Set output voltage
*3. Output voltage temperature coefficient
*5. The output current can be at least this value.

8
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

 Test Circuits
1.

VIN VOUT A

ON/OFF V
VSS
Set to ON

Figure 5

2.
A VIN VOUT

ON/OFF
VSS
Set to
VIN or GND

Figure 6

3.

VIN VOUT A

ON/OFF V
VSS
Set to ON

Figure 7

4.
VIN VOUT
 
A V RL
ON/OFF
VSS

Figure 8

5.
VIN VOUT

ON/OFF V RL
VSS
Set to ON

Figure 9

9
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

 Condition of Application
Input capacitor (CIN): 0.47 F or more
Output capacitor (CL): 2 F or more
Equivalent series resistor (ESR): 10  or less
Input series resistor (RIN) 10  or less

Caution Generally a series regulator may cause oscillation, depending on the selection of external
parts. Check that no oscillation occurs with the application using the above capacitor.

 Standard Circuit

INPUT VIN VOUT OUTPUT

*1 *2
CIN CL
VSS

Single GND GND

*1. CIN is a capacitor for stabilizing the input. Use a capacitor of 0.47 F or more.
*2. In addition to a tantalum capacitor, a ceramic capacitor of 2.0 F or more can be used for CL.
Figure 10

Caution The above connection diagram and constant will not guarantee successful operation.
Perform through evaluation using the actual application to set the constant.

 Explanation of Terms
1. Low dropout voltage regulator
This voltage regulator has the low dropout voltage due to its built-in low on-resistance transistor.

2. Output voltage (VOUT)


The accuracy of the output voltage is ensured at 2.0 % under the specified conditions of input voltage,
output current, and temperature, which differ product by product.

Caution When the above conditions are changed, the output voltage may vary and go out of the
accuracy range of the output voltage. Refer to the “ Electrical Characteristics” and
“ Characteristics (Typical Data)” for details.

3. Line regulation 1 (VOUT1) and Line regulation 2 (VOUT2)


Line regulation indicates the input voltage dependence of the output voltage. The value shows how
much the output voltage changes due to the change of the input voltage when the output current is kept
constant.

10
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

4. Load regulation (VOUT3)


Load regulation indicates the output current dependence of output voltage. The value shows how much
the output voltage changes due to the change of the output current when the input voltage is kept
constant.

5. Dropout voltage (Vdrop)


Indicates the difference between input voltage (VIN1) and the output voltage when; decreasing input
voltage (VIN) gradually until the output voltage has dropped out to the value of 98% of the actual output
voltage VOUT(E).

VdropVIN1(VOUT(E)0.98)

VOUT 
6. Output voltage temperature coefficient 
TaVOUT 
The shaded area in Figure 11 is the range where VOUT varies in the operation temperature range when
the output voltage temperature coefficient is 100 ppm/C.

Example of S-818A28A typ. product

VOUT
[V]
0.28 mV/C

VOUT(E)*1

0.28 mV/C

40 25 85 Ta [C]

*1. VOUT(E) is the value of the output voltage measured at Ta = 25C.

Figure 11 Output voltage temperature coefficient range

A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
VOUT VOUT
Ta
[mV/°C]*1 = VOUT(S) [V]*2  TaV [ppm/°C]*3  1000
OUT
*1. Change in temperature of output voltage
*2. Set output voltage
*3. Output voltage temperature coefficient

11
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

 Operation
1. Basic operation
Figure 12 shows the block diagram of the S-818 Series.
The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output
voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to
maintain the constant output voltage which is not influenced by the input voltage and temperature change,
to the output transistor.

VIN

*1

Current
supply
Error
amplifier VOUT


Vref
Rf


Vfb

Reference voltage
circuit Rs

VSS

*1. Parasitic diode

*1. Parasitic diode


Figure 12 Block diagram

2. Output transistor
In the S-818 Series, a low on-resistance P-channel MOS FET is used as the output transistor.
Be sure that VOUT does not exceed VIN0.3 V to prevent the voltage regulator from being damaged due
to reverse current flowing from VOUT pin through a parasitic diode to the VIN pin, when the potential
of VOUT became higher than VIN.

12
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

3. ON/OFF pin
This pin starts and stops the regulator.
When the ON/OFF pin is set to OFF level, the entire internal circuit stops operating, and the built-in P-
channel MOS FET output transistor between the VIN pin and the VOUT pin is turned off, reducing
current consumption significantly. The VOUT pin becomes the VSS level due to the internally divided
resistance of several M between the VOUT pin and the VSS pin.
The structure of the ON/OFF pin is shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating status. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When not using the ON/OFF
pin, connect it to the VIN pin in the product A type, and connect it to the VSS pin in B type.

Table 6 ON/OFF pin function by product type


Product type ON/OFF pin Internal circuit VOUT pin voltage Current consumption
A “H”: ON Operate Set value ISS1
A “L”: OFF Stop VSS level ISS2
B “H”: OFF Stop VSS level ISS2
B “L”: ON Operate Set value ISS1

VIN
ON/OFF

VSS

Figure 13 The structure of the ON/OFF Pin

 Selection of Output Capacitor (CL)


The S-818 Series needs an output capacitor between the VOUT pin and the VSS pin for phase
compensation. A small ceramic or an OS electrolyte capacitor of 2 F or more can be used. When a
tantalum or an aluminum electrolyte capacitor is used, the capacitance must be 2 F or more and the
ESR must be 10  or less.
Attention should be paid not to cause an oscillation due to increase of ESR at low temperatures when
an aluminum electrolyte capacitor is used.
Evaluate the performance including temperature characteristics before prototyping the circuit.
Overshoot and undershoot characteristics differ depending upon the type of the output capacitor. Refer
to the CL dependence data in “ Transient Response Characteristics (S-818A30A, Typical data,
Ta=25°C)”.

13
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

 Precautions
 Wiring patterns for the VIN pin, the VOUT pin and GND should be designed so that the impedance is
low. When mounting an output capacitor between the VOUT pin and the VSS pin (CL) and a capacitor
for stabilizing the input between the VIN pin and the VSS pin (CIN), the distance from the capacitors to
these pins should be as short as possible.
 Note that generally the output voltage may increase when a series regulator is used at low load current
(10 mA or less).
 Generally a series regulator may cause oscillation, depending on the selection of external parts. The
following conditions are recommended for the S-818 Series. However, be sure to perform sufficient
evaluation under the actual usage conditions for selection, including evaluation of temperature
characteristics.
Input capacitor (CIN): 0.47F or more
Output capacitor (CL): 2 F or more
Equivalent series resistance (ESR): 10  or less
Input series resistance (RIN): 10  or less
 The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or an input capacitor is not connected.
 Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or
when the power supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual
device.
 The application conditions for the input voltage, the output voltage, and the load current should not
exceed the package power dissipation.
 Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
 In determining the output current, attention should be paid to the output current value specified in Table
5 in the “ Electrical Characteristics” and footnote *5 of the table.
 ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement
by products including this IC of patents owned by a third party.

14
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

 Characteristics (Typical data)

1. Output Voltage (VOUT) vs. Output Current (IOUT) (When load current increases)
S-818A20A S-818A30A
(Ta25 °C) (Ta25 °C)
10 V
3.0
2.0
4V 6V

VOUT [V]
VOUT [V]

3V 2.0
10 V
5V
1.0 3.5 V
2.5 V 1.0
4V 5V
VIN2.3 V VIN3.3 V
0.0
0.0
0 0.2 0.4 0.6 0.8 0 0.2 0.4 0.6 0.8
IOUT [A] IOUT [A]
S-818A50A
(Ta25 °C) Remark In determining necessary output current,
6.0 consider the following parameters:
8 V 10 V
5.0
1. Output current value in the “ Electrical
VOUT [V]

4.0
Characteristics” and footnote *5.
3.0 7V
2. Power dissipation of the package
6V
2.0
5.5 V
1.0
VIN5.3 V
0.0
0 0.2 0.4 0.6 0.8
IOUT [A]

2. Output voltage (VOUT) vs. Input voltage (VIN)

S-818A20A (Ta=25°C) S-818A30A (Ta=25°C)


2.5 3.5
IOUT =10A IOUT =10A
100A 100A
3.0 1m A
2.0
VOUT(V)
VOUT(V)

2.5
60m A
1.5
30m A 2.0 60m A
1m A 30m A
1.0 1.5
1 2 3 4 2 3 4 5
V IN(V) V IN(V)

S-818A50A (Ta=25°C)
5.5
IO UT =10A
100A
1m A
5.0
VOUT(V)

60m A
4.5
30m A

4.0
4 5 6 7
V IN(V)

15
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

3. Maximum output current (IOUTmax) vs. Input voltage (VIN)


S-818A20A S-818A30A
0.8 0.8
Ta40 °C Ta40 °C
25 °C
0.6 0.6

IOUTmax [A]
IOUTmax [A]

0.4 0.4 85 °C
85 °C 25 °C
0.2 0.2

0.0 0.0
0 2 4 6 8 10 0 2 4 6 8 10
VIN [V] VIN [V]
S-818A50A
0.8 Remark In determining necessary output current,
25 °C consider the following parameters:
0.6
IOUTmax [A]

Ta40 °C
85 °C 1. Output current value in the “ Electrical
0.4 Characteristics” and footnote *5.
2. Power dissipation of the package
0.2

0.0
0 2 4 6 8 10
VIN [V]
4. Dropout voltage (Vdrop) vs. Output current (IOUT)
S-818A20A S-818A30A
2000 2000
Vdrop [mV]

1500 85 °C 1500
Vdrop [mV]

85 °C
1000 Ta40 °C 1000
Ta40 °C
25 °C
500 500
25 °C
0 0
0 50 100 150 200 250 300 0 100 200 300 400
IOUT [mA] IOUT [mA]
S-818A50A
2000

1500
Vdrop [mV]

85 °C
1000
Ta40 °C
500
25 °C
0
0 100 200 300 400 500 600
IOUT [mA]

16
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

5. Output voltage (VOUT) vs. Ambient temperature (Ta)


S-818A20A S-818A30A
VIN3 V, IOUT30 mA VIN4 V, IOUT30 mA
2.04 3.06

2.02 3.03

VOUT [V]
VOUT [V]

2.00 3.00

1.98 2.97

1.96 2.94
50 0 50 100 50 0 50 100
Ta [°C] Ta [°C]
S-818A50A
VIN6 V, IOUT30 mA
5.10

5.05
VOUT [V]

5.00

4.95

4.90
50 0 50 100
Ta [°C]
6. Line regulation (VOUT1) vs. Ambient temperature (Ta)
S-818A20A/S-818A30A/S-818A50A
VINVOUT(S)0.5 10 V, IOUT30 mA
35
30
VOUT1 [mV]

25 3V
5V
20
15
10
VOUT2 V
5
0
50 0 50 100
Ta [°C]
7. Load regulation (VOUT3) vs. Ambient temperature (Ta)
S-818A20A/S-818A30A/S-818A50A
VINVOUT(S)1 V, IOUT10 A80 mA
50
3V
40
VOUT3 [mV]

30

20 5V
10
VOUT2 V
0
50 0 50 100
Ta [°C]

17
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

8. Current consumption (ISS1) vs. Input voltage (VIN)

S-818A20A S-818A30A
40 40
25°C
25°C
30 30

I 1(uA)
85°C

Iss1(A)
(A)
I ss11(uA)
I (A)

20 85°C 20
Ta=-40°C
Iss1

10 10
Ta=-40°C
0 0
0 2 4 6 8 10 0 2 4 6 8 10
V[V]
I N(V)
V[V]
VIN I N(V)
VIN

S-818A50A
40

30
I 1(uA)

85°C
Iss1(A)

20
25°C
10 Ta=-40°C

0
0 2 4 6 8 10
VV N(V)
INI[V]

9. Threshold voltage of ON/OFF pin (VSH/VSL) vs. Input voltage (VIN)


S-818A20A S-818A30A
2.5 2.5

2.0 2.0
VSH/VSL [V]
VSH/VSL [V]

VSH VSH
1.5 1.5

1.0 1.0

0.5 0.5
VSL VSL
0.0 0.0
2 4 6 8 10 3 5 7 8 10
VIN [V] VIN [V]
S-818A50A
2.5

2.0
VSH/VSL [V]

VSH
1.5

1.0

0.5
VSL
0.0
5 6 8 9 10
VIN [V]

18
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

10. Ripple rejection


S-818A20A
VIN3 V, IOUT30 mA, CINNone, COUT2 F, 0.5 V p-p, Ta25 C
0
Ripple Rejection [dB]

20

40

60

80

100
0.1 1 10 100
f [kHz]
S-818A30A
VIN4 V, IOUT30 mA, CINNone, COUT2 F, 0.5 V p-p, Ta25 C
0

20
Ripple Rejection [dB]

40

60

80

100
0.1 1 10 100
f [kHz]
S-818A50A
VIN6 V, IOUT30 mA, CINNone, COUT2 F, 0.5 V p-p, Ta25 C
0

20
Ripple Rejection [dB]

40

60

80

100
0.1 1 10 100
f [kHz]

19
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

 Transient Response Characteristics (S-818A30A, Typical data, Ta25C)

In p u t v o lta g e
or
L o a d c u rre n t

O v e rs h o o t

O u tp u t v o lta g e
U n d e rs h o o t

1. Power on

VIN =010V IOUT=30mA


10V
0V CL=4.7F
VOUT(0.5V/div)

VIN

CL=2F

VOUT

0V

TIME(50usec/div)

Load dependence of overshoot CL dependence of overshoot


VIN0 VVOUT(S)1 V, CL2 F VIN0 VVOUT(S)1 V, IOUT 30 mA
1.0
1.0
0.8 5V
0.8
Over Shoot [V]

Over Shoot [V]

VOUT2 V
0.6 3V
0.6 5V
3V
0.4
0.4
0.2 VOUT2 V
0.2
0.0
0.0
1.E05 1.E04 1.E03 1.E02 1.E01 1.E00
1 10 100
IOUT [A][V]
IOUT
CL [F]
VDD dependence of overshoot Temperature dependence of overshoot
VIN0 VVDD, IOUT30 mA, CL2 F VIN0 VVOUT(S)1 V, IOUT30 mA, CL2 F
1.0 1.0
5V 3V 5V
0.8 0.8
Over Shoot [V]

3V VOUT2 V
Over Shoot [V]

0.6 0.6

0.4 VOUT2 V
0.4

0.2 0.2

0.0 0.0
0 2 4 6 8 10 50 0 50 100
VDD [V] Ta [°C]

20
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

2. ON/OFF control

VIN =10V ON/OFF=010V IOUT=30mA


10V
0V CL=4.7F
VIN
ON/OFF
VOUT(0.5V/div)

CL=2F
VOUT

0V

TIME(50usec/div)

Load dependencies of overshoot CL dependence of overshoot


VINVOUT(S)1 V, CL2 F, ON/OFF0 VVOUT(S)1 V VINVOUT(S)1 V, CL2 F, ON/OFF0 VVOUT(S)1 V
1.0 1.0
5V
0.8 0.8 VOUT2 V
Over Shoot [V]

Over Shoot [V]

0.6 0.6 3V
3V 5V
0.4 0.4
VOUT2 V
0.2 0.2
0.0 0.0
1.E05 1.E04 1.E03 1.E02 1.E01 1.E00 1 10 100
IOUT [A] CL [F]
VDD dependencies of overshoot Temperature dependence of overshoot
VINVDD, IOUT30 mA, CL2 F, ON/OFF0 VVDD VINVOUT(S)1 V, IOUT30 mA, CL2 F, ON/OFF0 VVOUT(S)1 V
1.0 1.0
3V 5V
0.8 0.8 VOUT2 V
Over Shoot [V]

5V
Over Shoot [V]

0.6 0.6

0.4 3V 0.4

0.2 0.2
VOUT2 V
0.0 0.0

0 2 4 6 8 10 50 0 50 100
Ta [C]
VDD [V]

21
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

3. Power fluctuation

VIN =410V IOUT=30mA VIN =104V IOUT=30mA

10V 10V
VIN
VIN
4V 4V
VOUT(0.2V/div)

VOUT(0.2V/div)
CL=2F
VOUT CL=4.7F CL=4.7F
VOUT
3V 3V

CL=2F

TIME(50usec/div) TIME(50usec/div)

Load dependencies of overshoot CL dependence of overshoot


VINVOUT(S)1 VVOUT(S)2 V, CL2 F VINVOUT(S)1 VVOUT(S)2 V, IOUT30 mA
0.6 0.05
0.4
0.04
Over Shoot [V]

Over Shoot [V]


VOUT2 V
0.03 3V
VOUT2 V
0.02
0.2 3V
5V 0.01
5V
0 0
1.E05 1.E04 1.E03 1.E02 1.E01 1.E00 1 10 100
IOUT [A] CL [F]

VDD dependencies of overshoot Temperature dependence


VINVOUT(S)1 VVDD, IOUT30 mA, CL2 F VINVOUT(S)1 VVOUT(S)2 V, IOUT30 mA, CL2 F
0.6
0.06
3V 0.05 3V
Over Shoot [V]
Over Shoot [V]

VOUT2 V
0.4 0.04

VOUT2 V 0.03
0.2 5V
0.02

0.01 5V
0 0
0 2 4 6 8 10 50 0 50 100
VDD [V]
Ta [C]

22
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

Load dependencies of undershoot CL dependence of undershoot


VINVOUT(S)2 VVOUT(S)1 V, CL2 F VINVOUT(S)2 VVOUT(S)1 V, IOUT30 mA
0.3 0.05
5V
0.04
Under Shoot [V]

Under Shoot [V]


0.2 3V
0.03
VOUT2 V
3V 0.02 VOUT2 V
0.1
0.01 5V
0 0
1.E05 1.E04 1.E03 1.E02 1.E01 1.E00 1 10 100
IOUT [A] CL [F]
VDD dependencies of undershoot Temperature dependence of undershoot
VINVDDVOUT(S)1 V, IOUT30 mA, CL2 F VINVOUT(S)2 VVOUT(S)1 V, IOUT30 mA, CL2 F
0.2 0.06
5V
Under Shoot [V]

0.05
0.15 Under Shoot [V] 3V VOUT2 V
3V
0.04
0.1 VOUT2 V 0.03

0.02
0.05 5V
0.01
0
0
0 2 4 6 8 10 50 0 50 100
VDD [V] Ta [°C]

23
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series Rev.3.1_02

4. Load fluctuation

IOUT=10A30mA VIN =4V IOUT=30mA10A VIN =4V

30mA 30mA

10 A 10 A
VOUT(0.2V/div)

VOUT(0.1V/div)
IOUT
IOUT CL=2F CL=2F

VOUT CL=4.7F
3V 3V

CL=4.7F VOUT

TIME(50sec/div) TIME(20msec/div)

Load current dependence of load fluctuation overshoot CL dependence of overshoot


VINVOUT(S)1 V, CL2 F
VINVOUT(S),1 V, IOUT30 mA10 A
1.0
0.2
0.8 5V
Over Shoot [V]

VOUT2 V
Over Shoot [V]

0.15
0.6 3V 3V

0.4 0.1

5V
0.2 0.05
VOUT2 V
0.0
0
1.E03 1.E02 1.E01 1.E00
1 10 100
IOUT [A] CL [F]

Remark IOUT shows larger load current at load current


fluctuation while smaller current is fixed to
10 A. For example IOUT1.E02 (A) means
load current fluctuation from 10 mA to 10 A.
VDD dependencies of overshoot Temperature dependence of overshoot
VINVDD, IOUT30 mA10 A, CL2 F VINVOUT(S)1 V, IOUT30 mA10 A, CL2 F
0.3 0.3

0.25
Over Shoot [V]

3V
Over Shoot [V]

0.2 0.2 3V

0.15
0.1 0.1
VOUT2 V
0.05 VOUT2 V 5V
5V
0 0
0 2 4 6 8 10 50 0 50 100
VDD [V] Ta [°C]

24
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.1_02 S-818 Series

Load current dependence of load fluctuation undershoot CL dependence of undershoot


VINIOUT(S)1 V, CL2 F VINVOUT(S)1 V, IOUT10 A30 mA
1.0 0.4

0.8
Under Shoot [V]

Under Shoot [V]


0.3
0.6 3V 5V 3V
0.2
0.4

0.2 0.1
5V
VOUT2 V VOUT2 V
0.0 0
1.E03 1.E02 1.E01 1.E00 1 10 100
IOUT [A] CL [F]

Remark IOUT shows larger load current at load current


fluctuation while smaller current is fixed to
10 A. For example IOUT1.E02 (A) means
load current fluctuation from 10 A to 10 mA.
VDD dependence of undershoot Temperature dependence of undershoot
VINVDD, IOUT10 A30 mA, CL2 F VINVOUT(S)1 V, IOUT10 A30 mA, CL2 F
0.4 0.5
3V VOUT2 V 3V
Under Shoot [V]
Under Shoot [V]

0.4
0.3
0.3
0.2
0.2
VOUT2 V
0.1 5V 5V
0.1

0 0
0 2 4 6 8 10 50 0 50 100
VDD [V] Ta [°C]

25
2.9±0.2
1.9±0.2

5 4

+0.1
1 2 3 0.16 -0.06

0.95±0.1

0.4±0.1

No. MP005-A-P-SD-1.3

TITLE SOT235-A-PKG Dimensions


No. MP005-A-P-SD-1.3
ANGLE
UNIT mm

ABLIC Inc.
4.0±0.1(10 pitches:40.0±0.2)

+0.1 2.0±0.05
ø1.5 -0 0.25±0.1

+0.2
ø1.0 -0 4.0±0.1 1.4±0.2

3.2±0.2

3 2 1

4 5

Feed direction

No. MP005-A-C-SD-2.1

TITLE SOT235-A-Carrier Tape


No. MP005-A-C-SD-2.1
ANGLE
UNIT mm

ABLIC Inc.
12.5max.

9.0±0.3
Enlarged drawing in the central part

ø13±0.2

(60°) (60°)

No. MP005-A-R-SD-1.1

TITLE SOT235-A-Reel
No. MP005-A-R-SD-1.1
ANGLE QTY. 3,000
UNIT mm

ABLIC Inc.
4.5±0.1
1.5±0.1
1.6±0.2

5 4

0.3

45°

1 2 3

1.5±0.1 1.5±0.1
0.4±0.05

0.4±0.1 0.4±0.1

0.45±0.1

No. UP005-A-P-SD-2.0

TITLE SOT895-A-PKG Dimensions


No. UP005-A-P-SD-2.0
ANGLE
UNIT mm

ABLIC Inc.
4.0±0.1(10 pitches : 40.0±0.2)

ø1.5 +0.1
-0 2.0±0.05

+0.1 8.0±0.1 0.3±0.05


ø1.5 -0
2.0±0.1

4.75±0.1

3 2 1

4 5

Feed direction

No. UP005-A-C-SD-2.0

TITLE SOT895-A-Carrier Tape


No. UP005-A-C-SD-2.0
ANGLE
UNIT mm

ABLIC Inc.
16.5max.

13.0±0.3
Enlarged drawing in the central part

(60°) (60°)

No. UP005-A-R-SD-1.1

TITLE SOT895-A-Reel
No. UP005-A-R-SD-1.1
ANGLE QTY. 1,000
UNIT mm

ABLIC Inc.
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
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caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
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life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
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aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
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9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
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14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
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15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.

2.4-2019.07

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