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Electronics- I

Lab 8: Common Emitter Amplifier

Names Abdul Wahab


Muhammad Rehan Tabassum

Registration
FA20-BEE-010
Number
FA19-BEE139

Class BEE-3A

Instructor’s Name Ma’am Riffat Shaista

Lab Assessment
Post Lab Total
Pre-Lab In-Lab
Data Presentation Data Analysis Writing Style
Objectives:
1: Demonstrate the operation and characteristics of the small signal common emitter
amplifier and
2: Investigate what influences the voltage gain

Equipment:
Breadboard
Function Generator
Oscilloscope
Digital Multimeter
DC Voltage Source: VDC: 15V
Resistor: 150Ω, 560kΩ, 4.7kΩ, 2.7KΩ, 3.9 KΩ
Capacitor: 2.2µF 10µF
Transistor: 2N2222

In-Lab I: Common Emitter Amplifier Functional Experiment


Experimental and Simulated Data:
Parameter Measured Expected Error
VB 4.92V 4.773V 2.98%
VC 11.96V 9.40V 21%
VE 3.96V 4.11V 3.78%
VBE 0.65V 0.66V 1.5%

Parameter Measured Calculated


IC 1.366mA 1.43mA
IE 1.55mA 1.44mA
IB 7µA 6.8µA
B 195.14 210.29
rπ 3203.87 3814.95
gm 0.0596 0.05538

Oscilloscope output

For the experiment both the simulated and measured values were really close and provided
accurate values with a tolerance of 5%. However, only for VC the error was around 21% which is
a significant difference. It had very little effect on other parameters.
Simulated Data:

The simulated output matches with the calculated values, moreover, there is a small difference
between experimentally obtained data and simulated data. This can be attributed to tolerances
of electronic components like resistors and capacitors as well as weak junctions and wire
resistances.
Comparison between Normal Configuration and configuration without Load and No By-Pass
Capacitor.

Condition Vi (V) Vo (V) Gain Measured Gain Calculated Error


Normal 0.2041 2.041 10 10.74 7.4%
Without Load 0.2041 3.641 17.83 22.175 19%
No By-Pass Capacitor 0.204 0.240 1.176 0.67 43%
Normal Configuration
Without Load

Without load the output voltage is shifted up to +9.28Volts with Vmax = +13.68 and Vmin = 4.81V.
The VPP is 8.87V and Vm = 4.435V.
Without By-Pass Capacitor

The simulated result and the measured values for the No By-Pass Capacitor circuit showed a
43% error. The simulation yielded Vmax = 135.4mV for Vi = 0.2V which gives a gain of 0.67. While
experimentally derived value for Vmax is 0.24V which results in a gain of 1.176.

Design Problem
Design a single stage BJT CE amplifier with the following specifications
AV = -10 RL = RC = 4.7 KΩ VCC = 10V
Output

Output Result:
B Vout Vin AV
200 1.1536V 1V 1.15

In the design problem we ran into the problem of output signal clipping which caused
unsatisfactory results. The voltage gain remained low, while the calculated values didn’t
yield expected simulated outcomes. The most amplification we managed was 1.15
without any clipping in the output signal.
Critical Analysis:
1: In this lab we created and used Common Emitter Amplifier to amplify a weak AC signal
into large useable Voltage, albeit the signal was inverted on the output. This is a
characteristic of a CE configuration although it provides both significant Current and
Voltage gain.
2: In the lab we created a normal CE amplifier using Voltage Divider Bias Circuit and
measured the values.
3: Later we disconnected the load and measured again to check the behavior and noticed
the gain increased significantly. This points to the fact that attacking a load decreases the
gain and as such a load should be connected while creating more precise amplifier.
4: Moreover, we also disconnected the By-Pass capacitor and noticed that the gain
decreased significantly, as the Emitter resistor became part of the circuit.

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