MULTI-LEVEL INVETER

A minor project Report submitted in partial fulfilment of the

requirements For the degree of Bachelor in Technology

Submitted by
Biswajit Parija (2121320082
Silu Sahu(2121320118)
Ashis Kumar Majhi(2221320018)
Aswinee Kumar Biswal(2221320019)

Under the guidance of

Mr. Ajit Kumar Panda

For the
Session 2024/25

DEPARTMENT OF ELECTRICAL ENGINEERING

ARYAN INSTITUTE OF ENGINEERING & TECHNOLOGY (AIET)

BHUBANESWAR

Affiliated to
 Certificate

This is here to certify that Biswajit Parija, Silu Sahu, Ashis Kumar Majhi and
Aswinee Kumar Biswal of 7th semester of Electrical Engineering department,
Aryan Institute of Engineering & Technology, BBSR, Odisha have satisfactorily
completed the project report on "Multi-Level Inveter " in the partial
fulfilment of requirement for the

Bachelor of Technology Degree in Electrical Engineering under Biju Patnaik

University of Technology, Rourkela, Odisha.

Mr. Ajit Kumar Panda Dr. Pratap Chandra Nayak

Project Guide HoD

Principal
Principal External Examiner
AIET, BBSR
AIET, BBSR
 Declaration

We hereby declare that the project entitled "Multi-Level Inveter " was carried
out by us under the guidance of Professor
Mr. Ajit Kumar Panda, for the partial fulfilment of the requirements for the award of
the degree of Bachelor of Technology in Electrical Engineering under Biju Patnaik
University of Technology, Rourkela, Odisha. The results embodied in this report have
been neither copied from any source nor submitted to any other University or Institute
for the award of any degree.

Place: AIET, Bhubaneswar Biswajit Parija(2121320082)

Date: Silu Sahu(2121320118)

Ashis Kumar Majhi(2221320018)

Aswinee Kumar Biswal(2221320019)
Vision of the Institute
To become a leading Engineering institution of the state by imparting quality
technical education at affordable costs to create skilled and motivated graduates to
serve the technological requirements of society in different ways.
Mission of the Institute
 To impart contemporary technical education and skills to students of
different socio-economic backgrounds.
 To equip students with analytical learning and real life problem solving.
 To make learning a continuous endeavour compatible with market
needs.
 To promote the spirit of leadership, entrepreneurship, innovation and
ethics.
Vision of the Department of Electrical Engineering
To be a leader in the field of electrical engineering education and training by
creating graduates who are globally competent, successful in their chosen fields of
endeavour, engaged in innovative research and entrepreneurship, and deeply
committed to social advancement.
Mission of the Department of Electrical Engineering
 To impart the fundamentals of electrical engineering so that students
may develop new products and solutions to solve issues in the real
world.
 To enable students to pursue a prosperous career in the cognitive
electrical engineering professions and to become ethical technologists.
 Through continuous improvement of faculty and lab facilities, to strive
for excellence in academics and research works by developing a rich
electrical engineering based research centre for the industrial growth
of the nation.
Program Educational Objectives (PEOs)
Graduates will be able to:
PEO1: Establish successful careers in Electrical Engineering and related fields
by offering creative and practical solutions.
PEO2: Engage in continuous learning through cutting-edge technologies for
solving societal problems using logical and innovative approaches in decision-
making.
PEO3: Become an entrepreneur and work for a company that conducts
research and development.
Program Specific Outcomes (PSOs)
PSO1: Apply the fundamentals of science and technology to identify,
formulate, design and investigate complex engineering problems of electric
circuits, control systems, power electronics, electric drives and power systems.
PSO2: Ability to model, simulate and assess electrical systems and
components using software and hardware tools.
PSO3: Empowering to socially acceptable technical solutions and relevant
methodologies for sustainable development to current electrical engineering
difficulties.

6
 ACKNOWLEDGEMENT

I would like to express my gratitude to all the people behind the

screen who helped me to transform an idea into a real application.
I profoundly thank Asst. prof. Dr.PRATAP CHANDRA NAYAK, Head of
the Department of Electrical Engineering who has been excellent
guide and also a great source of inspiration to my work. I would
like to thank my internal guide Asst. prof. AJIT KUMAR PANDA for
his technical guidance, constant encouragement and support in
carrying out my project at college. The satisfaction and euphoria
that accompany the successful completion of thetask would be
great but incomplete without the mention of the people who made
it possible with their constant guidance and encouragement
crowns all the efforts with success.
In this context, I would like to thank all the other staff members,
both teaching and non-teaching, who have extended their timely
help and eased my task.

Biswajit Parija (Regd. No. – 2121320082 )

Silu Sahu(Regd.No-2121320118)

Ashis Kumar Majhi(Regd No-2221320018)

Aswinee Kumar Biswal(Regd No-2221320019)

)
7
 ABSTRACT
In India the demand of electric power is increasing rapidly, at present the maximum
generation of electric power is based on non-renewable energy sources. In future
there lies the use of renewable energy resources to satisfy increasing power demand
and needs, among all renewable energy sources solar energy is most easily available
and most comfortably used. For utilizing solar energy for generation of electric
power solar cell or solar panel is mostly used. Available power from solar cell is DC
in nature, but for utilization of this power for domestic purpose, it is needed to be
converted in to AC. Inverter is the power electronic modulator that is used for this
purpose. Multilevel cascade type inverter which intake multiple DC sources and
gives combined AC output fordesired voltage and frequency. The project is mainly
focused on the development of single phase cascaded type multilevel inverter for
domestic application using solar energy and elimination of harmonic distortion and
its effects. Selective Harmonics Elimination Stepped Wave forms [SHESW] method
can be implemented to eliminate the lower order harmonics. The topology which we
will use is suitable for any number of levels. A standard cascade multilevel inverter
requires “n” DC sources for “2n+1”level. Fundamental switching scheme can be
used to power semiconductor switches in the inverter to produce a nearly sinusoidal
output. To eliminate further more harmonics, harmonic filter can be added in the
circuit which can eliminate particular order of harmonic.

8
 CONTENT
SL NO. TITLE PAGE NO.


Listof the abbreviation 1

List of the Figure 2

List of the Table 2
1. Chapter – 1
 Introduction 3-6
1.1. Objectives of the Project 3
1.2. Hypothesis 3-4
1.3. Block Diagram 4-6
2. Chapter – 2
 Solar Panels 7-11
2.1. Introduction 7
2.2. Theory and Constructions 7-8
2.3. Crystalline Silicon Modules 8
2.4. Thin-film Modules 8-9
2.5. Mounting Systems 9-10
2.6. Solar Panel Maintenance 10-11
3. Chapter –3
 Battery 11-12
3.1. Introduction 11
3.2. Categories and Types of Batteries 11-12
3.3. Battery Lifetime 12
3.4. Battery Sizes 12
4. Chapter – 4
 Inverter 13-17
4.1. Basics of Inverter 13
4.2. What is An Inverter 13
4.3. Classification of Inverter 14
9
 4.4. Basic Principle of Inverter 14-16
4.5. Performance Parameters of Inverter 16-17
4.6.Application of Inverter 17
5. Chapter – 5
 Multilevel Inverter 18-20
5.1. Introduction 18
5.2. Types of Multilevel Inverter 18
5.3.Cascade Multilevel Inverter 18-20
5.4. Advantages of Cascade Inverter 20
5.5. Disadvantages Cascade Inverter 20
5.6. Application of Multilevel Inverter 20
6. Chapter – 6
 Controller 21-23
6.1. AVR Micro Controller 21
6.2.Architecture 21-23
6.3. Features 23
 Driver 23-30
6.4. IR2110 Driver 24-25
6.5. Comparison of Different Types of Inverters Outputs 25-27
6.6. Fourier Analysis of Multilevel Inverter and Fourier Series 27-29
6.7. Selective Harmonic Elimination Method 29-30
7. Chapter – 7
 Controller Circuit 30-40
7.1. AVR Atmega328 Controllers 30-32
7.2. Circuit Diagram 32
7.3. Design of Inverter 33-34
7.4. Device Used For Circuit 35-40
8. Conclusion 41
9. References 42

10
 LIST OF THE ABBREVIATION
LC Filter Induction and Capacitor Filter
OTT Filter Over-The-Top Filter
ETFE Ethylene-Tetra-Fluoro-Ethylene
DC Direct Current
AC Alternative Current
BJT Bipolar Junction Transistor
MOSFET Metal Oxide Semiconductor Field Effect Transistor

GTO Gate Turn-Off Thyristor

IGBT Insulated Gate Bipolar Transistor
MCT Multi Cable Transit
RMS Root-Means-Square
PWM Pulse Width Modulation
AVR Automatic Voltage Regulator
RISC Reduced Instruction Set Computer
ROM Read Only Memory
EPROM Erasable Programmable Read Only Memory
EEPROM Electrically Erasable Programmable Read Only Memory
CPU Central Processing Unit
SPM Sock Pulse Method
SRAM Static Random Access Memory
ADC Analog To Digital Converter
SPI Serial Peripheral Interfaced
TWI Two-Wire-Interfaced
CAN Controller Area Network
CMOS Complementary Metal Oxide Semiconductor
CIGS Converter Interfaced Generation System
FEP Fluorinated Ethylene Propylene
Si Silicon

11
 CdTe Cadmium Telluride

LIST OF THE FIGURE

Fig No Name Of theFigure Page No

1.1 Block Diagram of The Project 5
4.1 (a) Circuit Diagram Of H-Bridge Inverter 11
4.2 Cascade Multilevel Inverter 16
5.1 (a) Switching Pulses and Output Wave forms 16
5.1 (b) Architecture of AVR Controller 19
6.1 Circuit Diagram for Driver 22
6.2 Pin Diagram of IR2110 23
6.3 Wave Forms and Their Respective THD Spectrums 24
6.4 Wave Space For –pi - +pi Interval 26
7.1 AVR 328 Atmega Pin Diagram 29
7.2 Circuit Diagram of Arduino Controller 31
7.3 Power Supply for Micro Controller 31
7.4 Main Circuit of Inverter 32
7.5 Isolation Circuit 33
7.6 Power Circuit 33
7.7 (a) Circuit Connection 34
7.7 (b) H-Bridge Connection 35
7.8 (a) Pulse For Positive Half Cycle 36
7.8 (b) Pulse For Negative Half Cycle 36
7.9 Output Voltage Wave Forms 37
7.10 THD Output Wave Forms 37
7.11 Circuit Diagram With 15th Order Filter 38
4.1 (b) Wave forms OF H-Bridge Inverter 11
LIST OF THE TABLE
T. No Name Of theTable Page No
4:1 Classification Of Inverters 15
4:2 Switching State Of Half Bridge Inverter 16
6:1 Comparison Of Different Wave form And THD 28
6:2 Output Voltage with Switching Interval 29

12
7:1 (a) Pulse Parameter For + ve Half Cycle 38
7:1 (b) Pulse Parameter For - ve Half Cycle 38

INTRODUCTION
This chapter is mainly focused on the objectives, basic block diagram, applications
and limitations of our project.

 OBJECTIVES OF THE PROJECT

 To understand the function and working of inverter as a power electronic

converter or modulator.
 To design the topology and control strategy of cascaded multilevel inverter.
 To perform simulation of cascaded multilevel inverter.
 To design proper filter for reduction of harmonics and its effect.
 To design power switches for inverter circuit.
 To design batteries for input of inverter.
 To construct an inverter that can be used as main power sources for domestic
level application.

 HYPOTHESIS

 Gobinath.K, Mahendran.S, Gnanambal.I

This paper focuses on improving the efficiency of the multilevel inverter and quality
of output voltage waveform. Seven level reduced switches topology has been
implemented with only seven switches. Fundamental Switching scheme and
Selective Harmonics Elimination were implemented to reduce the Total Harmonics
Distortion (THD) value. Selective Harmonics Elimination Stepped Waveform
(SHESW) method is implemented to eliminate the lower order harmonics.
Fundamental switching scheme is used to control the power electronics switches in
the inverter. The proposed topology is suitable for any number of levels. The
harmonic reduction is achieved by selecting appropriate

13
 switching angles. It shows hope to reduce initial cost and complexity hence it is apt
for industrial applications. In this paper third and fifth level harmonics have been
eliminated. Simulation work is done using the MATLAB software and experimental
results have been presented to validate the theory.

 Zhong Du, Leon M. Tolbert, John N. Chiasson, and Burak Ozpineci

A method is presented showing that a cascade multilevel inverter can be
implemented using only a single DC power source and capacitors. A standard
cascade multilevel inverter requires n DC sources for 2n + 1 levels. Without
requiring transformers, the scheme proposed here allows the use of a single DC
power source (e.g., a battery or a fuel cell stack) with the remaining n−1 DC sources
being capacitors. It is shown that one can simultaneously maintain the DC voltage
level of the capacitors and choose a fundamental frequency switching pattern to
produce a nearly sinusoidal output. A cascade multilevel inverter topology has been
proposed that requires only a single DC power source. Subject to specified
constraints, it was shown that the voltage level of the capacitors can be controlled
while at the same time choosing the switching angles to achieve a specified
modulation index and eliminate harmonics in the output waveform.

 BLOCK DIAGRAM

Basic Block diagram of our project is shown in the figure. 1.1

14
 Fig. 1.1 Block Diagram of Project

 Input Source
For inverter circuit input source is DC in nature. The DC input can be supplied by
batteries, solar cell or by rectifier. As our project is focused on utilization of solar
energy so in that case input source must be solar panel.

 Power electronic modulator

Power electronic modulator is heart of all power electronic system that consists of
power semiconductor switches. For our system the PEM is cascaded connection of
three H-bridges.

 Harmonic Filter

Power electronic devices have tendency to generate harmonics in circuit waveforms.

Harmonics filter is used to filter out higher order harmonics that will make the output
waveform nearer to sinusoidal waveform. A wide variety of filters are available to
improve the output waveform. The following are the normally used filter:
(i) LC filters
(ii) Resonant-arm filter
(iii) OTT filter

 Load

This type of Inverter is used to fulfil only the domestic applications used in homes
as load.

 Controller and Driver

15
 Controller is used to generate pulses for power switches for modulation of power
flow. Driver is used to drive the switch from the pulses available from controller.

 APPLICATIONS

 This inverter is designed only for domestic application. With increasing ratings the
same inverter can be designed for commercial applications.
 The hybrid combination of power available from this inverter and the power
available from substation can be made so that both energies can be utilized
simultaneously.
 The other combination can also be made such that during day time only le from
inverter is utilized and during night the power available from substation is utilized.
 For small industrial applications that are based on single phase supply this inverter
can be used although with improved ratings.
 In industry for monitoring system the required power is not so high so that such
inverters can be used as separate power supply for such systems.

 LIMITATIONS
 The main problem with this inverter is that it does not generate pure sinusoidal
waveform that means some amount of harmonic distortions is present that increases
the losses.
 With increase in level number of switches the switching loss are also increase.
 The power available from solar panel is not constant because the intensity of
solar radiation is not constant for whole day and during night time those are
completely unavailable.
 For hybrid combination with substation power the synchronization must require that
need some extra efforts.
 For inverter fed by batteries the main problem is in input, we must have some
charging system that can charge the batteries.

 INPUT SOURCES

16
This chapter contain information about various types of input sources for inverter
circuit like Solar panels, batteries etc.

SOLAR PANELS
 INTRODUCTION
Solar panel refers either to a photo voltaic module, a solar hot water panel, or to a
set of solar Photo voltaic (PV) modules electrically connected and mounted on a
supporting structure. Solar panels can be used as a component of a larger photo
voltaic system to generate and supply electricity in commercial and residential
applications. Each module is rated by its DC output power under standard test
conditions (STC), and typically ranges from 100 to 320 watts. The efficiency of a
module determines the area of a module given the same rated output – an 8%
efficient 230 watt module will have twice the area of a 16% efficient 230 watt
module. There are a few solar panels available that are exceeding 19% efficiency. A
single solar module can produce only a limited amount of power; most installations
contain multiple modules.

 Theory and Construction

Solar modules use light energy (photons) from the sun to generate electricity through
the photo voltaic effect. The majority of modules use wafer-based crystalline silicon
cells or thin film cells based on cadmium telluride or silicon. The structural (load
carrying) member of a module can either be the top layer or the back layer. Cells
must also be protected from mechanical damage and moisture. Most solar modules
are rigid, but semi-flexible ones are available, based on thin-film cells. These early
solar modules were first used in space in 1958.
Electrical connections are made in series to achieve a desired output voltage and/or
in parallel to provide a desired current capability. The conducting wires that take the
current off the modules may contain silver, copper or other non- magnetic
conductive transition metals. The cells must be connected electrically to one another
and to the rest of the system. Externally, popular terrestrial usage

17
photo voltaic modules use MC3 (older) or MC4 connectors to facilitate easy
weatherproof connections to the rest of the system.
Bypass diodes may be incorporated or used externally, in case of partial module
shading, to maximize the output of module sections still illuminated.
Some recent solar module designs include concentrators in which light is focused by
lenses or mirrors onto an array of smaller cells. This enables the use of cells with a
high cost per unit area (such as gallium arsenide) in a cost-effective way.

 Crystalline silicon modules

Most solar modules are currently produced from solar cells made of poly crystalline
and mono crystalline silicon. In 2013, crystalline silicon accounted for more than 90
percent of worldwide PV production.

 Thin-film modules
Third generation solar cells are advanced thin-film cells. They produce a relatively
high efficiency conversion for the low cost compared to other solar technologies.
Rigid thin-film modules:

In rigid thin film modules, the cell and the module are manufactured in the same
production line. The cell is created on a glass substrate or superstrate, and the
electrical connections are created in situ, a so-called "monolithic integration". The
substrate or superstrate is laminated with an encapsulates to a front or back sheet,
usually another sheet of glass.
The main cell technologies in this category are CdTe, or a-Si, or a-Si+uc-Si tandem,
or CIGS (or variant). Amorphous silicon has a sunlight conversion rate of 6-12%.

Flexible thin-film modules:

Flexible thin film cells and modules are created on the same production line by
depositing the photo active layer and other necessary layers on a flexible substrate.
If the substrate is an insulator (e.g. polyester or polyimide film) then monolithic
integration can be used. If it is a conductor then another technique for electrical
connection must be used. The cells are assembled into modules by

18
 laminating them to a transparent colourless fluoropolymer on the front side
(typically ETFE or FEP) and a polymer suitable for bonding to the final substrate on
the other side. The only commercially available (in MW quantities) flexible module
uses amorphous silicon triple junction (from Uni solar). The requirements for
residential and commercial are different in that the residential needs are simple
and can be packaged so that as solar cell technology progresses, the other base line
equipment such as the battery, inverter and voltage sensing transfer switch still need
to be compacted and unitized for residential use. Commercial use, depending on
the size of the service will be limited in the photo voltaic cell arena, and more
complex parabolic reflector sand solar concentrators are becoming the dominant
technology. Flexible thin-film panels are optimal for portable applications as they
are much more resistant to breakage than regular crystalline cells, but can be broken
by bending them into a sharp angle. They are also much lighter per square foot than
standard rigid solar panels.

Smart solar modules:

Several companies have begun embedding electronics into PV modules. This

enables performing maximum power point tracking (MPPT) for each module
individually, and the measurement of performance data for monitoring and fault
detection at module level. Some of these solutions make use of power optimizers, a
DC-to-DC converter technology developed to maximize the power harvest from
solar photo voltaic systems. As of about 2010, such electronics can also compensate
for shading effects, wherein a shadow falling across a section of a module causes the
electrical output of one or more strings of cells in the module to fall to zero, but not
having the output of the entire module fall to zero.

 Mounting systems
Ground Mounting:

Ground mounted photovoltaic systems are usually large, utility-scale solar power
plants. Their solar modules are held in place by racks or frames that are attached to
ground based mounting supports. Ground based mounting supports include:
 Pole mounts, which are driven directly into the ground or embedded in concrete.
 Foundation mounts, such as concrete slabs or poured footings.

19
 Ballasted footing mounts, such as concrete or steel bases that use weight to secure
the solar module system in position and do not require ground penetration. This type
of mounting system is well suited for sites where excavation is not possible such as
capped landfills and simplifies decommissioning or relocation of solar module
systems.

Roof Mounting:

Roof-mounted solar power systems consist of solar modules held in place by racks
or frames attached to roof-based mounting supports. Roof-based mounting supports
include:
 Pole mounts, which are attached directly to the roof structure and may use additional
rails for attaching the module racking or frames.
 Ballasted footing mounts, such as concrete or steel bases that use weight to secure
the panel system in position and do not require through penetration. This mounting
method allows for decommissioning or relocation of solar panel systems with no
adverse effect on the roof structure.
 All wiring connecting adjacent solar modules to the energy harvesting equipment
must be installed according to local electrical codes and should be run in a conduit
appropriate for the climate conditions.

Trackers:

Solar trackers increase the amount of energy produced per module at a cost of
mechanical complexity and need for maintenance. They sense the direction of the
Sun and tilt or rotate the modules as needed for maximum exposure to the light.

Fixed Racks:

Fixed racks hold modules stationary as the sun moves across the sky. The fixed rack
sets the angle at which the module is held. Tilt angles equivalent to an installation's
latitude are common. Most of these fixed racks are set on poles above ground.

 Solar panel maintenance

20
Solar panel conversion efficiency, typically in the 20 percent range, is reduced by
dust, grime, pollen, and other particulates that accumulate on the solar panel. "A
dirty solar panel can reduce its power capabilities by up to 30 percent in high
dust/pollen or desert areas", says Seamus Curran, associate professor of physics at
the University of Houston and director of the Institute for Nano Energy, which
specializes in the design, engineering, and assembly of nanostructures. For non- self-
cleaning solar arrays, regular cleaning from a professional window washing
company or by individuals can be performed on a regular schedule. According to A1
the Clear Choice, a California based company that performs commercial solar panel
cleaning services, “Solar panels are similar to the windows in your car, home
or business. They get dirty from rain, dust, pollen, soot, smog, auto emissions,
chimney ashes, bird droppings, leaves and other environmental debris. This dirt and
debris blocks sunlight from being absorbed into the panels, decreasing their
efficiency. The result is less energy for use in your business or for sale to your utility
company."

BATTERIES

 INTRODUCTION
An electric battery is a device consisting of one or more electrochemical cells that
convert stored chemical energy into electrical energy. Each cell contains a positive
terminal, or cathode, and a negative terminal, or anode. Electrolytes allow ions to
move between the electrodes and terminals, which allows current to flow out of the
battery to perform work.
Batteries come in many shapes and sizes, from miniature cells used to power hearing
aids and wristwatches to battery banks the size of rooms that provide standby power
for telephone exchanges and computer data centers. Batteries have much lower
specific energy (energy per unit mass) than common fuels such as gasoline. This is
somewhat offset by the higher efficiency of electric motors in producing mechanical
work, compared to combustion engines.

21
 Categories and types of batteries

Batteries are classified into primary and secondary forms.

Primary Batteries:

Primary batteries, or primary cells, can produce current immediately on assembly.

These are most commonly used in portable devices that have low current drain, are
used only intermittently, or are used well away from an alternative power source,
such as in alarm and communication circuits where other electric power is only
intermittently available. Disposable primary cells cannot be reliably recharged, since
the chemical reactions are not easily reversible and active materials may not return
to their original forms. Battery manufacturers recommend against attempting to
recharge primary cells.

Secondary Batteries:

Secondary batteries, also known as secondary cells, or rechargeable batteries, must

be charged before first use; they are usually assembled with active materials in the
discharged state. Rechargeable batteries are (re)charged by applying electric current,
which reverses the chemical reactions that occur during discharge/use. Devices to
supply the appropriate current are called chargers.

 Battery lifetime

Available capacity of all batteries drops with decreasing temperature. In contrast to

most of today's batteries, the Zamboni pile, invented in 1812, offers a very long
service life without refurbishment or recharge, although it supplies current only in
the Nano-amp range. The Oxford Electric Bell has been ringing almost continuously
since 1840 on its original pair of batteries, thought to be Zamboni piles.

 Battery sizes

Primary batteries readily available to consumers range from tiny button cells used
for electric watches, to the No. 6 cell used for signal circuits or other long duration

22
applications. Secondary cells are made in very large sizes; very large batteries can
power a submarine or stabilize an electrical grid and help level out peak loads.
Apart from Solar panel and Batteries, Rectifiers are also used in some industrial
applications.

BASICS OF INVERTER

In this chapter the basic information like definition of inverter, classification of

inverter, basic principle of inverter, performance parameters of inverter and
applications of inverter are described.

O WHAT IS AN INVERTER?

Inverter is a static circuit which converts power from DC source to AC at specified

output voltage and frequency. The output voltage can be fixed or variable at a fixed
or variable frequency.
DC inputs to the inverter

- Rectifier
- Batteries
- Fuel cell
- Photovoltaic array
- Magneto hydrodynamic generator

23
 CLASSIFICATION OF INVERTER

Table 4.1 Classification of inverter

24
 BASIC PRINCIPLE OF INVERTER

Figure 3.1(a) shows the power topology of a half-bridge Inverter, Switches Q1 and
Q2 are the gate commutated devices such as power BJTs, MOSFETs, GTO, IGBT,
MCT, etc. When closed, these switches conduct and current flows in the direction of
arrow. The operation of the circuit can be divided into two periods. The switching
states of inverter are shown in Table 3.1.
Where T0=1/f and f is the frequency of the output voltage waveform. Figure 3.1(b)
shows the waveforms for the output voltage and switch pulse for a resistive load.

Fig. 4.1(a) Circuit Diagram of Half Bridge inverter

25
 Fig. 4.1(b) Wave forms of Half Bridge inverter

Table 4.2 Switching States of Half bridge inverter

Switch Q1 is closed for half-time period (T0/2) of the desired ac output. It connects
point p of the dc source to point A and the output voltage e0 becomes equal to
+Vs/2. At t=T0/2, gating signal is removed from Q1 and it turns-off. For the next half-
time period (T0/2 t T0), the gating signal is given to Q2. It connects point N of the dc
source to point A and the output voltage reverses. Thus, by closing Q 1 and Q2
alternately, for half-time periods, a square-wave ac voltage is obtained at the output.
With resistive load, wave shape of load current is identical to that of output voltage.

 PERFORMANCE PARAMETERS OF INVERTER

The output voltage obtained from inverters is not a sine wave. It consists of
fundamental component plus certain harmonics. The presence of harmonics in the
output voltage waveform of inverters leads to poor load performance and reduced
system efficiency. Lower the harmonic content in the output voltage waveform
better is the quality of an inverter. Several performance parameters which evaluate
the quality of inverters are described below:-

 Harmonic factor of nth Harmonic (HFn)

Harmonic factor is a measure of the individual harmonic contribution in the output
voltage of an inverter.
It is defined as the ratio of rms voltage of a particular harmonic component to the
rms value of fundamental component.

26
 Enrmsis rms value of nth order harmonic component; Erms is rms value of
fundamental harmonic component.
 Total Harmonic Distortion (THD):
A Total harmonic distortion is a measure of closeness in shape between output voltage
waveform and its fundamental component.
It is defined as the ration of rms value of total harmonic components of output voltage
to the rms value of the fundamental component.

Enrmsis rms value of nth order harmonic component; E1rms is rms value of
fundamental harmonic component.

 Distortion factor (DF)

A distortion factor indicates the amount of harmonic remains in output voltage
waveform after the waveform has been subjected to second order attenuation.

 Lowest order harmonic (LOH)

The lowest frequency harmonic with a magnitude greater than or equal to 3% of the
magnitude of the fundamental component of the output voltage is known as LOH.

 APPLICATIONS OF INVERTER
Some of the important industrial applications of inverter are
1. Variable speed AC motor drives

27
2. Induction heating
3. Uninterruptible power supplies(UPS)
4. High voltage DC transmission (HVDC)
5. Air craft power supplies
6. Battery operated vehicle drives
7. Regulated voltage and frequency power supplies

MULTILEVEL INVERTER

 INTRODUCTION
The voltage source inverter produces voltage or current with levels either 0 or
±VDC. They are known as the three level inverters. To obtain a quality output voltage
or current waveform with minimum amount of ripple content, they require high
switching frequency along with different PWM strategies. In high power and high
voltage applications, these three level inverters, however, have some limitations in
operating at high frequency due to the switching losses and constrains of device
ratings.
A multilevel inverter is one in which a complete cycle of output waveform contains
more than three DC levels. It may be easier to produce a high power, high voltage
inverter with the multilevel structure because of the way in which device voltage
stresses are controlled in the structure. Increasing the number of voltage levels in the
inverter without requiring higher ratings on individual devices can increase the
power rating. A multilevel inverter not only achieves high power ratings, but also
enables the use of renewable energy sources. Renewable energy sources such as
photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel inverter
system for a high power application.

 TYPES OF MULTILEVEL INVERTER

The multilevel inverters can be classified into three types

28
(i) Diode clamped multilevel inverter
(ii) Flying capacitor multilevel inverter
(iii) Cascaded multilevel inverter

 CASCADED MULTILEVEL INVERTER

A cascaded multilevel inverter consists of a series of H-bridge (single phase full
bridge) inverter units. The general function of multilevel inverter is to synthesize a
desired voltage from several separate DC sources (SDCSs), which may be obtained
from batteries, fuel cells, or solar cells. Fig. 4.1(a) shows the basic structure of single
phase cascaded inverter. The AC terminal voltages of different level inverters are
connected in series. In general in cascaded multilevel inverter n DC source or n H-
bridges are connected for 2n+1 level. So, in fig. 4.1(a) it is shown that three H-
bridges are connected in series to produce seven levels in output voltage.

Fig.5.1 (a) cascaded multilevel inverter

29
 Fig.5.1 (b) Switching pulses and output waveforms

Fig. 4.1 (b) shows the synthesized voltage waveform of seven-level cascaded inverter
with three SDCSs. The phase output voltage is synthesized by the sum of three
different voltage outputs, VAN = VH1 +VH2 +VH3. Each inverter level can generate
three different voltage outputs, +E, 0, -E, by connecting the DC source to AC output
side by different combinations of the four switches, S1, S2, S3, and S4. Using top level
as the example, turning ON S11 and S21 yields VH1= +E. Turning ON S31 and S41
yields VH1= -E. Turning OFF all switches yields VH1= 0. Similarly AC output
voltage at each level can be obtained in same manner. Controlling the conducting
angles at different inverter levels can minimize the harmonic distortion of the output
voltage.

 ADVANTAGES OF CASCADED INVERTER

The major advantages of the cascaded inverter can be summarized as follows:-

1. Compared with the diode-clamped and flying capacitors inverters, it requires the
least number of components to achieve the same number of voltage levels.
2. Optimized circuit layout and packaging are possible because each level has the same
structure and there are no extra clamping diodes or voltage-balancing capacitors.
3. Soft-switching techniques can be used to reduce switching losses and device stresses.

30
  DISADVANTAGES OF CASCADED INVERTER
The major disadvantage of the cascaded inverter are as follows:
 It needs separate dc sources for real power conversions, thereby limiting its
applications.

 APPLICATIONS OF MULTILEVEL INVERTERS

The most common applications of multilevel inverters are:
1. Reactive power compensation
2. Back-to-back intertie
3. Variable speed drives

CONTROLLER AND DRIVER

 CONTROLLER
 AVR Micro controller

The AVR is a modified Harvard architecture 8-bit RISC single-chip microcontroller,

which was developed by Atmel in 1996. The AVR was one of the first
microcontroller families to use on-chip flash memory for program storage, as
opposed to one-time programmable ROM, EPROM, or EEPROM used by other
microcontrollers at the time.

 Architecture

The AVR architecture is shown in fig.5.1

The main function of the CPU core is to ensure correct program execution. The CPU
must therefore be able to access memories, perform calculations, control peripherals
and handle interrupts.
In order to maximize performance and parallelism, the AVR uses a Harvard
architecture – with separate memories and buses for program and data.

31
Instructions in the program memory are executed with a single level pipelining.
While one instruction is being executed, the next instruction is pre-fetched from the
program memory. This concept enables instructions to be executed in every clock
cycle. The program memory is In-System Reprogrammable Flash memory.
The fast-access Register file contains 32 x 8-bit general purpose working registers
with a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit
(ALU) operation. In a typical ALU operation, two operands are output from the
Register file, the operation is executed, and the result is stored back in the Register
file – in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers
for Data Space addressing – enabling efficient address calculations. One of these
address pointers can also be used as an address pointer for look up tables in Flash
Program memory. These added function registers are the 16-bit X- register, Y-
register and Z-register, described later.

32
 Fig. 6.1 Architecture of AVR controller

The ALU supports arithmetic and logic operations between registers or between a
constant and a register. Single register operations can also be executed in the
ALU. After an arithmetic operation, the Status Register is updated to reflect
information about the result of the operation.
“Program flow is provided by conditional and unconditional jump and call
instructions, able to directly address the whole address space. Most AVR
instructions have a single 16-bit word format. Every program memory address
contains a 16- or 32-bit instruction.
Program Flash memory space is divided in two sections, the Boot Program section
and the Application Program section. Both sections have dedicated Lock bits for
write and read/write protection. The SPM instruction that writes into the Application
Flash Memory section must reside in the Boot Program section.
During interrupts and subroutine calls, the return address Program Counter (PC) is
stored on the Stack. The Stack is effectively allocated in the general data SRAM,
and consequently the stack size is only limited by the total SRAM size and the usage
of the SRAM. All user programs must initialize the SP in the reset routine (before
subroutines or interrupts are executed). The Stack Pointer – SP – is read/write
accessible in the I/O space. The data SRAM can easily be accessed through the five
different addressing modes supported in the AVR architecture.
A flexible interrupt module has its control registers in the I/O space with an
additional global interrupt enable bit in the Status Register. All interrupts have a
separate interrupt vector in the interrupt vector table. The interrupts have priority in
accordance with their interrupt vector position. The lower the interrupt vector
address, the higher the priority.
The high-performance AVR ALU operates in direct connection with all the 32
general purpose working registers. Within a single clock cycle, arithmetic operations
between general purpose registers or between a register and an immediate are
executed. The ALU operations are divided into three main categories – arithmetic,
logical, and bit-functions. Some implementations of the architecture also provide a
powerful multiplier supporting both signed/unsigned multiplication and fractional
format.

33
 Features

The AVR is an 8-bit RISC single-chip microcontroller with Harvard architecture

that comes with some standard features such as on-chip program (code) ROM, data
RAM, data EEPROM, timers and I/O ports.
Most AVRs have some additional features like ADC, PWM, and different kinds of
serial interface such as USART, SPI, I2C (TWI), CAN, USB, and so on.

 DRIVER
Driver is used to drive the switch from the pulses available from controller.
 IR2110 Driver
The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers
with independent high and low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable ruggedized monolithic construction.
Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high pulse current buffer stage designed for
minimum driver cross-conduction. Propagation delays are matched to simplify use
in high frequency applications. The floating channel can be used to drive an N-
channel power MOSFET or IGBT in the high side configuration which operates up
to 500 or 600 volts.

34
Fig. 6.2 Circuit for Driver

35
 Fig. 6.3 Pin diagram of IR2110

 COMPARISON OF DIFFERENT TYPES OF INVERTER OUTPUTS

This chapter shows comparison between different types of inverter outputs.

Different waveforms and THD spectrums are compared with pure sinusoidal
waveform. Five different waveforms and THD that compared here with sinusoidal
wave are:
1. Square wave inverter
2. Pulsated square wave inverter
3. PWM inverter
4. Cascade inverter with staircase topology
5. Cascade inverter with PWM topology
The wave forms and Fourier analysis of above mentioned are shown in fig.6.1.
Table 6.1 shows the comparison of above mentioned waveforms

36
Fig. 6.4 Wave forms and their respective THD spectrums

37
 Table 6.1 Comparison of different waveforms and THD

From table 6.1 it can be conclude that PWM inverter output has minimum THD level
of 10.583946% and after that cascade inverter has 14.13905% THD level. As
mentioned in 3.1 that in high power and high voltage applications three level
inverters have some limitations in operating at high frequency due to the switching
losses and constrains of device ratings. So that for high power application or to
reduce switching losses we should go for cascaded multilevel inverter for quality
output. In cascaded multilevel inverter by applying proper switching angles and by
adding harmonic filter to the circuit we can reduce furthermore THD. Calculation
for switching angle to minimize THD level is shown is next chapter.

 FOURIER ANALYSIS OF MULTILEVEL INVERTER

In this chapter, Fourier analysis of multilevel inverter is done. For three H-Bridges
the ratio of input source is 1:1:1 that means all three sources have same value. Let’s
take V as input DC source voltage for single H- Bridge and Vout as the output voltage.
The fourier analysis of any wave form is done for the interval –π to π. So, for this
interval the shape of output wave form is shown in fig.7.1. According to levels of
output the wave form is divided in to 13 parts.

38
 Fig.6.5 wave shape for –π to π interval

Table 6.2 output voltage with switching interval

39
 FOURIER SERIES

Due to half wave symmetry along x-axis, both Fourier coefficients ao and an
become zero.

Solution of this equation is given by,

Where, n is harmonic order and ϕ1, ϕ2, ϕ3 are independent switching angles. The
coefficient 4V/ π represents the peak value of maximum fundamental voltage of an
H-bridge cell.
The three independent angles can be used to eliminate two harmonics in V out and
also provide an adjustable modulation index.
Modulation index is defined by,

Where Vout is the peak value of fundamental voltage and H is the number of H
bridge cells per phase.

 SELECTIVE HARMONIC ELIMINATION METHOD

In selective harmonic elimination method we can eliminate any selected
harmonic from waveform.
For seven level Cascaded H-Bridge inverter with 3rd and 5th harmonic elimination the
following equation can be formulated.
cos ϕ1 + cos ϕ2 + cos ϕ3 =3m
cos3 ϕ1 + cos3 ϕ2 + cos3 ϕ3 =0
cos5 ϕ1 + cos5 ϕ2 + cos5 ϕ3 =0
Solution of these equations is,

40
ϕ1=8.76
ϕ2=28.68
ϕ3=54.93 for m=0.8

CONTROLLER CIRCUIT
This chapter is based on the practical consideration of controller circuit.

 AVR ATMEGA 16 MICRO CONTROLLERS

Fig.8.1 Shows the Pin diagram of AVR atmega 328 micro controller

Fig. 7.1 Pin diagram

41
 Important Specifications of ATmega328P

We have already seen couple of important specifications of ATmega328P in

the previous section. Here are some more specifications for your reference.

 8-Bit AVR Microcontroller

 Modified Harvard RISC Architecture
 32KB Flash Memory
 1KB EEPROM
 2KB SRAM
 Two 8-bit Timer/Counters
 One 16-bit Timer/Counter
 Six PWM Channels
 Eight 10-Bit ADC Channels in 32-lead QFP and 32-pad QFN Packages
 Six 10-Bit ADC Channels in 28-pin DIP and 28-pad QFN Packages
 USART, SPI and I2C Interfaces
 Watchdog Timer, Pin Change Interrupt and Wake-up
 Power-on Reset, Internal and External Interrupts
 Operating Voltage:1.8V to 5.5V for 0 – 4MHz, 2.7V to 5.5V for 0 – 10MHz
and 4.5V to 5.5V for 0 – 20MHz speed grades.
 Active Mode Power Consumption of 0.2mA at 1.8V and 1MHz
 Power Down Mode Consumption of 0.1µA at 1.8V and 1MHz

As always, these specifications are just for reference only. For more in-depth
details on all the specifications, we suggest you to go through the datasheet.

 ATmega328P Pinout and IC Packages

The ATmega328P is available in 4 IC Packages. The pinout and pin

configuration slightly vary between the packages.
42
  32-Lead TQFP (Thin Quad Flat Pack with Leads)
 28-Pin SPDIP (Shrink Plastic Dual In-Line Package)
 32-Pad VQFN (Very Thin Quad Flat No-Leads)
 28-Pad VQFN (also known as MLF – Micro Lead Frame)

In the following image, we put out all the four packages of ATmega328P.

 CIRCUIT DIAGRAM

Fig. 7.2 Circuit Diagram of Arduino controller

43
 Fig. 7.3 Power supply for Micro Controller

 DESIGN OF INVERTER
This chapter contains information about circuit of inverter.
In our project we need five half bridge circuits for six levelinverter.

Fig. 7.4 Main Circuit

44
Fig 7.5 Isolation Circuit

Fig.7.6 Power Circuit

45
 DEVICES USED FOR CIRCUIT

MOSFET – IRF-540N
Driver – IRF 2110
Opto Isolator –
MCT2E
Voltage Regulator – 7805
Power Capacitors – 100 V, 1000uF
Resistors – SMD and through hole
Transformer – 48V, 5A and 15V,
500mA Adaptors- 15V, 2A

Fig.7.7 (a) Circuit connection

46
 Fig.7.7 (b) H-Bridge connection

Controlling pulses for positive half cycle and negative half cycle are shown in
fig.10.3 (a) and fig.10.3 (b) respectively. Pulse parameters of these pulses are shown
in table 10.1 and table 10.2 respectively.

Fig.7.8 (a) Pulses for positive half cycle

47
Table 7.1 Pulse parameters for positive half cycle

Fig. 7.8 (b) Pulses for negative half cycle

Table 7.2 Pulse parameters for negative half cycle

48
 Fig.7.9 output voltage waveforms

Fig.7.10THD of output waveforms

The THD of output voltage waveform is 10.475182. To remove further more

harmonics we can add harmonic filter in the circuit. From fig 10.5 we can see that
13th order and 17th order harmonics are dominating harmonics so 15th order harmonic
filter can be added which can remove both 13th and 17th order harmonics and reduce
THD.
A circuit diagram of multilevel inverter with harmonic filter is shown in fig.10.6

49
Fig.7.11 Circuit diagram with 15th order filter

Fig.7.12 output of circuit with filter

50
 Fig.7.13 THD of output waveforms

From fig.10.8 we can see that 13th and 17th order harmonics are totally eliminated and
THD of the output waveform is 5.300176.

Pulses

51
 CONCLUSION
From the above all discussion we can conclude that in cascaded
multilevel inverter topology with proper switching angle and
conduction period derived from the calculation based on Fourier
analysis we can eliminate considerable amount of harmonics and we
can reduce THD and by adding harmonic filter of proper frequency
THD can be reduced at further more amount at least in software based
s simulation.
So, finally by using proper switching angles and by adding filter we
have reached at the THD level of 5.30017% which indicates that the
wave forms are nearer to the fundamental sinusoidal waveforms.

REFERENCES
1. Zhong Du, Leon .M. Tolbert, John N. Chiasson, Burak
Ozpineci “A cascade multilevel inverter using a single DC
source.” Applied Power Electronics Conference and
Exposition, 2006. APEC '06. Twenty-First Annual IEEE 19-
23, March 2006.
2. Gobinath.K, Mahendran.S, Gnanambal.I “New Cascaded H-
bridge multilevel inverter with improved efficiency”
International Journal of Advanced Research in Electrical,
Electronics and Instrumentation Engineering Vol. 2, Issue 4,
April 2013.
3. Muhammad H. Rashid, Third edition, “Power electronics
circuit, device and application”, Chap.9 pp. 406, 417-422
Prentice Hall of India.
4. M D Singh, K B Khanchandani. Second edition, “Power electronic”,
Chap.9 pp.
437-439, 451, 452, 657-662 Tata McGraw Hill Education Private
Limited.
5. Bin Wu, “High-power converters and ac drives”, Chap.7 pp.
126, 139-141IEEE Press, John Wiley & Sons, Inc., Publication.
6. Daher, J. Schmid and F. Antunes, "Multilevel inverter 43
topologiesfor
“AUTOMATIC ROOM stand- WITH
LIGHT CONTROLLER alone PV systems",
BIDIRECTIONAL IEEE Trans. Ind.
VISITOR COUNTER”
Electron., vol. 55, no. 7, pp. 2703-2712, Jul. 2008.
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University Press, 2001.
 43
“AUTOMATIC ROOM LIGHT CONTROLLER WITH BIDIRECTIONAL VISITOR COUNTER”