20a04504a Computer Architecture & Organization

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Code: 20A04504a R20

B.Tech III Year I Semester (R20) Regular Examinations January 2023


COMPUTER ARCHITECTURE & ORGANIZATION
(Electronics & Communication Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
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1 Answer the following: (10 X 02 = 20 Marks)
(a) Draw the block diagram of a digital computer. 2M
(b) What is the function of DR and TR registers? 2M
(c) Draw the block diagram of microprogrammed control organisation. 2M
(d) What is LIFO? 2M
(e) Convert the (246)7 to decimal. 2M
(f) What is partial remainder? 2M
(g) What is the impact of the cache on overall performance of the computer? 2M
(h) What is the need of I/O interface module? 2M
(i) Write the advantage of RISC over CISC? 2M
(j) Write the classification of multiprocessors. 2M

PART – B
(Answer all the questions: 05 X 10 = 50 Marks)

2 What is micro operation? Briefly explain the arithmetic micro-operations? 10M


OR
3 Explain the following: (i) Bus and memory transfers. (ii) Shift micro operations. 10M

4 (a) What are subroutines? Explain. 5M


(b) Differentiate Micro programmed control and Hardwired control. 5M
OR
5 What do you mean by addressing mode? Explain the following addressing modes with 10M
examples: (i) Index addressing mode. (ii) Relative addressing mode.

6 Explain about floating point arithmetic operations. 10M


OR
7 Explain about decimal arithmetic operations. 10M

8 Draw the block diagram of a DMA controller and explain its functioning? 10M
OR
9 Explain the READ and WRITE operations in associative memory. 10M

10 Explain the instruction pipeline processing in RISC architecture. 10M


OR
11 Explain about interprocessor communication and synchronization. 10M

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