1004 Journal of Power Electronics, Vol. 17, No. 4, pp.

1004-1013, July 2017

https://doi.org/10.6113/JPE.2017.17.4.1004
JPE 17-4-16 ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

An Interleaving Scheme for DC-link Current Ripple

Reduction in Parallel-Connected Generator Systems
Min-Gyo Jeong*, Hye Ung Shin*, Ju-Won Baek**, and Kyo-Beum Lee†
*,†
Department of Electrical and Computer Engineering, Ajou University, Suwon, Korea
**
Power Conversion Research Center, Korea Electrotechnology Research Institute, Changwon, Korea

Abstract
This paper presents an interleaving scheme for parallel-connected power systems to reduce the DC-link current ripple. A
paralleled generator system generates current ripple by the Pulse Width Modulation (PWM) of each generator side converter.
The current ripple in the DC-link degrades the efficiency of the whole generator system and decreases the lifetime of the DC-link
capacitors. To mitigate these issues, the expression of the DC-link current is derived by a double-integral Fourier analysis while
considering the modulation schemes. Optimized interleaving angles for the parallel generator system are obtained based on an
analysis to minimize the dominant current harmonics component. Finally, the proposed interleaving scheme reduces the RMS
value of the DC-link current ripple. Simulation and experimental results verify the effectiveness of the proposed interleaving
scheme.

Key words: Double-integral Fourier analysis, DC-link current ripple, Interleaving scheme, Parallel-connected generator systems

shown in Fig. 1, a summation of the currents harmonics from

I. INTRODUCTION
each converter generates current ripple for a common
The capacity of power converters has increased rapidly DC-link capacitor. The current harmonics are generated as a
with the increased energy demand of generator systems. result of the PWM switching in each generator side converter.
Many studies have been presented on the design of high The current ripple causes an increase of the internal
voltage and high current converters [1]-[6]. One solution is temperature, and a decrease of the capacitor lifetime. In
the parallel connection of multiple lower power units [7]. addition, it also aggravates the reliability and power loss of
Without the current pressure increase of a single switching the generator system. Therefore, a DC-link current ripple
device, parallel operation can effectively increase the total reduction scheme is necessary in N-parallel connected
current. In addition, converter capacity can also be extended generator systems.
by using available power semiconductors. As mentioned earlier, the DC-link current in a parallel
When N power devices are connected in parallel, the rated system is generated by a summation of the current harmonics
current of each power device can be reduced to 1/N. Instead from the connected converters. Under this circumstance, the
of a simple diode rectifier, a back-to-back power converter phase-shifted switching cycles lead to variations of the
with a generator-side inverter can be applied in generator current ripple. Thus, using an interleaving method with an
systems due to several advantages such as a high power optimal angle can effectively reduce the current ripple [11],
factor, a high efficiency and bidirectional power flow [12]. Refs. [13]-[18] discussed the performance of an
capability [8]-[10]. However, when the N-parallel power interleaving scheme in a parallel system, and Ref. [16]
converters consist of two-level back-to-back converters, as provided examples of 3-parallel-connected photovoltaic
modules. Furthermore, Ref. [17] verifies the performance of
Manuscript received Dec. 23, 2016; accepted Apr. 12, 2017
Recommended for publication by Associate Editor Hao Ma. an interleaving scheme with a current ripple analysis in a
†
Corresponding Author: [email protected] parallel voltage-source converter system. In addition, Ref.
Tel: +82-31-219-2376, Fax: +82-31-212-9531, Ajou University [18] applied an interleaving scheme to a hybrid electric
*
Dept. of Electrical and Computer Eng., Ajou University, Korea
**
Power Conversion Research, KERI, Korea vehicle, while considering the operation mode of the motor.

© 2017 KIPE
 An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected … 1005

II. DC-LINK CURRENT HARMONICS ANALYSIS

This section briefly analyzes the current harmonics
generated by the PWM switching of generator side converters.
In order to analyze the current harmonics of each PWM
scheme under the same conditions, the converter AC line
currents are assumed to be purely sinusoidal for the
harmonics analysis of the DC current waveform [17]. The
double-integral Fourier series is employed in this paper to
analyze the current harmonics. The analysis is mainly carried
out for the system shown in Fig. 1, which consists of
3-parallel-connected generators with a common DC-link.
The DC-link current from generator side converter1 is
Fig. 1. 3-parallel-connected generator topology. expressed as:
idc1(t )  ia (t ) Sa (t )  ib (t ) Sb (t )  ic (t ) Sc (t ) (1)
However, the authors did not provide experimental results.
Although many methods have been proposed for DC-link where, the i(t) is the phase current and S(t) is the switching
current ripple reduction in various applications, there is not function for each of the phase legs. The switching function is
much discussion or analysis of generator applications. In expressed as:
addition, wind generators systems [2], hydropower generators 1, if top switch is turn-on
S (t )   (2)
systems [19], engine generators systems [20] and so on are 0, if bottom switch is turn-on
commonly used generator applications that use a permanent For PWM switched waveforms, the most effective
magnet synchronous generator (PMSG) with a back-to-back approach is the double-integral Fourier form, instead of the
topology. However, there is no research on the DC-link conventional integral form [23]. The double-integral Fourier
current ripple reduction method when it is connected in is presented as:
parallel. As a result, a current ripple reduction method that Cmn  Amn  jBmn
considers the characteristics of the generator needs to be 1  
researched.  2   F ( x, y )e j (mx  ny )dxdy (3)
2  
The Fourier series [21], sampling theory [22], and ( x  ct  c , y  ot  o )
double-integral Fourier analysis [23] are general methods for
PWM switched waveform analysis. Among these methods, where Amn and Bmn are amplitudes of the harmonics m (of the
the double-integral Fourier is accurate and relatively simple switching frequency) and n (of the modulating frequency). In
for analyzing the PWM characteristics in the frequency addition, ωc and θc are the angular frequency and initial phase
domain by providing a strict mathematical method. Due to of the carrier waveform, while ωo and θo are the angular
these advantages, the double Fourier approach is commonly frequency and initial phase of the reference waveform,
used to obtain an exact analysis of harmonics components. respectively. F(x, y) is the switched waveform for one
In this paper, Sinusoidal PWM (SPWM), Space Vector fundamental cycle. This equation separates the integration of
PWM (SVPWM), and Discontinuous PWM (DPWM) are the switched waveform across the whole fundamental period,
considered as modulation schemes, and they are analyzed by so that the two parts can be separately evaluated to determine
the double-integral Fourier analysis method with the harmonics co-efficient.
consideration of the characteristics of the generator control The switching function for a complete time varying
system. Together with the above analysis, the optimal switched waveform can be defined in the sinusoidal
interleaving angle is determined for the PWM carrier waves. harmonics form as:
A 
The DC-link current ripple is reduced in an N-paralleled S (t )  00   [ A0n cos(ny )  B0n sin(ny )]
converter system by conducting an interleaving scheme with 2 n 1
the calculated optimal angle. The effectiveness of the 
proposed interleaving scheme is analyzed based on a   [ Am0 cos(mx)  Bm0 sin(mx)] (4)
m 1
3-parallel-connected generator system with PMSGs.
This paper is organized as follows. Section II analyzes the  
current harmonics for each of the PWM switching schemes.
   [ Amn cos(mx  ny )  Bmn sin(mx  ny )]
m 1 n 
Section III presents an interleaving scheme with the selection n0
of the optimized angle. Section IV and V discuss simulation A time varying switched waveform can be represented by a
and experimental results to verify the performance of the summation of the DC component and the fundamental
proposed scheme. Section VI concludes the paper. harmonics of the reference waveform, the carrier harmonics
1006 Journal of Power Electronics, Vol. 17, No. 4, July 2017

of the carrier waveforms, and the sideband harmonics of both

the reference and carrier waveforms as shown in the above
equation.
The DC-link current generated by generator side
converter1 can be redefined in the frequency domain as:
idc1(m, n)  ia (m, n)  Sa (m, n)  ib (m, n)  Sb (m, n)
(5)
 ic (m, n)  Sc (m, n)
where, ia(m,n), ib(m,n), and ic(m,n) are Fourier transforms of
the phase currents, Sa(m,n), Sb(m,n), and Sc(m,n) are Fourier
transforms of the switching functions, and  is the Fig. 2. DC-link current harmonics (SPWM).
convolution operator.
The DC-link current in the Fourier transform can be I peak  2
obtained from Eq. (4) and the three-phase currents. Amn  cos([m  n] )[1  2cos(n )]
m 2 3 (11)
Consequently, the DC-link current in the time domain can be  
obtained by an inverse Fourier transform of Eq. (5).  [ J n+1 (m M )  J n-1 (m M )]
2 2
A number of papers [17], [26] have introduced methods to
From Eqns. (10) and (11), the possible dominant
calculate the current harmonics in idc. In particular, the power
harmonics component is assumed to exist among the pairs of
factor is one of the most important values in terms of the
(m, n) as (1, -3), (1, 3), and (2, 0).
harmonics components distribution. However, the power
By substituting Eqns. (10) and (11) into the pairs of (m, n),
factor in a generator system is almost equal to 1.
the amplitudes of the possible dominant ac-harmonics
Consequently, this paper does not consider the power factor.
component for the DC-link current are calculated as Eqns.
A. Current Harmonics Analysis for SPWM (12) and (13), respectively.
The switching function is determined by the PWM scheme. 3I peak  
idc1(1,3)  idc1(1, 3)  J 4 ( M )  J 2 ( M ) (12)
When the generator side converter conducts the SPWM  2 2
switching, the DC-link current can be expressed as Eq. (6)
3I peak
when neglecting the phase current harmonics, by using the idc1 (2,0)  J 1 ( M ) . (13)
2
double-integral Fourier series analysis.
  In Eq. (12), since the values of J4 and J2 are similar, the
idc1(t )  A00    [ Amn cos(mx  ny)
(6)
amplitudes of idc1(1, 3) and idc1(1, -3) are very small.
m 1 n 
Consequently, the dominant harmonics component is idc1 (2,
 Bmn sin(mx  ny)]
0), which is the second-order switching harmonics
The double-integral Fourier coefficients in Eq. (6) of the component.
DC-link current are defined as Eqns. (7)-(9). Fig. 2 shows the normalized DC-link current harmonics by
3M using a Fast Fourier Transform (FFT) of the PSIM simulation,
A00  I cos (7)
4 peak with the x-axis being the order of the switching frequency and
I peak  2 the y-axis being the magnitude of the harmonic. Where fc is
Amn  cos([m  n] )[1  2cos(n )]cos  the frequency of the carrier waveform and Io is peak value of
m 2 3 (8)
  the phase current. The figure also shows that the dominant
 [ J n+1 (m M )  J n-1 (m M )]
2 2 current harmonics component is located in the second-order
I peak  2 switching frequency.
Bmn  cos([m  n] )[1  2cos(n )]sin 
m 2 3 (9) B. Current Harmonics Analysis for SVPWM
 
 [ J n+1 (m M )  J n-1 (m M )] In order to analyze a complex PWM scheme, the numerical
2 2
integral is conducted in this section. The DC-link current can
where, M is the modulation index (0 < M < 1), Ipeak is the
be represented as a piecewise function. The SVPWM scheme
peak value of the phase current, φ is the displacement angle,
has six sectors during a fundamental cycle. The double
and Jn(x) is the n-th Bessel function [23]-[25].
integral Fourier analysis can be applied to the DC-link
The displacement angle φ is considered to be 0 in the
current in each of the sectors. Table I shows the integral
generator system since the power factor is almost 1. The
limits of the six sectors. These integral limits can be applied
DC-link current Eq. (6) can be expressed as follows [17]:
to Eq. (3) for the analysis of the current harmonics. For
3M  
idc1  I peak    Amn cos(mx  ny ) (10) example, the double-integral Fourier analysis applied to the
4 m 1 n  DC-link current in sector I is indicated as:
 An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected … 1007

TABLE I TABLE II
DOUBLE-FOURIER INTEGRAL LIMITS FOR SVPWM DOUBLE-FOURIER INTEGRAL LIMITS FOR DPWM
y Rising edge of x Falling edge of x y Rising edge of x Falling edge of x
  3M   3M   
0 y  [1  cos( y  )] [1  cos( y  )]   y  
3 2 2 6 2 2 6 6 6

 2  3M  3M   3M  3M 
 y  [1  cosy] [1  cosy]  y  cos( y  )  cos( y  )
3 3 2 2 2 2 6 2 2 6 2 6

2  3M   3M   5 3M  3M 
 y  [1  cos( y  )] [1  cos( y  )]  y  [1  cos( y  )]  [1  cos( y  )]
3 2 2 6 2 2 6 2 6 2 6 2 6

4  3M   3M  5 7
 y  [1  cos( y  )] [1  cos( y  )]  y 0 0
3 2 2 6 2 2 6 6 6

4 5  3M  3M 7 3 3M  3M 
 y  [1  cosy] [1  cosy]  y  [1  cos( y  )]  [1  cos( y  )]
3 3 2 2 2 2 6 2 2 6 2 6

5  3M   3M  3 11 3M  3M 
 y  2  [1  cos( y  )] [1  cos( y  )]  y  cos( y  )  cos( y  )
3 2 2 6 2 2 6 2 6 2 6 2 6

different types of DPWM can be identified in the literature:

120° DPWM, 60° DPWM, and 30° DPWM. A 60° DPWM
can reduce the switching frequency by retaining the switch
state as turn ON or turn OFF during a 60° period when the
magnitude of the phase voltage is largest. This paper uses the
60° DPWM scheme. Table II shows the double-Fourier
integral limits for the 60° DPWM scheme. Because of the
discontinuous period, the integral limits of the rising edge and
falling edge maintain constant values during a 60° period.
When the generator side converter conducts the DPWM
Fig. 3. DC-link current harmonics (SVPWM).
scheme, the DC-link current harmonics can be numerically
analyzed in a way that is similar to that of the SVPWM by
  3M 
1 [1
cos( y  )] using Table II.
Cmn1  3
  2 2 6 idc1e j ( mx  ny ) dx dy (14)
2 2 0  3M  The example of the numerical analysis for DPWM can be
 [1 cos( y  )]
2 2 6 expressed as:
The double-integral Fourier analysis in a fundamental 
1  j ( mx  ny )
cycle can be achieved by adding all of the results of each Cmn1   6  idc1e dx dy (16)
sector as: 2 2
6
6 The dominant current harmonics component for the
Cmn   Cmni (15)
DPWM scheme is variable, and it depends on the modulation
i 1
index. Based on a numerical analysis, the first-order
According to the results of the analysis for the SVPWM,
switching frequency possesses dominant current harmonics
the dominant current harmonics component is located at the
components for most cases. Fig. 4 shows simulation results of
second-order switching frequency. Simulation results for the
the DC-link current harmonics for the DPWM scheme. This
DC-link current harmonics on the frequency domain have
figure shows that the dominant current harmonics component
been obtained, as shown in Fig. 3. In this figure, the dominant
is the first-order switching frequency. Because the dominant
current harmonics component is the second-order switching
current harmonics component in the DPWM is different from
frequency, which is the same as the results with the numerical
that for both the SPWM and the SVPWM, the proposed
analysis.
optimal interleaving angle for the system is changed.
C. Current Harmonics Analysis for DPWM
DPWM schemes are an effective modulation technique III. PROPOSED INTERLEAVING SCHEME FOR
that can be employed to reduce switching losses. Three DC-LINK CURRENT RIPPLE REDUCTION
1008 Journal of Power Electronics, Vol. 17, No. 4, July 2017

Eq. (21) shows that making the 1 2 term

equal to 0 can eliminate specific DC-link current harmonics.
This term can be determined by the interleaving angle θ. In
this paper, the optimal interleaving angle is defined as an
angle that can eliminate the dominant DC-link current
harmonics. As mentioned earlier, since the dominant current
harmonics component is located at a different frequency, the
optimal interleaving angle is also different depending on the
PWM scheme. The optimal angle can be normalized, as
shown in Eq. (22):
Fig. 4. DC-link current harmonics (DPWM).
(1 e jm  e jm2 )  (1 cos m  cos2m)2  (sin m  sin2m)2

 3  2(2cos m  cos 2m) (22)

 3  2(cos2 m  2cos m 1)

As a result, the selected DC-link current harmonics

component can be cancelled with cosmθ = -1/2, which can be
obtained by shifting the carrier waveform by about θ
Fig. 5. Definition of the interleaving angle. (=2π/3m). Based on the analysis in section II, the optimal
interleaving angle for SPWM and SVPWM is π/3, since the
The use of an interleaving scheme for parallel systems can dominant current harmonics component with these PWM
decrease the current ripple flowing through the DC-link schemes is located in the second-order switching frequency
capacitor. The interleaving (i.e. phase-shifting) PWM (m=2). Similarly, the interleaving angle for the DPWM
switching cycle of individual generator side converters at an scheme, which usually has the dominant current harmonics
optimal angle can reduce the total current ripple due to PWM component in the first-order switching frequency (m=1) is
switching at the ac terminal. This section proposes an optimal 2π/3 according to Eq. (22). This method to decrease the
interleaving angle for parallel-connected generator systems current ripple can be applied to an N-parallel system in a
based on a DC-link current harmonics analysis. Fig. 5 shows similar way.
the definition of the interleaving angle θ (0 < θ < 2π). Since The DC-link current ripple is expressed with an RMS
the interleaving scheme shifts the phase angle of the carrier value that can be calculated as [27]:
wave form, the angle of the carrier wave for each of the  
2 ( m, n )
converters can be expressed as: RMS idc=   idc (23)
c 2  c1   (17) m 1 n 

c3  c1  2 (18) Fig. 6 shows the actualization process of the interleaving
Considering the even distribution of the output currents scheme of 3-parallel-connected generator systems with a
from each of the converters, the DC-link current harmonics decreased DC-link current ripple. First, the parallel-connected
from each of the converters with the interleaving scheme can PMSGs are controlled with the reference q-axis current to
be defined as: generate power. Furthermore, the grid side converter controls
the voltage of the DC-link with a constant value for the
idc3_ h (m, n)  idc 2 _ h (m, n)e jm  idc1_ h (m, n)e jm2 (19)
power factor control of the system.
The current idc flowing through the capacitor can be The current controller creates the references of the
expressed as a summation of the DC-link current from each modulation voltage signal. Then they are used to control the
of the converters, as shown in Eq. (20). generator side converter switching, using the considered
idc  idc1  i dc2  idc3 (20) PWM schemes (SPWM, SVPWM, and DPWM). The carrier
From Eqns. (19) and (20), the amplitude of the total waves used in the PWM schemes are determined by the
DC-link current ripple from the generator side converters proposed interleaving scheme. Thus, this simple method
with the interleaving scheme can be represented as: achieves a reduced current ripple in the DC-link for a parallel
system.
idc _ h  idc1_ h (m, n)  idc 2_ h (m, n)  idc3_ h (m, n)

 idc1_ h (m, n)(1  e jm  e jm2 ) (21) IV. SIMULATION RESULTS

 idc1_ h (m, n) (1  e jm  e jm 2 ) Simulations are performed using the PSIM software tool to
demonstrate the validity of the proposed method. Table III
 An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected … 1009

Fig. 6. Block diagram of the 3-parallel generator system control using the proposed scheme.

TABLE III
GENERATOR SPECIFICATIONS
Rs 0.158 Ω
Ld 1.55 mH
Lq 1.76 mH
P (Pole) 8
Rated power 5.5 kW
Rated speed 1750 rpm
Rated torque 2.02 N·m (a)
Rated current 13.5 Arms

shows the PMSG specification and parameters.

The sampling time for the system control is 100 μs, and the
switching frequency of the converter is set to 10 kHz in
accordance with the experimental setting. The q-axis currents
of the PMSGs are controlled to 3 A with constant speed loads,
which are controlled to 750 rpm, to generate power.
To focus on the effectiveness of the interleaving scheme on
parallel-connected generators, the grid side converter is (b)
replaced by 300 V which is a voltage source with parallel Fig. 7. DC-link current ripple waveforms with SPWM: (a) without
connected 10 Ω as a load. an interleaving scheme and (b) with  / 3 interleaving.
Fig. 7 shows simulated waveforms of the DC-link current for
the SPWM both with and without the interleaving scheme. The various angles with the SVPWM and DPWM schemes. For
results show that the interleaving scheme with an optimal angle the SVPWM, the RMS value of the DC-link current ripple is
reduces the RMS value of the DC-link current ripple from 3.49 the most effective when the π/3 interleaving scheme is
A to 1.81 A. Table IV summarizes the simulation results for applied for a 3-parallel system because the dominant current
the interleaving scheme with various angles. The RMS value harmonics component is located in the second-order
of the DC-link current ripple decreases dramatically with an switching frequency. For the DPWM, the 2π/3 interleaving
optimal angle for the SPWM, π/3. Thus, the proposed scheme scheme effectively reduces the RMS value of the DC-link
is affordable for the SPWM. In addition, Table V and Table current ripple. This means that the proposed interleaving
VI show simulation results of the interleaving scheme for control is also effective with the DPWM switching scheme.
1010 Journal of Power Electronics, Vol. 17, No. 4, July 2017

TABLE IV
CURRENT RIPPLE RESULTS ON THE DC-SIDE FOR SPWM
Interleaving Angle DC-link Current Ripple
0 3.49 A
 /3 1.81 A
 /2 2.51 A
2 / 3 2.03 A

TABLE V
CURRENT RIPPLE RESULTS ON THE DC-SIDE FOR SVPWM
Interleaving Angle DC-link Current Ripple
0 3.57 A
Fig. 8. Hardware setup for the experiment.
 /3 1.78 A
 /2 2.60 A
2 / 3 2.03 A

TABLE VI
CURRENT RIPPLE RESULTS ON THE DC-SIDE FOR DPWM
Interleaving Angle DC-link Current Ripple
0 3.56 A
 /3 2.14 A
 /2 2.06 A
2 / 3 1.89 A (a)

V. EXPERIMENTAL RESULTS
Fig. 8 shows the experimental setup of the generators. The
overall experimental setup comprises control boards, power
boards, and PMSGs. The generator side inverters are
controlled under the current control mode by employing a
digital signal processor (DSP) TMS320F28335. 7.5kW
induction motors with a rated speed of 1,750 rpm are used as
load motors for this experiment. The PMSM speed
information was attained using a rotary incremental encoder. (b)
The experimental parameters and operating conditions are the Fig. 9. DC-link current ripple waveforms with SPWM: (a) without
same as those of the PSIM simulations. an interleaving scheme and (b) with  / 3 interleaving.
Fig. 9 shows experimental waveforms that verify the
effectiveness of the proposed interleaving scheme for a effectiveness of the harmonics components with FFT
parallel-connected generator system with SPWM. Since the waveforms by applying the interleaving method with SPWM.
interleaving scheme only controls the total DC-link current Fig. 10(a) shows that the harmonics in the second-order
by delaying the carrier waves of each generator side switching frequency is dominant. Fig. 10(b) shows that the
converter, the amplitude and RMS value of the DC-link dominant harmonics component is decreased by applying the
current from each of the converters (idc1, idc2, idc3) are the same, proposed method.
even when the interleaving scheme is applied. However, Fig. 11 shows DC-link current ripple waveforms and FFT
applying the interleaving scheme can decrease the total of the current ripple when the SVPWM scheme is used. Fig.
DC-link current ripple (idc). Fig. 9(a) shows that the RMS 11(a) shows that the dominant harmonic components of the
value before applying the interleaving scheme is 3.76 A. Fig. DC-link current is located in the second-order switching
9(b) confirms that applying the proposed interleaving scheme frequency and that the RMS value of the DC-link current
with an optimal angle of π/3 reduces the RMS value of the ripple is 3.98 A without the interleaving scheme. Fig. 11(b)
current ripple to 1.92 A. In addition, Fig. 10 shows the shows that the dominant harmonic is cancelled and that the
 An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected … 1011

(a) (a)

(b) (b)
Fig. 10. DC-link current harmonics waveforms with SPWM: (a) Fig. 12. DC-link current harmonics waveforms with DPWM: (a)
without interleaving scheme and (b) with  / 3 interleaving. without interleaving scheme and (b) with 2 / 3 interleaving.

Fig. 12 shows the effectiveness of the proposed

interleaving scheme for DPWM. As shown in Fig. 12(a), the
dominant current harmonic component is located in the
first-order switching frequency. Based on the analysis of
DPWM, the optimal interleaving angle for DC-link current
ripple reduction is determined to be 2π/3. Finally, the
DC-link current ripple is decreased from 3.64 A to 1.98 A by
cancelling the first-order switching frequency, as shown in
Fig. 12(b).
A comparison of the simulation results in section IV with
the experimental results in this section shows similarities in
(a) terms of effectiveness. Applying the selected optimal
interleaving angle to cancel the dominant harmonics
components reduces the DC-link current ripple.

VI. CONCLUSIONS
This paper presents an interleaving scheme for DC-link
current ripple reduction in N-parallel connected generator
systems. The proposed method analyzes the current
harmonics components generated through the generator side
converters using the double-integral Fourier method for
various PWM switching schemes. Then it selects an
(b) optimized interleaving angle based on this analysis, in order
Fig. 11. DC-link current harmonics waveforms with SVPWM: (a) to reduce the current ripple in the DC-link. Both simulation
without interleaving scheme and (b) with  / 3 interleaving. and experimental results demonstrate the validity of the
interleaving scheme with 3-parallel 5.5 kW PMSGs. A
RMS value is reduced to 1.82 A by using the simple comparison with the traditional method confirms the validity
interleaving scheme with an optimal angle. of the proposed method.
1012 Journal of Power Electronics, Vol. 17, No. 4, July 2017

ACKNOWLEDGMENT [13] G. Gohil, L. Vede, R. Maheshwari, R. Teodorescu, T.

Kerekes, and F. Blaabjerg, “Parallel interleaved VSCs:
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project entitled by “Demonstration Study for Low Voltage coupled inductor,” in Conf. Rec. of IEEE IECON Annu.
Direct Current Distribution Network in an Island” (D3080) Meeting, pp. 1693-1699, 2014.
[14] L. Bede, G. Gohil, T. Kerekes, and R. Teodorescu,
and the Basic Science Research Program through the
“Optimal interleaving angle determination in multi
National Research Foundation of Korea (NRF) funded by the paralleled converters considering the DC current ripple
Ministry of Science, ICT & Future Planning (No. and grid current THD,” in Conf. IEEE Power Electron.
2016R1A2B4010636). and ECCE Asia, pp. 1195-1202, 2015.
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 An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected … 1013

Min-Gyo Jeong received his B.S. degree in

Electrical and Computer Engineering from
Ajou University, Suwon, Korea, in 2016,
where he is presently working towards his
M.S. degree in Department of Electrical and
Computer Engineering. His current research
interests include power conversion and
multilevel converter systems.

Hye Ung Shin received his B.S. degree in

Electrical and Computer Engineering from
Kunsan University, Kunsan, Korea, in 2012;
his M.S. degree in the Department of
Electronic Systems Engineering of Hanyang
University, Ansan, Korea, in 2014; and his
Ph.D. degree in Electrical Engineering from
Ajou University, Suwon, Korea, in 2017. His
current research interests include machine design, electric
machine drives and power conversion.

Ju-Won Baek received his M.S. and Ph.D.

degrees from Kyungpook National University,
Taegu, Korea, in 1993 and 2002, respectively.
Since 1993, he has been working as a
Principle Researcher in the Power Conversion
Research Center, HVDC Research Division,
Korean Electrotechnology Research Institute
(KERI), Changwon, Korea. In 2004, he also
worked as a Visiting Scholar in the Future Energy Challenge
Center of Virginia Tech, Blacksburg, VA, USA. His current
research interests include soft-switching converters, power quality,
high-voltage power supplies, and power converter for renewable
energy. Recently, he has become interested in dc distribution
systems and solid state transformers. Dr. Baek is a member of the
Korean Institute of Power Electronics and the IEEE Power
Electronics Society.

Kyo-Beum Lee received his B.S. and M.S.

degrees in Electrical and Electronic
Engineering from Ajou University, Suwon,
Korea, in 1997 and 1999, respectively; and
his Ph.D. degree in Electrical Engineering
from Korea University, Seoul, Korea, in
2003. From 2003 to 2006, he was with the
Institute of Energy Technology, Aalborg
University, Aalborg, Denmark. From 2006 to 2007, he was with
the Division of Electronics and Information Engineering,
Chonbuk National University, Jeonju, Korea. In 2007, he joined
the School of Electrical and Computer Engineering, Ajou
University, Suwon, Korea. He is an Associate Editor of the IEEE
Transactions on Power Electronics, the Journal of Power
Electronics, and the Journal of Electrical Engineering &
Technology. His current research interests include electric
machine drives, renewable power generation, and electric vehicle
applications.