Chapter 9
Chapter 9
Chapter 9
Introduction
Prefiltering
Postfiltering
Oversampling Approach
Examples
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-1 郭泰豪, Analog IC Design, 2018
Filters
Continuous-time filter
RLC passive
Active RC
Sampled-Data filter
Switched-Capacitor filter
Digital filter
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-2 郭泰豪, Analog IC Design, 2018
Continuous-Time Filters
Example: 1 pole low pass filter
Passive
R1 L
Vout RL 1
Vin RL
Vout Vin R 1 R L 1 sL
R 1 R L
Active
RFB
C Vout R FB 1
Rin
Vin Vin R in 1 sR FBC
Vout
V2 V1 1
1 C 2 I eff 2
I eff
V2 V1
R eff
Q V2 V1 T
Q C(V2 V1 ) I eff R eff
T R eff C
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-4 郭泰豪, Analog IC Design, 2018
SCF (Cont.)
Example: SC integrator (stray-sensitive)
CI
v out n v out n 1 v in n 1
CS
CI
v out n v out n 1 S v in n 1
C vin n
v out n
CI CS
Vout z z 1Vout z S z 1Vin z
C
CI
Vout z CS z 1
Hz where z e jT
Vin z C I 1 z 1
If ωT<<1
jT
2
1 j T
jT
C e CS 2
lim H e jT S
T 1 C I 1 e jT CI
jT
jT
2
2
CS 1 1 1
C I jT T jR eff C I
j C I
CS
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-5 郭泰豪, Analog IC Design, 2018
Digital Filter
FIR (Finite Impulse Response)
x n z 1 z 1 z 1 z 1
a1 a2 an1
a0
yn
IIR (Infinite Impulse Response)
x n yn
z 1
Operations
a1 b1
Multiply
Delay
Add
z 1
a2 b2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-6 郭泰豪, Analog IC Design, 2018
Analog Sampling Circuit
f * t f n* t
S1 f t (Single pulse)
K K
K
f t …
S2 f t t 1 t 2
*
t
T 2T nT
τ
T
T
S1
S2
t1 t 2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-7 郭泰豪, Analog IC Design, 2018
Analog Sampling Circuit (Cont.)
Mathematical relationship (assume K=1) f t f * t
f n* t
Single-pulse signal f n t
* (Single pulse)
f nT …
f n t
*
t nT t nT τ
τ t
1, t 0 τ T 2T nT
where t (13.3)
0, t 0
T
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-8 郭泰豪, Analog IC Design, 2018
Signal Spectra of Zero-Width Samples
For τ → 0 (zero-width sampling)
f (t) F( j) original signal
f * (t) F* jω sampled-data signal
Spectrum of Sampled Signal
Method1: replace s jω in (13.7)
Method2: Convolution
Fourier
F jω
F jω F jω S jω
1
f t f t st
*
transform *
2π FB j
FA j
2π 2π
where st δt nT and S jω δ ω k A B
n T n T
F* jω
FB jω
*
2π T
F* jω
1
F
T k
jω jk
T
ω
Continuous-time signals fAt and fBt
FA jω
2 *
T T
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-9 郭泰豪, Analog IC Design, 2018
Nyquist Theorem
There is a one-to-one relation between values
FA B j and
FA B j
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-10 郭泰豪, Analog IC Design, 2018
S/H Effect
Due to nonzero-width samples, assume τ = T and from (13.5)
FSH jω HSH jωF jω , where F* jω is spectra of zero-width sample
*
6
4
2 2 4 6
T T T T T T
3f s 2f s fs fs 2f s 3f s f
HSH j has a linear phase. Its amplitude has sinc response (sinX/X)
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-11 郭泰豪, Analog IC Design, 2018
S/H Effect (Cont.)
FSH jω HSH jωF jω
*
… t F j
*
τ T 2T nT
T
f sh t
f t HSH( j)
K
…
t
T 2T nT FSH j
T
2 2
T T
S/H before an ADC Reduced high-frequency images
Allow ADC to have a constant input value during one conversion
Relax the anti-aliasing requirement
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-12 郭泰豪, Analog IC Design, 2018
Derivation of S/H Function HSH (s)
S/H response (refer to p.9-8)
f t f t f t (Single pulse)
* *
n
f t f sh t (Single pulse)
… …
t t
τ T 2T nT T 2T nT
T T
Sample Hold
f nT
For sampled signal: f t *
t nT t nT τ (13.4)
n τ
Assume τ = T (Nonzero-width sampling)
f sh t f nT t nT t nT T
n
(13.39)
1 e sT
1 e -sT *
Laplace transform: FSH s f nT e F s
snT
(13.40)
s n s
Sample/Hold transfer function, HSH (s), is equal to
1 e sT
H SH s (13.41)
s
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-13 郭泰豪, Analog IC Design, 2018
Sampled-Data System with Continuous-time Input &
Output Signals
The distortion due to HSH( j) is linear as opposed to the nonlinear
distortion which aliasing introduces.
HEQ j 1
HSH j
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-14 郭泰豪, Analog IC Design, 2018
Sampled-Data System with Continuous-time Input &
Output Signals (Cont.)
Sampled-data
system
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-15 郭泰豪, Analog IC Design, 2018
Prefiltering
Nyquist rate
Prefilter = Anti-alias filter (AAF)
Brick wall AAF
Oversampling rate
Prefilter = Anti-alias filter + Decimation filter
(AAF) (DF)
AAF : Continuous-time filter
DF : SCF or Digital filter
Usually < 60 dB(or 10 bit) Usually > 60dB (or 10bit)
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-16 郭泰豪, Analog IC Design, 2018
Prefiltering (Cont.)
Examples: (For Data Acquisition)
Conventional Nyquist-rate A/D converter
Auto-tuning
A/D
AAF
fc
Oversampling A/D converter
AAF A/D DF
mfc fc
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-17 郭泰豪, Analog IC Design, 2018
Prefilter Strategy for Conventional Data Acquisition
Continuous-time Switched-capacitor A/D
Lowpass filter Lowpass filter converter
Analog Digital
input fSCF fADC output
fCTLPF
SCF
Digital SC
Smoothing filter Analog
DAC Lowpass
Input ( & equalizer ) Output
filter
fC1 fC2
Smoothing filter
SCF
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-19 郭泰豪, Analog IC Design, 2018
Some discrete-time sinusoidal signals
with different sampling rates
0 cycles/sample 1/16 cycles/sample
x n x n
10 15
1 5 10 15 n 1 5 n
5 15 15
1 10 n 1 5 10 n
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-20 郭泰豪, Analog IC Design, 2018
Comparison time and frequency of two sampling rates
X S f , X1
x n
x c t
x s t
0.25 0.5 t 1 Hz 4 Hz 8 Hz
f
XS2 f , X2
x n
x c t
x s t
0.25 0.5
t 1 Hz 12 Hz 24 Hz
f
3 6 n
(2π) (4π)
6
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-21 郭泰豪, Analog IC Design, 2018
Use of Oversampling Approach to
Relax Requirements of Prefilter and Postfilter
Front End
Use oversampling A/D converter
Use decimation after A/D conversion
Back End
Use interpolation before D/A conversion
Use oversampling D/A converter
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-22 郭泰豪, Analog IC Design, 2018
Use of Oversampling Approach to Relax
Requirements of Prefilter and Postfilter (Cont.)
Example: Block diagram of a signal processing system
Simple
A/D Sampling rate
xc t xd n
Anti-aliasing
filter xa t Conversion x̂n reduction by M
Discrete-time
xd n system yd n
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-23 郭泰豪, Analog IC Design, 2018
Use of Decimation in A/D Conversion
X c j
Signal
High-frequency Simple
1 anti-aliasing filter
noise
c N N c
1 X a j
Filtered Signal
noise
c N N c
1
T
1
X̂ e j Sharp cutoff
Decimation
Aliased noise filter
T
2 N 2
N NT
M
1
T X d e j T MT
T
2 2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-24 郭泰豪, Analog IC Design, 2018
Use of Interpolation in D/A conversion
1
Y e j T MT
T
2 2 T
Yˆ e j
Compensated T T MT
1 L interpolation L L
filter
T
2
2 ω Ω T
L L 2
Simple L
H r j reconstruction
filter
2
s N
T
S
1
Yr j
S
N N
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-25 郭泰豪, Analog IC Design, 2018
Decimation
Lowpass filtering + downsampling
X n Low-Pass Down-
Y n
Filter Sampler
f s1 f S2
Downsampling (by 3)
Time-domain
n n
M
0 3 6 0 1 2
L3
Frequency domain
2 2
6 2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-26 郭泰豪, Analog IC Design, 2018
Decimation (Cont.)
Downsampling with aliasing
Spectrum of original continuous-time signal
Spectrum of sampled signal
2
2 2 T
2 3 3 2 T
2 2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-27 郭泰豪, Analog IC Design, 2018
Decimation (Cont.)
Downsampling with prefiltering to avoid aliasing
Low-pass filtering
2 T '
M 3
Spectrum after filtering
3
2 T '
Spectrum after decimation
1
MT
2 T '
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Interpolation
Upsampling + lowpass filtering
Time-domain
Y n
Low Pass
X n Upsampler
Filter
f S1 f S1
Upsampling (by 3)
Time-domain
n n
L
0 1 2 0 3 6
L3
Frequency-domain
2 2
2 6
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-29 郭泰豪, Analog IC Design, 2018
Interpolation (Cont.)
Baseband signal
(Analog)
Original signal
(Digital)
2 T
Upsampling 1
L 3
T
Low-pass filtering 2π T
2 T
Spectrum after filtering
2 T
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-30 郭泰豪, Analog IC Design, 2018
Decimate-By-N Filter
Example: with sinc function
X Decimation Y
fC filter fC
N
Input rate f c
Output rate f N f d c
Y(n)=(1/N)[x(Nn)+x(Nn-1)+x(Nn-2)+……+x(Nn-N+1)]
x z N 1 i x z 1 z N
Yz Z
N 0 N 1 z 1
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-31 郭泰豪, Analog IC Design, 2018
Decimate-By-N Filter (Cont.)
Gain of sinc filter
N
N sin
1 1 z 1 2
1
; z e j and
N 1 z 1 N sin fc
2
N
sinc sinX
2 ; sincX
X
sinc
2
Example: N=6
Gain
f
- 2f d f d 0 fd 2 fd 3 fd 4 fd 5 fd 6 fd 7 fd 8 fd 9f d
1 fc
fc
6
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-32 郭泰豪, Analog IC Design, 2018
Digital Decimator with Sinc Filtering
X
Y
REG REG REG REG
fc fc fc fc
N stages
f d f c
N
X
Y
REG REG
fc fd
1 1 Z N
1 z 1
X Y
fc fd
Lowpass Filter Decimator
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-33 郭泰豪, Analog IC Design, 2018
SC Sampling Stage Without Decimation
Example: Integrator
2 C
1 C
2
V1
V2
2 1
1
2
KT T T T
KT KT KT
2 2
T
V2 kT V2 kT T V1 kT
2
1
V2 z z 2
H I z
V1 z 1 z 1
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-34 郭泰豪, Analog IC Design, 2018
SC Sampling Stage With Decimation
Example: Modified Integrator
1
2
2
V1 V2
2 1
1
fc
2
f d 2
N 6
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-35 郭泰豪, Analog IC Design, 2018
SC Sampling Stage With Decimation (Cont.)
Hz HI z HD z
where H D z is a sinc transfer function
N
sin
HD e
j
2 1
; T
fc
2
Example : N=6
f
0 fd 2 fd 3 fd 4 fd 5 fd 6 fd
Input
f
Output
f
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-36 郭泰豪, Analog IC Design, 2018
Cosine Filter
For N=2
sin
1
HI e j
;
fc
sin
2
f
0 fd 2 fd 3 fd 4 fd 5 fd
f c
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-37 郭泰豪, Analog IC Design, 2018
Interpolation Filter
Example: Linear Interpolation (sinc function)
X Y
fC Interpolation f I Nf C
Nf C f I
X Y
REG REG
fc Nf c
1 1
fC 1 z 1
1
1 z N
1
1 zN 1
Nf C
1 z 1
N
1 z N sin 1 N 6
; H I z
1
H I z 2 ;
1 z 1 N sin fI f
0 fc 2 fc 3 fc 4 fc 5 fc 6 fc 7 fc
2
fI
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-38 郭泰豪, Analog IC Design, 2018
SC Sampling Stage With Linear Interpolation
1 C1 Ca
2 C2
V1 V2
3 C3
3 3
i
1 2 1 2
t
T2 T2 T2
T1 rT2
V1 ,V2
V1
6T2 V2
t
T2 3T2
V2 z 1 1 z N 1 N 1 i
V2 nT2 V2 nT2 T2 V1 nT2 V1 nT2 NT2
1 H I z z
N V1 z N 1 z 1 N i 0
N
sin
H I e j
1 2
N sin
;
1
f
T2
2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-39 郭泰豪, Analog IC Design, 2018
Sinc Filtering Function
Not ideal lowpass
FIR (Finite Impulse Response)
sinc filter
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-40 郭泰豪, Analog IC Design, 2018
Changing The Sampling Rate By A Noninteger Factor
Interpolator Decimator
Lowpass Filter Lowpass Filter
Sampling
xI n
Period :T T/L T/L T/L TM/L
Two lowpass filters
can be combined
Lowpass Filter
L ~ Gain L
~x n M
xn x n
Cutoff min ,
L M
I xd n
Sampling
: T T/L T/L TM/L
Period
Noninteger factors can be obtained from properly choosing M and L .
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-41 郭泰豪, Analog IC Design, 2018
Examples
Talking Back
Storage
Anti-alias Smoothing
filter ADM D/ A filter
xdb
f BW fS
2
Speech Reconstruction
Storage
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-42 郭泰豪, Analog IC Design, 2018
Examples (Cont.)
Approach 1:
Better LPF can be used other than sinc one
continuous-time + oversampling + digital + DAC + SMF
AAF ADC Decimator
and LPF
Oversampling ADC and digital decimator may be combined.
Approach 2:
continuous-time + SCF + conventional + DAC + SMF
AAF ADC
(Nyquist rate)
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 9-43 郭泰豪, Analog IC Design, 2018