Features General Description: High Performance Single Synchronous Buck Converter
Features General Description: High Performance Single Synchronous Buck Converter
Features General Description: High Performance Single Synchronous Buck Converter
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Typical Application
4.5V~5.5V 2.7V~26V
VCC VIN
RPG CVCC RTON CVIN
GS9219
TON
CVOUT
SS AGND
CSS
PGND
1 7 21 23 20 8,9,22
Boot
Diode
Vref=0.6V
Soft Start High Side
Bandgap
MOS
EN/DSG 2 Enable/ DRV
Discharge VIN UVLO VCC UVLO
10,11
TON 16~18
LX
TON 6 Generator
Gate Control
Low Side
Logic
MOS
OVP DRV
0.9V
Error
AMP
Protection
Logic
0.3V
UVP
Error
AMP
OCP
0.6V RCC
Error AMP
PWM
CMP
5 4 3 19 12~15
Pin Configuration
PGOOD 1 17 LX
EN/DSG 2 16 LX
24 25
PFM 3 15 PGND
VIN LX
AGND 4 14 PGND
FB 5 13 PGND
TON 6 12 PGND
7 8 9 10 11
VIN VIN VIN LX LX
( Top view )
Figure 3 TQFN23-4x4 Package
Pin Descriptions
No. Name I/O Description
Power Good Signal Output. PGOOD is an open-drain output
1 PGOOD O
used to indicate the status of the output voltage.
Buck Enable and Discharge Control Pin. EN=Low, Shutdown;
2 EN/DSG I EN/DSG>1V Enable Device, EN/DSG<1.4V Enable Discharge
Function, EN/DSG>1.6V Disable Discharge Function.
PFM Selection Input. Connect PFM pin to GND for forced
3 PFM I
PWM operation. Connect PFM to VCC for PFM operation.
4 AGND I/O Analog Ground
Feedback Input. Adjust the output voltage with a resistive
5 FB I
voltage-divider between the regulator’s output and AGND.
On-Time Setting Input. Connect a resistor between VIN and
6 TON I
TON to set the on time width.
Supply Input. VIN is the regulator input. All VIN pins must be
7,8, 9, 22, 24 VIN I
connected together.
10, 11, 16, Upper Driver Floating Ground for Buck Controller. Connect to
LX I/O
17,18, 25 an external inductor.
Ordering Information
GS9219X XX-X
1. Version 3. Shipping
2. Package
No Item Contents
Example: GS9219 Output Voltage range=0.6V~2.5V TQFN23-4x4 Tape & Reel ordering information is
“GS9219TQ-R”
Electrical Characteristics
(RTON=350KOhm, VIN=12V, VCC=VEN=5V, TA =25°C, unless otherwise specified)
VPG_H 150 %
PGOOD Threshold
VPG_L 50 %
PGOOD Fault Delay TPG 10 us
Current Parameters
DEM
Quiescent Current IQ 650 uA
VFB =0.65V, VCC=5V
VEN =0, I(VCC) 20 uA
Typical Characteristics
Power on from EN(IOUT=0A) Power on from VIN
CH1: EN CH2: SS CH3: VOUT CH4: PGOOD CH1: VIN CH2: LX CH3: VOUT CH4: PGOOD
Application Information
The GS9219 is small size chip with a relative High Side Switch On-Time Count
constant on-time synchronous buck switching The on-time is decided by the external setting
converter suitable for applications in notebook resistor, and the input voltage. Looking at the TON
computers and other battery operated portable pin, the input voltage is converted to current which
devices. Features include wide input voltage range, is inversely proportional to itself by dividing the
high efficiency and fast dynamic response. external setting resistor. The input
System Clock Generator and PWM Control voltage-proportional current is used to charge an
The on-time of GS9219 can be set by an external internal capacitor from zero volts. When the voltage
setting resistor from input voltage to TON Pin. The between two terminals of the capacitor reaches to
converter maintains the on-time width as loop the internal setting voltage, on-time one-shot pulse
feedback path exists between the GS9219 is generated, and then upper power MOSFET is
converter, low pass filter and voltage divider. For a turned off and lower power MOSFET is turned on.
given input voltage buck application, the feedback We can count the on-time and switching frequency
maintains the constant on-time width. Due to the according to the equations below:
constant resistor and input voltage, the GS9219 GS9219: TON=(8.56p×RTONxVOUT) / (VIN-0.8)
based buck converter has the relative constant GS9219A: TON=(4.28p×RTONxVOUT) / (VIN-0.8)
frequency. Moreover, the GS9219 can increase the GS9219B: TON=(1.712p×RTONxVOUT) / (VIN-0.8)
duty-cycle automatically as input voltage falls down. Then, the switching frequency is:
Because of the constant on-time in each switching Fsw=VOUT/ (VIN×TON)
period, the converter maintains the relative RTON is a resistor connected from the input supply
frequency when the input voltage changes (VIN) to the TON pin.
At the beginning of each switching cycle, upper For heavy load application, due to ground bounced
power MOSFET is turned on, after typical fixed and the high impedance of RTON, the TON pin
on-time, the upper MOSFET is turned off, and then should always be bypassed to GND using a several
lower power MOSFET is turned on after internal nF-order ceramic capacitor for reliable system
dead time. The upper MOSFET will not be turned operation.
on at the beginning of next cycle until output voltage EN, PFM/PWM Mode and Shutdown
falls down below the preset voltage and the dead The EN pin enables the power supply. When EN is
time passes. The same events repeat the following pull up above 1V and the PFM Pin is pulled high,
switching cycles. To avoid the surge inductor the GS9219 converter is enabled and
current during large load transient, a minimum diode-emulated mode (DEM, which is power save
Off-time is added. Typical minimum off-time is mode) will be also enabled. When the PFM pin is
around 420ns. The too small on-time can affect pulled low, it will force the converter into PWM
soft-start and anti-noise ability, so in order to avoid mode. The PFM pin offers an about 1uA current
the on-time too small to be eliminated; a minimum ability to default pull low.
on-time is set to around 100ns. This should to be In PFM(DEM) mode, when the loads goes low,
noted in the small duty applications. GS9219 starts power save mode in order to
maintain the on-time and decrease the system and the bounce of the Vout voltage during the
clock frequency to skip PWM pulses for better discharge process, the GS9219 offers
efficiency. The PFM has two setting mode for Soft-Discharge scheme to make it safer and better
different ZCD detection voltage. The zero cross reliability.
detection range is VT_1 for small inductor application Since this is a soft discharge, that there are no
when the voltage in PFM pin is over 1.6V. The zero dangerous negative voltage excursions to be
cross detection range is VT_2 for larger inductor concerned about. In order to maintain the correct
application when the voltage in PFM pin is between function of the soft-discharge module, the chip
0.9V to 1.4V. power supply must be online.
If DEM Mode is enabled, the GS9219 zero The Soft-Discharge process is similar to the reverse
crossing comparator will sense the inductor current process of the Soft-Start.
and judge its value by comparing the LX node (LX) If the EN pin voltage greater than 1.6V, during the
to PGND. Once the LX node voltage is equal to the enable on, the discharge function will turn off, and
PGND node voltage, the converter will enter the the status is latched. After the EN pin pull low, the
DEM Mode and turn off the low side power IC will turn off and the high/low side MOS will turn
MOSFET. The boundary of PWM to PFM mode can off. The latch status can only reset by VCC power
be calculated by the output current. on.
VIN VOUT 1 VOUT After the EN pin pull low, the GS9219 internal logic
IOUT(Boundary)
2L FSW VIN will shutdown the switching clock and stop the buck
As the load current is further decreased, it takes converter and the high/low side MOSFETs turn off.
longer time to discharge the output capacitor to the The rest energy store in the output capacitor will
level than required the next switching cycle. The consume by the load and the resistors through the
on-time is kept the same as that in the heavy-load VOUT to FB path.
condition. Output Voltage Selection
Discharge Control & Soft-Discharge The output voltage is set by the feedback resistors
The GS9219 builds-in Vout discharge control RFB1 and RFB2 of Figure1. Therefore the RFB1 and
function. Discharge function allow user to choose RFB2 can be set by the equation below:
whether discharge the energy of output capacitors Set RFB2,then
through the EN pin voltage level. The control V
RFB1 RFB 2 OUT 1
voltage shows as below: 0.6
EN/DSG Function Current Limit
VEN<0.4V Enable off The GS9219 uses the on-state resistance of the
1V<VEN<1.4V Enable on and discharge on low-side power MOSFET as a current-sense
EN>1.6V Enable on and discharge off resistor. In this case, the RCS resistor between the
If discharge function enabled, the GS9219 will LX pin and CS pin sets the over current threshold.
execute the discharge output voltage after the EN This resistor RCS is connected to a 20uA current
pin pull low. source within the GS9219 which is turned on when
In order to avoid the large negative inductor current the low side power MOSFET turns on. When the
voltage drop across the low side power MOSFET and low side Power MOSFETs. Both switches stay
equals the voltage crossing the current limit resistor latched off and the GS9219 is latched off until
RCS, positive current limit will activate. The high Power Reset or EN Reset. During soft-start, the
side Power MOSFET will not be turned on until both UVP will be blanked, until soft-start procedure
the voltage drop across the sense element (low side finished. The blank time depended on the value of
power MOSFET) falls below the voltage across the the capacitor connected to SS Pin. But if the output
RCS resistor and the output voltage falls to pre-set voltage rises up above the UVP threshold tolerance
value. The current sensing circuit actually regulates during the counter period, the UVP counter is
the inductor valley current. This means that if the released immediately.
magnitude of the current-sense signal at CS pin is UVLO and Soft-Start
above the current-limit threshold, the PWM is not An internal under voltage lockout (UVLO) module is
allowed to initiate a new switching cycle. The used to sense the VCC power supply. The PWM
equation for the current limit threshold is as follows: converter is forbidden by the under voltage lockout
IL_LIMIT=20uA×RCS/RDSL module. When VCC rises about 3.95V, the GS9219
Where, RDSL is the resistance of low side power will initial the control logic circuitries and soft-start
MOSFET. ramping generator, and then allows switching to
It is diagramed by the graph below: occur. When VCC falls down to about 3.79V, the
PWM converter is forbidden again.
IL
After soft-start module starting, the fb will rise and
IL
Maximum follow the soft-start ramp, so the output voltage will
Average
IOUT
rise smoothly. After UVP blanking time, the output
Current
Limit under voltage protection and power good indicator
Threshold
is enabled. After FB voltage pass across 90% of
Below table is the RCS setting correspond to the reference and SS voltage reach about 1.2V, the
OCP function: power good indicator will turn high by external pull
RCS Position OC Function up resistor.
CS to LX IL_LIMIT=20uAxRCS/RDSL VIN UVLO
NC The IL_LIMIT is about 300mV/RDSL GS9219 builds-in the VIN voltage detection function
1.2V, the PGOOD is pulled up by external resistor, output current, indicated by formula below
this means the soft-start is finished. In normal 3 (VIN(max) VOUT ) VOUT
LIND
operation, the PGOOD window is from 50% to 150% IIOUT(max) f VIN(max)
of the converter reference voltage. When the output For applications that require fast transient response
voltage has to stay within this window, PGOOD with minimum VOUT overshoot, consider a smaller
signal will become high. When the output voltage inductance than above. The cost of a small
outruns 50% or 150% of the target voltage, PGOOD inductance value is higher steady state ripple,
signal will be pulled low after a delay time. This larger line regulation, and higher switching loss.
delay prevent false PGOOD drop. Choose Output Capacitors
External Devices Selection
1 VOUT
For loop stability, the 0 dB frequency (f0), defined in RESR 0.015
I ripple 0.6
the follow equation:
3 VOUT
1 f 0.015
f0 SW I OUT (max) 0.6
2 RESR COUT 4
VOUT
The loop stability is determined by the output RESR 57(mohm)
I OUT (max)
capacitor. Specialty polymer capacitors have COUT
in the order of several 100uF and RESR in range of Organic semiconductor capacitors or specialty
10mohm is recommended. In order for the right polymer capacitors are recommended.
regulate manner, the ripple voltage at the feedback The GS9219 support pure MLCC because the
pin (FB), should be approximately 15mV. This benefit of the internal
generates Vripple= (VOUT/0.6) ×15mV at the output Choose Soft-Start Capacitor
node. The output capacitor RESR should meet this When SS ramp rise up to about 1.2V, the chip
equation. thinks the soft-start procedure is over, and then,
The external device selection is list below: release the UVP protection function. At the same
Choose Feedback Voltage Divider Resistor time, the VOUT voltage will reach the target set by
Set RFB2=1K~20K ohm the FB resistor divider. So, the total soft-start time is
V defined by the formula below:
RFB1 RFB 2 OUT 1
0.6 1.2 CSS
TSS 1.2 10 8 CSS (ms)
Choose RTON I SS
1 VOUT Where, the unit of TSS is mS.
TON ( Max )
fSW VIN( Min ) For example, the typical TSS is equal to 1.2mS with
1 10nF CSS.
RTON ( MAX )
FSW Min 8.56 p
Choose Inductor
Set the ripple current approximately 1/4 to 1/2 of the
maximum output current. 1/3 is recommended. The
recommended inductor can be calculated from the
L2 E1
D1
D2
k
E
E3
D1
D3
E2
L3
L1
pin 1 dot 2 1 L
L1 e b
D
A
A3
A1
(Side view)
Dimensions in
Symbol Millimeters
Min. Max.
A 0.70 0.80
A1 0.00 0.05
A3 0.203 REF.
b 0.20 0.30
D 3.90 4.10
D1 0.65 0.85
D2 0.85 1.05
D3 1.24 1.44
E 3.90 4.10
E1 2.95 3.15
E2 2.60 2.70
E3 2.95 3.15
L 0.35 0.45
L1 0.57 0.67
L2 0.18 0.33
L3 0.22 0.32
e 0.50 REF.
k 0.33 0.37
Note
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contract between GStek and the information receiver.
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of its circuits as described herein will not infringe on exiting or future patent rights and other intellectual property rights, nor do the
descriptions contained herein express or imply that any licenses under any GStek patent right, copyright, mask work right, or other GStek
intellectual property right relating to any combination, machine, or process in which GStek products or services are used.
Besides, the product in this document is not designed for use in life support appliances, devices, or systems where malfunction of this
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GS9219
ZZMD
Note
1. Laser fonts example:
D 編碼規則說明:D 為週碼。
例:第 5 週編碼為:E
D 週碼編碼規則
週數 Code 週數 Code 週數 Code 週數 Code
01 A 14 N 27 A 40 N
02 B 15 O 28 B 41 O
03 C 16 P 29 C 42 P
04 D 17 Q 30 D 43 Q
05 E 18 R 31 E 44 R
06 F 19 S 32 F 45 S
07 G 20 T 33 G 46 T
08 H 21 U 34 H 47 U
09 I 22 V 35 I 48 V
10 J 23 W 36 J 49 W
11 K 24 X 37 K 50 X
12 L 25 Y 38 L 51 Y
13 M 26 Z 39 M 52 Z
TQFN23-4x4
Pin 1 dot
鋁箔袋
46±3*43±3cm (thickness:0.15mm)
Moisture Barrier Bag
黑色保護圈 108±1*1.6±0.05* 0.1±0.01
black protective tape (length* width * thickness) unit:cm
外箱數量 Quantity of outer box