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ZXLD1370
60V HIGH ACCURACY BUCK/BOOST/BUCK-BOOST
LED DRIVER-CONTROLLER WITH AEC-Q100

Description Pin Assignments

The ZXLD1370 is an LED driver controller IC for driving external
MOSFETs to drive high current LEDs. It is a multi-topology controller TSSOP-16EP
enabling it to efficiently control the current through series connected
LEDs. The multi-topology enables it to operate in buck, boost and
buck-boost configurations.

The 60V capability coupled with its multi-topology capability enables it

to be used in a wide range of applications and drive in excess of
15 LEDs in series.

The ZXLD1370 is a modified hysteretic controller using a patent

pending control scheme providing high output current accuracy in all
three modes of operation. High accuracy dimming is achieved
through DC control and high frequency PWM control.

The ZXLD1370 uses two pins for fault diagnosis. A flag output
highlights a fault, while the multi-level status pin gives further
information on the exact fault.

Features
• 0.5% Typical Output Current Accuracy
• 6V to 60V Operating Voltage Range
• LED Driver Supports Buck, Boost and Buck-Boost
Configurations
• Wide Dynamic Range Dimming
• 20:1 DC Dimming
• 1000:1 Dimming Range at 500Hz
• Up to 1MHz Switching
• High Temperature Control of LED Current Using TADJ
• Available in Automotive Grade with AEC-Q100 and TS16949
Certification
• Available in “Green” Molding Compound (No Br, Sb) with Lead
Free Finish/ RoHS Compliant
ƒ Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
ƒ Halogen and Antimony Free. “Green” Device (Note 3)

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.

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Typical Applications Circuit

Buck-Boost Diagram Utilizing Thermistor and TADJ Curve Showing LED Current vs. TLED

Functional Block Diagram

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Pin Descriptions

Type
Pin Name Pin Function
(Note 4)
Adjust input (for dc output current control).
Connect to REF to set 100% output current.
ADJ 1 I Drive with dc voltage (125mV<VADJ< 2.5V) to adjust output current from 10% to 200% of set value.
The ADJ pin has an internal clamp that limits the internal node to less than 3V. This provides some
failsafe should they get overdriven.
REF 2 O Internal 1.25V reference voltage output.
Temperature Adjust input for LED thermal current control.
Connect thermistor/resistor network to this pin to reduce output current above a preset temperature
TADJ 3 I
threshold.
Connect to REF to disable thermal compensation function. (See section on thermal control.)
Shaping capacitor for feedback control loop.
SHP 4 I/O
Connect 100pF ±20% capacitor from this pin to ground to provide loop compensation.
Operation status output (analog output)
Pin is at 4.5V (nominal) during normal operation.
STATUS 5 O Pin switches to a lower voltage to indicate specific operation warnings or fault conditions. (See section
on STATUS output.)
Status pin voltage is low during shutdown mode.
SGND 6 P Signal ground (Connect to 0V)
PGND 7 P Power ground - Connect to 0V and pin 8 to maximize copper area
Not Connected internally – recommend connection to pin 7, (PGND), to maximize PCB copper for
N/C 8 -
thermal dissipation
Not Connected internally – recommend connection pin 10 (GATE) to permit wide copper trace to gate
N/C 9
of MOSFET
GATE 10 O Gate drive output to external NMOS transistor – connect to pin 9
Auxiliary positive supply to internal switch gate driver.
Connect to VIN, or auxiliary supply from 6V to 15V supply to reduce internal power dissipation (Refer
VAUX 11 P
to application section for more details)
Decouple to ground with capacitor close to device (refer to Applications section)
Input supply to device (6V to 60V).
VIN 12 P
Decouple to ground with capacitor close to device (refer to Applications section)
Current monitor input. Connect current sense resistor between this pin and VIN
ISM 13 I
The nominal voltage across the resistor is 225mV
Flag open drain output.
FLAG 14 O Pin is high impedance during normal operation
Pin switches low to indicate a fault, or warning condition
Digital PWM output current control.
Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.
PWM 15 I Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming control.
The device enters standby mode when PWM pin is driven with logic low level for more than 15ms
nominal (Refer to application section for more details)
Gain setting input.
Used to set the device in Buck mode or Boost, Buck-boost modes
Connect to ADJ in Buck mode operation
GI 16 I
For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. This defines the ratio
of switch current to LED current (see application section). The GI pin has an internal clamp that limits
the internal node to less than 3V. This provides some failsafe should they get overdriven
EP PAD P Exposed paddle. Connect to 0V plane for electrical and thermal management
Note: 4. Type refers to whether or not pin is an Input, Output, Input/Output or power supply pin.

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Absolute Maximum Ratings (Note 5) (Voltages to GND, unless otherwise specified.)

Symbol Parameter Rating Unit
VIN Input Supply Voltage Relative to GND -0.3 to +65 V
VAUX Auxiliary Supply Voltage Relative to GND -0.3 to +65 V
VISM Current Monitor Input Relative to GND -0.3 to +65 V
VSENSE Current Monitor Sense Voltage (VIN-VISM) -0.3 to +5 V
VGATE Gate Driver Output Voltage -0.3 to +20 V
IGATE Gate Driver Continuous Output Current 18 mA
VFLAG Flag Output Voltage -0.3 to 40 V
VPWM, VADJ,
Other Input Pins -0.3 to +5.5 V
VTADJ, VGI
TJ Maximum Junction Temperature 150 °C
TST Storage Temperature -55 to +150 °C
Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only; functional
operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to
absolute maximum rating conditions for extended periods of time.
Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and
transporting these devices.

Package Thermal Data

Thermal Resistance Package Typical Unit

Junction-to-Ambient, θJA (Note 6) TSSOP-16EP 50 °C/W
Junction-to-Case, θJC TSSOP-16EP 23 °C/W
Notes: 5. For correct operation SGND and PGND should always be connected together.
6. Measured on High Effective Thermal Conductivity Test Board" according JESD51.

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Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)

Symbol Parameter Performance/Comment Min Max Unit
Normal operation 8
VIN Input supply voltage range Reduced performance operation 60 V
6.3
(Note 7)
Normal operation 8
VAUX Auxiliary supply voltage range (Note 8) Reduced performance operation 60 V
6.3
(Note 7)
VISM Current sense monitor input range 6.3 60 V
VSENSE Differential input voltage VVIN-VISM, with 0 ≤ VADJ ≤ 2.5 0 450 mV
External dc control voltage applied to ADJ DC brightness control mode
VADJ 0.125 2.5 V
pin to adjust output current from 10% to 200%
IREF Reference external load current REF sourcing current 1 mA
Recommended switching frequency range
fmax 300 1000 kHz
(Note 9)
VTADJ Temperature adjustment (TADJ) input voltage range 0 VREF V
To achieve 1000:1 resolution 100 500 Hz
fPWM Recommended PWM dimming frequency range
To achieve 500:1 resolution 100 1000 Hz
tPWMH/L PWM pulse width in dimming mode PWM input high or low 0.002 10 ms
VPWMH PWM pin high level input voltage 2 5.5 V
VPWML PWM pin low level input voltage 0 0.4 V
TJ Operating Junction Temperature Range -40 125 °C
GI Gain setting ratio for boost and buck-boost modes Ratio = VGI/VADJ 0.20 0.50
Notes: 7. Device starts up above 6V and as such the minimum applied supply voltage has to be above 6.5V (plus any noise margin). The ZXLD1370 will,
however, continue to function when the input voltage is reduced from ≥ 8V down to 6.3V.
When operating with input voltages below 8V the output current and device parameters may deviate from their normal values; and is dependent on
power MOSFET switch, load and ambient temperature conditions. To ensure best operation in Boost and Buck-Boost modes with input voltages, VIN,
between 6.3 and 8V a suitable boot-strap network on VAUX pin is recommended.
Performance in Buck mode will be reduced at input voltages (VIN, VAUX) below 8V. – a boot-strap network cannot be implemented in buck mode.
8. VAUX can be driven from a voltage higher than VIN to provide higher efficiency at low VIN voltages, but to avoid false operation; a voltage should
not be applied to VAUX in the absence of a voltage at VIN.
9. The device contains circuitry to control the switching frequency to approximately 400kHz. The maximum and minimum operating frequency is not
tested in production.

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Electrical Characteristics (Note 5) (VIN = VAUX =12V, TA = +25°C, unless otherwise specified.)

Symbol Parameter Conditions Min Typ Max Units

Supply and Reference Parameters
Under-Voltage detection threshold
VUV- VIN or VAUX falling 5.2 5.6 6.3 V
Normal operation to switch disabled
Under-Voltage detection threshold
VUV+ VIN or VAUX rising 5.5 6.0 6.5 V
Switch disabled to normal operation
IQ-IN Quiescent current into VIN PWM pin floating. 1.5 3.0 mA
IQ-AUX Quiescent current into VAUX Output not switching 150 300 µA
ISB-IN Standby current into VIN. PWM pin grounded 90 150 µA
ISB-AUX Standby current into VAUX. for more than 15ms 0.7 10.0 µA
VREF Internal reference voltage No load 1.237 1.250 1.263 V
Change in reference voltage with output Sourcing 1mA -5
ΔVREF mV
current Sinking 100µA 5
VREF_LINE Reference voltage line regulation VIN = VAUX , 6.5V<VIN = <60V -60 -90 dB
VREF-TC Reference temperature coefficient +/-50 ppm/°C
DC-DC Converter Parameters
External dc control voltage applied to ADJ pin DC brightness control mode
VADJ 0.125 1.25 2.50 V
to adjust output current (Note 8) 10% to 200%
VADJ ≤ 2.5V 100 nA
IADJ ADJ input current (Note 10) †
VADJ = 5.0V 5 µA
GI Voltage threshold for boost and buck-boost
VGI VADJ = 1.25V 0.8 V
modes selection (Note 8)
VGI ≤ 2.5V 100 nA
IGI GI input current (Note 10) †
VGI = 5.0V 5 µA
IPWM PWM input current VPWM = 5.5V 36 100 µA
PWM pulse width
tPWMoff PWM input low 10 15 25 ms
(to enter shutdown state)
Thermal shutdown upper threshold
TSDH Temperature rising. 150 °C
(GATE output forced low)
Thermal shutdown lower threshold
TSDL Temperature falling. 125 °C
(GATE output re-enabled)
High-Side Current Monitor (Pin ISM)
IISM Input Current @ VISM = 12V 11 20 µA
Buck 218
VSENSE Current measurement sinse voltage Boost (Note 11) VADJ = 1.25V 225 mV
Buck-Boost (Note 11)
VSENSE_acc Accuracy of nominal VSENSE threshold voltage ±0.25 ±2 %
VADJ = 1.25V
VSENSE-OC Over-current sense threshold voltage 300 350 375 mV
Notes: 10. The ADJ and GI pins have an internal clamp that limits the internal node to less than 3V. This provides some failsafe should those pins get overdriven.
11. Initial sense voltage in Boost and Buck-Boost modes at maximum duty cycle.

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Electrical Characteristics (cont.) (VIN = VAUX =12V, TA = +25°C, unless otherwise specified.)

Symbol Parameter Conditions Min Typ Max Units

Output Parameters
VFLAGL FLAG pin low level output voltage Output sinking 1mA 0.5 V
IFLAGOFF FLAG pin open-drain leakage current VFLAG=40V 1 µA
Normal operation 4.2 4.5 4.8
Out of regulation (VSHP out of range)
3.3 3.6 3.9
(Note 13)
STATUS Flag no-load output voltage VIN under-voltage (VIN < 5.6V) 3.3 3.6 3.9
VSTATUS V
(Note 12) Switch stalled (tON or tOFF> 100µs) 3.3 3.6 3.9
Over-temperature (TJ > +125°C) 1.5 1.8 2.1
Excess sense resistor current
0.6 0.9 1.2
(VSENSE > 0.32V)
RSTATUS Output impedance of STATUS output Normal operation 10 kΩ
Driver output (PIN GATE)
No load Sourcing 1mA
VGATEH High level output voltage 10 11 V
(Note 14)
VGATEL Low level output voltage Sinking 1mA, (Note 15) 0.5 V
VIN = VAU X= VISM = 18V
VGATECL High level GATE CLAMP voltage 12.8 15.0 V
IGATE = 1mA
Dynamic peak current available during rise Charging or discharging gate of external
IGATE ±300 mA
or fall of output voltage switch with QG = 10nC and 400kHz
Time to assert ‘STALL’ flag and
tSTALL warning on STATUS output GATE low or high 100 170 µs
(Note 16)
LED Thermal control circuit (TADJ) parameters
VTADJH Onset of output current reduction
Upper threshold voltage 560 625 690 mV
(VTADJ falling)
VTADJL Output current reduced to <10% of set
Lower threshold voltage 380 440 500 mV
value (VTADJ falling)
ITADJ TADJ pin Input current VTADJ = 1.25V 1 µA
Notes: 12. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence. E.g. ‘Excessive coil current’ and
‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin. The voltage levels on the STATUS output assume the
Internal regulator to be in regulation and VADJ<=VREF. A reduction of the voltage on the STATUS pin will occur when the voltage on VIN is near the
minimum value of 6V.
13. Flag is asserted if VSHP<2.5V or VSHP>3.5V
14. GATE is switched to the supply voltage VAUX for low values of VAUX (i.e. between 6V and approximately 12V). For VAUX>12V, GATE is clamped
internally to prevent it exceeding 15V.
15. GATE is switched to PGND by an NMOS transistor
16. If tON exceeds tSTALL, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If tOFF exceeds tSTALL, the switch will remain off
until normal operation is possible.

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Typical Characteristics
3 1.252

1.2515
2.5

REFERENCE VOLTAGE (V)

1.251
SUPPLY CURRENTt (mA)

2
1.2505

1.5 1.25

1.2495
1
1.249
0.5
1.2485

0 1.248
6 12 18 24 30 36 42 48 54 60 -40 -25 -10 5 20 35 50 65 80 95 110 125
SUPPLY VOLTAGE (V) JUNCTION TEMPERATURE (°C)
Figure 1 Supply Current vs. Supply Voltage Figure 2 VREF vs. Temperature

100% 1500

1250
LED CURRENT DIMMING FACTOR

80%
LED CURRENT (mA)

1000
60%

750

40%
500

20%
250

0% 0
0 250 500 750 1000 1250 0 10 20 30 40 50 60 70 80 90 100
TADJ PIN VOLTAGE (mV) PWM DUTY CYCLE (%)
Figure 3 LED Current vs. TADJ Voltage Figure 4 ILED vs. PWM Duty Cycle

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Typical Characteristics (cont.)

1500 900 700 1400
650
600 1200
1250 750

SWITCHING FREQUENCY (kHz)

550

SWITCHING FREQUENCY (kHz)

500 1000

LED CURRENT (mA)

LED CURRENT (mA)

1000 600 450

400 ILED 800
750 450 350
Switching
300 Frequency 600

500 250
300
200 400
TA = 25°C
150 VAUX = VIN = 24V
250 150 100 8LEDs 200
L = 33µH
50 GI = 0.23
RS = 300mΩ
0 0 0 0
0 0.5 1 1.5 2 2.5 0 1 0.51.5 2 2.5
ADJ VOLTAGE (V) ADJ VOLTAGE
Figure 5 Buck LED Current, Switching Frequency vs. VADJ Figure 6 Buck-Boost LED Current, Switching Frequency vs. VADJ

700 700 100%

650 TA = 25°C
90%
600 600 L = 33µH
RS = 150mΩ
80%
SWITCHING FREQUENCY (kHz)

550 Buck Mode

2 LEDS
500 500 70%
LED CURRENT (mA)

450
ILED 60%
400 400
DUTY

350 50%
Switching
300 Frequency 300
40%
250
200 200 30%
TA = 25°C
150 VAUX = VIN = 12V 20%
12 LEDs
100 L = 33µH 100
RS = 300mΩ 10%
50
0 0 0%
0
0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 6 12 18 24 30 36 42 48 54 60
ADJ VOLTAGE INPUT VOLTAGE (V)
Figure 7 Boost LED Current, Switching Frequency vs. VADJ Figure 8 Duty Cycle vs. Input Voltage

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Typical Characteristics (cont.) Buck Mode – RS = 150mΩ, L = 33µH

1.500
1 LED 3 LEDs 5 LEDs 7 LEDs 9 LEDs 11 LEDs 13 LEDs 15 LEDs

1.490
TA = 25°C
VAUX = VIN
LED CURRENT (A)

1.480

1.470

1.460

1.450

1.440

1.430
6.5 11 15.5 20 24.529 33.5 38 42.5 47 51.5 56 60.5
INPUT VOLTAGE (V)
Figure 9 Load Current vs. Input Voltage & Number of LED

1000
1 LED 3 LEDs 5 LEDs 7 LEDs 9 LEDs 11 LEDs 13 LEDs 15 LEDs
900
SWITCHING FREQUENCY (kHz)

800 TA = 25°C
VAUX = VIN
700

600

500

400

300

200

100
0
6.5 11 15.5 20 24.5 29 33.5 38 42.5 47 51.5 56 60.5
INPUT VOLTAGE (V)
Figure 10 Frequency vs. Input Voltage & Number of LED

100

95

90
EFFICIENCY (%)

85

80

75
TA = 25°C
VAUX = VIN
70

65

60
6.5 11 15.5 20 24.5 29 33.5 38 42.5 47 51.5 56 60.5
INPUT VOLTAGE (V)
Figure 11 Efficiency vs. Input & Number of LED

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Typical Characteristics (cont.) Buck Mode – RS = 300mΩ, L = 47µH

0.740

0.735
TA = 25°C
LED CURRENT (A)

VAUX = VIN
0.730

0.725

0.720

2 LEDs 3 LEDs 5 LEDs 7 LEDs 9 LEDs 11 LEDs 13 LEDs 15 LEDs

0.715
6.5 11 15.5 20 24.529 33.5 38 42.5 47 51.5 56 60.5
INPUT VOLTAGE (V)
Figure 12 ILED vs. Input & Number of LED

1000
2 LEDs 3 LEDs 5 LEDs 7 LEDs 9 LEDs 11 LEDs 13 LEDs 15 LEDs
900
SWITCHING FREQUENCY (kHz)

T A = 25°C
800
VAUX = VIN

700

600

500

400

300

200

100
0
6.5 11 15.5 20 24.5 29 33.5 38 42.5 47 51.5 56 60.5
INPUT VOLTAGE (V)
Figure 13 Frequency ZXLD1370 - Buck Mode - L47µH

100

95

90
EFFICIENCY (%)

85

80
TA = 25°C
VAUX = VIN
75

70
2 LEDs 3 LEDs 5 LEDs 7 LEDs 9 LEDs 11 LEDs 13 LEDs 15 LEDs
65

60
6.5 11 15.5 20 24.5 29 33.5 38 42.5 47 51.5 56 60.5
INPUT VOLTAGE (V)
Figure 14 Efficiency vs. Input Voltage & Number of LED

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Typical Characteristics (cont.) Boost Mode – RS = 150mΩ, GIRATIO = 0.23, L = 33µH

0.400

0.350
TA = 25°C
0.300
VAUX = VIN
LED CURRENT (A)

0.250

0.200

0.150

0.100

0.050
3 LEDs 4 LEDs 6 LEDs 8 LEDs 10 LEDs 12 LEDs 14 LEDs 16 LEDs
0.000
6.5 10 13.5 17 20.5 24 27.5 31 34.5 38 41.5 45 48.5
INPUT VOLTAGE (V)
Figure 15 ILED vs. Input Voltage & Number of LED

500
3 LEDs 4 LEDs 6 LEDs 8 LEDs 10 LEDs 12 LEDs 14 LEDs 16 LEDs
450
SWITCHING FREQUENCY (kHz)

TA = 25°C
400 VAUX = VIN

350

300

250

200

150

100 Boosted voltage across

LEDs approaching VIN
50
6.5 10 13.5 17 20.5 24 27.5 31 34.5 38 41.5 45 48.5
INPUT VOLTAGE (V)
Figure 16 Frequency vs. Input Voltage & Number of LED

100
3 LEDs 4 LEDs 6 LEDs 8 LEDs 10 LEDs 12 LEDs 14 LEDs 16 LEDs

95

90
EFFICIENCY (%)

85

80

75
TA = 25°C
70 VAUX = VIN

65

60
6.5 10 13.5 17 20.5 24 27.5 31 34.5 38 41.5 45 48.5
INPUT VOLTAGE (V)
Figure 17 Efficiency vs. Input Voltage & Number of LED

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Typical Characteristics (cont.) Buck-Boost Mode – RS = 150mΩ, GIRATIO = 0.23, L = 47µH

0.370
3 LEDs 4 LEDs 5 LEDs 6 LEDs 7 LEDs 8 LEDs
0.365

0.360
LED CURRENT (A)

0.355

0.350

0.345

0.340

0.335

0.330
6.5 8 9.5 11 12.5 14 15.5 17
INPUT VOLTAGE (V)
Figure 18 LED Current vs. Input Voltage & Number of LED

800
3 LEDs 4 LEDs 5 LEDs 6 LEDs 7 LEDs 8 LEDs
700
SWITCHING FREQUENCY (kHz)

600

500

400

300

200

100

0
6.5 8 9.5 11 12.5 14 15.5 17
INPUT VOLTAGE (V)
Figure 19 Switching Frequency vs. Input Voltage & Number of LED

100
3 LEDs 4 LEDs 5 LEDs 6 LEDs 7 LEDs 8 LEDs
95

90
EFFICIENCY (%)

85

80

75

70

65

60
6.5 8 9.5 11 12.5 14 15.5 17
INPUT VOLTAGE (V)
Figure 20 Efficiency vs. Input Voltage & Number of LED

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Application Information
The ZXLD1370 is a high accuracy hysteretic inductive buck/boost/buck-boost controller designed to be used with an external NMOS switch for
current-driving single or multiple series-connected LEDs. The device can be configured to operate in buck, boost, or buck-boost modes by
suitable configuration of the external components as shown in the schematics shown in the device operation description.

Device Description
a) Buck mode – the most simple buck circuit is shown in Figure 21
Control of the LED current buck mode is achieved by sensing the coil
current in the sense resistor Rs, connected between the two inputs of a
current monitor within the control loop block. An output from the control
loop drives the input of a comparator which drives the gate of the
external NMOS switch transistor Q1 via the internal Gate Driver. When
the switch is on, the drain voltage of Q1 is near zero. Current flows from
VIN, via Rs, LED, coil and switch to ground. This current ramps up until
an upper threshold value is reached (see Figure 22). At this point
GATE goes low, the switch is turned off and the drain voltage increases
to VIN plus the forward voltage, VF, of the schottky diode D1. Current
flows via RS, LED, coil and D1 back to VIN. When the coil current has
ramped down to a lower threshold value, GATE goes high, the switch is
turned on again and the cycle of events repeats, resulting in continuous
oscillation. The feedback loop adjusts the NMOS switch duty cycle to
stabilize the LED current in response to changes in external conditions,
including input voltage and load voltage.
Figure 21 Buck Configuration
The average current in the sense resistor, LED and coil is equal to the
average of the maximum and minimum threshold currents. The ripple
current (hysteresis) is equal to the difference between the thresholds.
The control loop maintains the average LED current at the set level by
adjusting the switch duty cycle continuously to force the average sense
resistor current to the value demanded by the voltage on the ADJ pin.
This minimizes variation in output current with changes in operating
conditions.

The control loop also regulates the switching frequency by varying the
level of hysteresis. The hysteresis has a defined minimum (typ 5%) and
a maximum (typ 30%). The frequency may deviate from nominal in
some conditions. This depends upon the desired LED current, the coil
inductance and the voltages at the input and the load. Loop
compensation is achieved by a single external capacitor C2, connected
between SHP and SGND.

The control loop sets the duty cycle so that the sense voltage is

⎛ V ADJ ⎞
V SENSE = 0.218⎜⎜ ⎟⎟
⎝ VREF ⎠
Therefore,

⎛ 0.218 ⎞⎛ V ADJ ⎞
ILED = ⎜⎜ ⎟⎜
⎟⎜
⎟⎟ (Buck mode) Equation 1
⎝ RS ⎠⎝ VREF ⎠

If the ADJ pin connected to the REF pin, this simplifies to

⎛ 0.218 ⎞⎛ V ADJ ⎞
ILED = ⎜⎜ ⎟⎜
⎟⎜
⎟⎟ (Buck mode)
⎝ RS ⎠⎝ VREF ⎠ Figure 22 Operating Waveforms (Buck Mode)

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ZXLD1370

Application Information (cont.)

b) Boost and Buck-Boost modes – the most simple boost/buck-boost circuit is shown in Figure 23

Control in Boost and Buck-boost mode is achieved by sensing the coil

current in the series resistor Rs, connected between the two inputs of a
current monitor within the control loop block. An output from the control loop
drives the input of a comparator which drives the gate of the external NMOS
switch transistor Q1 via the internal Gate Driver. When the switch is on, the
drain voltage of Q1 is near zero. Current flows from VIN, via Rs, coil and
switch to ground. This current ramps up until an upper threshold value is
reached (see Figure 24). At this point GATE goes low, the switch is turned
off and the drain voltage increases to either:

1) the load voltage VLEDS plus the forward voltage of D1 in Boost

configuration,
or
2) the load voltage VLEDS plus the forward voltage of D1 plus VIN in
Buck-boost configuration.

Current flows via Rs, coil, D1 and LED back to VIN (Buck-boost mode), or
GND (Boost mode). When the coil current has ramped down to a lower
threshold value, GATE goes high, the switch is turned on again and the
Figure 23 Boost and Buck-Boost Configuration
cycle of events repeats, resulting in continuous oscillation. The feeback
loop adjusts the NMOS switch duty cycle to stabilize the LED current in
response to changes in external conditions, including input voltage and load
voltage. Loop compensation is achieved by a single external capacitor C2,
connected between SHP and SGND. Note that in reality, a load capacitor
COUT is used, so that the LED current waveform shown is smoothed.

The average current in the sense resistor and coil, IRS, is equal to the
average of the maximum and minimum threshold currents and the ripple
current (hysteresis) is equal to the difference between the thresholds.

The average current in the LED, ILED, is always less than IRS. The feedback
control loop adjusts the switch duty cycle, D, to achieve a set point at the
sense resistor. This controls IRS. During the interval tOFF, the coil current
flows through D1 and the LED load. During tON, the coil current flows
through Q1, not the LEDs. Therefore the set point is modified by D using a
gating function to control ILED indirectly. In order to compensate internally
for the effect of the gating function, a control factor, GI_ADJ is used.
GI_ADJ is set by a pair of external resistors, RGI1 and RGI2. (Figure 23.)
This allows the sense voltage to be adjusted to an optimum level for power
efficiency without significant error in the LED controlled current.

⎛ RGI1 ⎞
GI _ ADJ = ⎜ ⎟
⎝ RGI1 + RGI2 ⎠
Equation 2 (Boost and Buck-boost modes)

The control loop sets the duty cycle so that the sense resistor current is

⎛ 0.225 ⎞⎛ GI _ ADJ ⎞⎛ V ADJ ⎞

RS = ⎜⎜ ⎟⎜
⎟ ⎟⎜⎜ ⎟
⎟
⎝ RS ⎠⎝ 1 − D ⎠⎝ VREF ⎠
Equation 3 (Boost and Buck-boost modes)

IRS equals the coil current. The coil is connected only to the switch and the Figure 24 Operating Waveforms
(Boost and Buck-boost modes)
schottky diode. The schottky diode passes the LED current.

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Therefore the average LED current is the coil current multiplied by the schottky diode duty cycle, 1-D.

⎛ 0.225 ⎞ ⎛ ⎞
ILED = IRS (1 − D) = ⎜⎜ ⎟GI _ ADJ⎜ V ADJ ⎟ (Boost and Buck-Boost) Equation 4
⎟ ⎜ ⎟
⎝ RS ⎠ ⎝ VREF ⎠

This shows that the LED current depends on the ADJ pin voltage, the reference voltage and 3 resistor values (RS, RGI1 and RGI2). It is
independent of the input and output voltages.

If the ADJ pin is connected to the REF pin, this simplifies to

⎛ 0.225 ⎞
ILED = ⎜⎜ ⎟GI _ ADJ
⎟ (Boost and Buck-Boost)
⎝ RS ⎠

Now ILED is dependent only on the 3 resistor values.

Considering power dissipation and accuracy, it is useful to know how the mean sense voltage varies with input voltage and other parameters.

⎛ GI _ ADJ ⎞⎛ V ADJ ⎞
VRS = IRS = 0.225⎜ ⎟⎜⎜ ⎟⎟ (Boost and Buck-Boost) Equation 5
⎝ 1 − D ⎠⎝ VREF ⎠

This shows that the sense voltage varies with duty cycle in Boost and Buck-Boost configurations.

Application Circuit Design

External component selection is driven by the characteristics of the load and the input supply, since this will determine the kind of topology being
used for the system. Component selection begins with the current setting procedure, the inductor/frequency setting and the MOSFET selection.
Finally after selecting the freewheeling diode and the output capacitor (if needed), the application section will cover the PWM dimming and
thermal feedback. The full procedure is greatly accelerated by the web Calculator spreadsheet, which includes fully automated component
selection, and is available on the Diodes web site. However the full calculation is also given here.

Some components depend upon the switching frequency and the duty cycle. The switching frequency is regulated by the ZXLD1370 to a large
extent, depending upon conditions. This is discussed in a later paragraph dealing with coil selection.

Duty Cycle Calculation and Topology Selection

The duty cycle is a function of the input and output voltages. Approximately, the MOSFET switching duty cycle is

V OUT
DBUCK ≈ for Buck
VIN

V OUT − VIN
DBOOST ≈ for Boost Equation 6
V OUT

V OUT
DBB ≈ for Buck-Boost
V OUT + VIN

Because D must always be a positive number less than 1, these equations show that

VOUT < VIN for Buck (voltage step-down)

VOUT > VIN for Boost (voltage step-up)
VOUT > or = or < VIN for Buck-boost (voltage step-down or step-up)

This allows us to select the topology for the required voltage range.

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Application Information (cont.)

More exact equations are used in the web Calculator. These are:

V OUT + VF + IOUT (RS + RCOIL )

DBUCK = for Buck
VIN + VF − VDSON

V OUT − VIN + IIN (RS + RCOIL ) + VF

DBOOST = for Boost Equation 7
V OUT + VF − VDSON

V OUT + VF + (IIN + IOUT )(RS + RCOIL )

DBB = for Buck-boost
V OUT + VIN + VF − VDSON

where VF = schottky diode forward voltage, estimated for the expected coil current, ICOIL
VDSON = MOSFET drain source voltage in the ON condition (dependent on RDSON and drain current = ICOIL)
RCOIL = DC winding resistance of L1

The additional terms are relatively small, so the exact equations will only make a significant difference at lower operating voltages at the input
and output, i.e. low input voltage or a small number of LEDs connected in series. The estimates of VF and VDSON depend on the coil current.
The mean coil current, ICOIL depends upon the topology and upon the mean terminal currents as follows:

ILED for Buck

ICOIL = IIN for Boost Equation 8
IIN + ILED for Buck-boost

ILED is the target LED current and is already known. IIN will be calculated with some accuracy later, but can be estimated now from the electrical
power efficiency. If the expected efficiency is roughly 90%, the output power POUT is 90% of the input power, PIN, and the coil current is
estimated as follows.

POUT ≈ 0.9 PIN

or ILED N VLED ≈ 0.9 IIN VIN

where N is the number of LEDs connected in series, and VLED is the forward voltage drop of a single LED at ILED.

ILED N VLED
So IIN ≈ Equation 9
0.9 VIN

Equation 9 can now be used to find ICOIL in Equation 8, which can then be used to estimate the small terms in Equation 7. This completes the
calculation of Duty Cycle and the selection of Buck, Boost or Buck-boost topology.

An initial estimate of duty cycle is required before we can choose a coil. In Equation 7, the following approximations are recommended:

VF = 0.5V
IIN(RS+RCOIL) = 0.5V
IOUT(RS+RCOIL) = 0.5V
VDSON = 0.1V
(IIN+IOUT)(RS+RCOIL) = 1.1V

Then Equation 7 becomes

V OUT + 1
DBUCK ≈ for Buck
VIN + 0.4
V − VIN + 1
DBOOST ≈ OUT for Boost Equation 7a
V OUT + 0.4
V OUT + 1.6
DBB ≈ for Buck-boost
V OUT + VIN + 0.4

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Application Information (cont.)

Setting the LED current
The LED current requirement determines the choice of the sense resistor Rs. This also depends on the voltage on the ADJ pin and the voltage
on the GI pin, according to the topology required.

The ADJ pin may be connected directly to the internal 1.25V reference (VREF) to define the nominal 100% LED current. The ADJ pin can also be
driven with an external dc voltage between 125mV and 2.5V to adjust the LED current proportionally between 10% and 200% of the nominal
value.

For a divider ratio GI_ADJ greater than 0.65V, the ZXLD1370 operates in Buck mode when VADJ = 1.25V. If GI_ADJ is less than 0.65V (typical),
the device operates in Boost or buck-Boost mode, according to the load connection. This 0.65V threshold varies in proportion to VADJ, i.e., the
Buck mode threshold voltage is 0.65 VADJ /1.25V.

ADJ and GI are high impedance inputs within their normal operating voltage ranges. An internal 2.6V clamp protects the device against
excessive input voltage and limits the maximum output current to approximately 4% above the maximum current set by VREF if the maximum
input voltage is exceeded.

Buck Topology
In Buck mode, GI is connected to ADJ as in Figure 25. The LED current depends only
upon RS, VADJ and VREF. From Equation 1 above,

⎛ 0.218 ⎞⎛ V ADJ ⎞
RSBUCK = ⎜⎜ ⎟⎟⎜⎜ ⎟⎟ Equation 10
⎝ ILED ⎠⎝ VREF ⎠

If ADJ is directly connected to VREF, this becomes:

⎛ 0.218 ⎞
RSBUCK = ⎜⎜ ⎟⎟
⎝ ILED ⎠

Figure 25 Setting LED Current in

Buck Configuration

Boost and Buck-Boost Topology

For Boost and Buck-boost topologies, the LED current depends upon the resistors, RS,
RGI1, and RGI2 as in Equations 4 and 2 above. There is more than one degree of
freedom. That is to say, there is not a unique solution. From Equation 4,

⎛ 0.225 ⎞ ⎛ ⎞
RSBOOSTBB = ⎜⎜ ⎟⎟GI _ ADJ⎜⎜ V ADJ ⎟⎟ Equation 11
I
⎝ LED ⎠ V
⎝ REF ⎠

If ADJ is connected to REF, this becomes

⎛ 0.225 ⎞
RSBOOSTBB = ⎜⎜ ⎟⎟GI _ ADJ
⎝ ILED ⎠

GI_ADJ is given by Equation 2, repeated here for convenience:

⎛ RGI1 ⎞
GI _ ADJ = ⎜ ⎟
⎝ RGI1 + RGI2 ⎠ Figure 26 Setting LED Current in Boost
and Buck-Boost Configuration
Note that from considerations of ZXLD1370 input bias current, the recommended limits for RGI1 are:

22kΩ < RGI1 < 100kΩ Equation 12

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Application Information (cont.)

The additional degree of freedom allows us to select GI_ADJ within limits but this may affect overall performance a little. As mentioned above,
the working voltage range at the GI pin is restricted. The permitted range of GI_ADJ in Boost or Buck-boost configuration is

0.2 < GI_ADJ < 0.5 Equation 13

The mean voltage across the sense resistor is

VRS = ICOIL RS Equation 14

Note that if GI_ADJ is made larger, these equations show that RS is increased and VRS is increased. Therefore, for the same coil current, the
dissipation in RS is increased. So, in some cases, it is better to minimize GI_ADJ. However, consider Equation 5. If ADJ is connected to REF,
this becomes

⎛ GI _ ADJ ⎞
VRS = 0.225⎜ ⎟
⎝ 1− D ⎠

This shows that VRS becomes smaller than 225mV if GI_ADJ < 1 - D. If also D is small, VRS can become too small. For example if D = 0.2, and
GI_ADJ is the minimum value of 0.2, then VRS becomes 0.225* 0.2 / 0.8 = 56.25 mV. This will increase the LED current error due to small
offsets in the system, such as mV drop in the copper printed wiring circuit, or offset uncertainty in the ZXLD1370. If now, GI_ADJ is increased to
0.4 or 0.5, VRS is increased to a value greater than 100mV. This will give small enough ILED error for most practical purposes. Satisfactory
operation will be obtained if VRS is more than about 80mV. This means GI_ADJ should be greater than (1-DMIN) * 80/225 = (1- DMIN) * 0.355.

There is also a maximum limit on VRS which gives a maximum limit for GI_ADJ. If VRS exceeds approximately 300mV, or 133% of 225mV, the
STATUS output may indicate an over-current condition. This will happen for larger DMAX.

Therefore, together with the requirement of Equation 13, the recommended range for GI_ADJ is

0.355 ( 1-DMIN) < GI_ADJ < 1.33 ( 1-DMAX ) Equation 15

An optimum compromise for GI_ADJ has been suggested, i.e.

GI_ADJAUTO = 1 - DMAX Equation 16

This value has been used for the “Automatic” setting of the web Calculator. If 1-DMAX is less than 0.2, then GI_ADJ is set to 0.2. If 1- DMAX is
greater than 0.5 then GI_ADJ is set to 0.5.

Once GI_ADJ has been selected, a value of RGI1 can be selected from Equation 12.
Then RGI2 is calculated as follows, rearranging Equation 2:

⎛ 1 − GI _ ADJ ⎞
RGI2 = RGI1⎜⎜ ⎟⎟ Equation 17
⎝ GI _ ADJ ⎠

For example to drive 12 LEDS at a current of 350mA from a 12V supply requires Boost configuration. Each LED has a forward voltage of 3.2V
at 350mA, so Vout = 3.2*12 = 38.4V. From Equation 6, the duty cycle is approximately

(V OUT − VIN ) = ⎛ 38.4 − 12 ⎞ = 0.6875

⎜ ⎟
V OUT ⎝ 38.4 ⎠
From Equation 16, we set GI_ADJ to 1 – D = 0.3125.

IF RGI1 = 33kΩ, then from Equation 17,

⎛ 1 − 0.3125 ⎞
RGI2 = 33 x⎜ ⎟ = 72.6kΩ
⎝ 0.3125 ⎠
Let us choose the preferred value RGI2 = 75kΩ. Now GI_ADJ is adjusted to the new value, using Equation 2.

⎛ RGI1 ⎞ 33k
GI _ ADJ = ⎜ ⎟= = 0.305
⎝ RGI1 + RGI2 ⎠ 33k + 75k

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Application Information (cont.)

Now we calculate RS from Equation 11. Assume ADJ is connected to REF.

⎛ 0.225 ⎞ ⎛ ⎞ 0.225
RSBOOSTBB = ⎜⎜ ⎟⎟ xGI _ ADJx⎜⎜ V ADJ ⎟⎟ = x0.305 = 0.196Ω
⎝ ILED ⎠ ⎝ VREF ⎠ 0.35
A preferred value of RSBoostBB = 0.2Ω will give the desired LED current with an error of 2% due to the preferred value selection.

Table 1 shows typical resistor values used to determine the GI_ADJ ratio with E24 series resistors

Table 1
GI ratio RGI1 RG2
0.2 30kΩ 120kΩ
0.25 33kΩ 100kΩ
0.3 39kΩ 91kΩ
0.35 30kΩ 56kΩ
0.4 100kΩ 150kΩ
0.45 51kΩ 62kΩ
0.5 30kΩ 30kΩ

This completes the LED current setting.

Inductor Selection and Frequency Control

The selection of the inductor coil, L1, requires knowledge of the switching frequency and current ripple, and also depends on the duty cycle to
some extent. In the hysteretic converter, the frequency depends upon the input and output voltages and the switching thresholds of the current
monitor. The peak-to-peak coil current is adjusted by the ZXLD1370 to control the frequency to a fixed value. This is done by controlling the
switching thresholds within particular limits. This effectively much reduces the overall frequency range for a given input voltage range. Where
the input voltage range is not excessive, the frequency is regulated to approximately 330kHz in Buck configuration, and 300kHz in Boost and
Buck-boost configurations. This is helpful in terms of EMC and other system requirements.

For larger input voltage variation, or when the choice of coil inductance is not optimum, the switching frequency may depart from the regulated
value, but the regulation of LED current remains successful. If desired, the frequency can to some extent be increased by using a smaller
inductor, or decreased using a larger inductor. The web Calculator will evaluate the frequency across the input voltage range and the effect of
this upon power efficiency and junction temperatures.

Determination of the input voltage range for which the frequency is regulated may be required. This calculation is very involved, and is not given
here. However the performance in this respect can be evaluated within the web Calculator for the chosen inductance.

The inductance is given as follows in terms of peak-to-peak ripple current in the coil, ΔIL and the MOSFET on time, tON.

{VIN − VLED − IOUT (RDSON + RCOIL + RS )} tON for Buck

ΔIL

L1 = {VIN − IIN (RDSON + RCOIL + RS )} tON for Boost Equation 18

ΔIL

{VIN − (IIN + IOUT )(RDSON + RCOIL + RS)} tON for Buck-boost

ΔIL

Therefore In order to calculate L1, we need to find IIN, tON, and ΔIL. The effects of the resistances are small and will be estimated.

IIN is estimated from Equation 9.

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Application Information (cont.)

tON is related to switching frequency, f, and duty cycle, D, as follows:

D
tON = Equation 19
f

As the regulated frequency is known, and we have already found D from Equation 7 or the approximation Equation 7b, this allows calculation of
tON.

The ZXLD1370 sets the ripple current, ΔIL is monitored by the ZXLD1370 which sets this to be between nominally 10% and 30% of the mean coil
current, ICOIL, which is found from Equation 8. The device adjusts the ripple current within this range in order to regulate the switching frequency.
We therefore need to use a value of 20% of ICOIL to find an inductance which is optimized for the input voltage range. The range of ripple current
control is also modulated by other circuit parameters as follows.

⎧⎪ ⎛ V ADJ ⎞ ⎫⎪ 1 − D
ΔILMAX = ⎨0.03 + 0.12⎜⎜ ⎟⎟ ⎬ ICOIL
⎪⎩ ⎝ VREF ⎠ ⎪⎭ GI _ ADJ

⎧⎪ ⎛ V ADJ ⎞⎫⎪ 1 − D
ΔILMIN = ⎨0.01 + 0.04⎜⎜ ⎟⎬
⎟ ICOIL Equation 20
⎪⎩ ⎝ VREF ⎠⎪⎭ GI _ ADJ

⎧⎪ ⎛ V ADJ ⎞⎪⎫ 1 − D
ΔILMID = ⎨0.02 + 0.08⎜⎜ ⎟⎬
⎟ ICOIL
⎪⎩ ⎝ VREF ⎠⎪⎭ GI _ ADJ

If ADJ is connected to REF, this simplifies to

1− D
ΔILMAX = 0.15 ICOIL
GI _ ADJ

1− D
ΔILMIN = 0.05 ICOIL Equation 20a
GI _ ADJ

1− D
ΔILMID = 0.1 ICOIL
GI _ ADJ

where ΔILMID is the value we must use in Equation 18. We have now established the inductance value.

The chosen coil should have a saturation current higher than the peak sensed current. This saturation current is the DC current for which the
inductance has decreased by 10% compared to the low current value.

Assuming ±10% ripple current, we can find this peak current from Equation 8, adjusted for ripple current:

1.1 ILED for Buck

ICOILPEAK = 1.1 IINMAX for Boost Equation 21
1.1 IINMAX + ILED for Buck-boost

where IINMAX is the value of IIN at minimum VIN.

The mean current rating is also a factor, but normally the saturation current is the limiting factor.

The following websites may be useful in finding suitable components

www.coilcraft.com
www.niccomp.com
www.wuerth-elektronik.de

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Application Information (cont.)

MOSFET Selection
The ZXLD1370 requires an external NMOS FET as the main power switch with a voltage rating at least 15% higher than the maximum circuit
voltage to ensure safe operation during the overshoot and ringing of the switch node. The current rating is recommended to be at least 10%
higher than the average transistor current. The power rating is then verified by calculating the resistive and switching power losses.

P = PRESISTIVE + PSWITCHING

Resistive Power Losses

The resistive power losses are calculated using the RMS transistor current and the MOSFET on-resistance.
Calculate the current for the different topologies as follows:

Buck Mode
IMOSFET−MAX = DMAX x ILED

Boost / Buck-Boost Mode

DMAX
IMOSFET − MAX = × iLED
1−DMAX

The approximate RMS current in the MOSFET will be:

Buck Mode
IMOSFET − RMS = ILED D

Boost / Buck-Boost Mode

D
IMOSFET − RMS = x ILED
1− D

The resistive power dissipation of the MOSFET is:

PRESISTIVE = IMOSFET − RMS2 x RDS − ON

Switching Power Losses

Calculating the switching MOSFET's switching loss depends on many factors that influence both turn-on and turn-off. Using a first order rough
approximation, the switching power dissipation of the MOSFET is:

CRSS x V 2IN x fsw x ILOAD

PSWITCHING =
IGATE
where
CRSS is the MOSFET's reverse-transfer capacitance (a data sheet parameter),
fSW is the switching frequency,
IGATE is the MOSFET gate-driver's sink/source current at the MOSFET's turn-on threshold.

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Application Information (cont.)

Matching the MOSFET with the controller is primarily based on the rise and fall time of the gate voltage. The best rise/fall time in the application
is based on many requirements, such as EMI (conducted and radiated), switching losses, lead/circuit inductance, switching frequency, etc. How
fast a MOSFET can be turned on and off is related to how fast the gate capacitance of the MOSFET can be charged and discharged. The
relationship between C (and the relative total gate charge Qg), turn-on/turn-off time and the MOSFET driver current rating can be written as:

dV ⋅ C Qg
dt = =
I I
where
dt = turn-on/turn-off time
dV = gate voltage
C = gate capacitance = Qg/V
I = drive current – constant current source (for the given voltage value)

Here the constant current source” I ” usually is approximated with the peak drive current at a given driver input voltage.
(Example 1)
Using the DMN6068 MOSFET (VDS(MAX) = 60V, ID(MAX) = 8.5A):

Æ QG = 10.3nC at VGS = 10V

ZXLD1370 IPEAK = I GATE = 300mA

Qg 10.3nC
dt = = = 35ns
IPEAK 300mA
Assuming that cumulatively the rise time and fall time can account for a maximum of 10% of the period, the maximum frequency allowed in this
condition is:

tPERIOD = 20*dt Æ f = 1/ tPERIOD = 1.43MHz

This frequency is well above the max frequency the device can handle, therefore the DNM6068 can be used with the ZXLD1370 in the whole
spectrum of frequencies recommended for the device (from 300kHz to 1MHz).
(Example 2)

Using the ZXMN6A09K (VDS(MAX) = 60V, ID(MAX) = 12.2A):

Æ QG = 29nC at VGS = 10V

ZXLD1370 IPEAK = 300mA

Qg 29nC
dt = = = 97ns
IPEAK 300mA
Assuming that cumulatively the rise time and fall time can account for a maximum of 10% of the period, the maximum frequency allowed in this
condition is:
tPERIOD = 20*dt Æ f = 1/ tPERIOD = 515kHz

This frequency is within the recommended frequency range the device can handle, therefore the ZXMN6A09K is recommended to be used with
the ZXLD1370 for frequencies from 300kHz to 500kHz).
The recommended total gate charge for the MOSFET used in conjunction with the ZXLD1370 is less than 30nC.

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Application Information (cont.)

Junction Temperature Estimation

Finally, the ZXLD1370 junction temperature can be estimated using the following equations:

Total supply current of ZXLD1370:

IQTOT ≈ IQ + f • QG

Where IQ = total quiescent current IQ-IN + IQ-AUX

Power consumed by ZXLD1370

PIC = VIN • (IQ + f • Qg)

Or in case of separate voltage supply, with VAUX < 15V

PIC = VIN • IQ-IN + Vaux • (IQ-AUX + f • Qg)

TJ = TA + PIC • θJA = TA + PIC • (θJC + θCA)

Where the total quiescent current IQTOT consists of the static supply current (IQ) and the current required to charge and discharge the gate of the
power MOSFET. Moreover the part of thermal resistance between case and ambient depends on the PCB characteristics.

2.5

2
Power dissipation (mW)

1.5

0.5

0
-40 -25 -10 5 20 35 50 65 80 95 110 125
Ambient temperature (°C)

Figure 27 Power Derating Curve for ZXLD1370 Mounted on Test Board According to JESD51

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Application Information (cont.)

Diodes Selection
For maximum efficiency and performance, the rectifier (D1) should be a fast low capacitance Schottky diode* with low reverse leakage at the
maximum operating voltage and temperature. The Schottky diode also provides better efficiency than silicon PN diodes, due to a combination of
lower forward voltage and reduced recovery time.

It is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher than the maximum
output load current. In particular, it is recommended to have a voltage rating at least 15% higher than the maximum transistor voltage to ensure
safe operation during the ringing of the switch node and a current rating at least 10% higher than the average diode current. The power rating is
verified by calculating the power loss through the diode.

The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on the Drain of the
external MOSFET. If a silicon diode is used, care should be taken to ensure that the total voltage appearing on the Drain of the external
MOSFET, including supply ripple, does not exceed the specified maximum value.
*A suitable Schottky diode would be PDS3100 (Diodes Inc).

Output Capacitor
An output capacitor may be required to limit interference or for specific EMC purposes. For boost and buck-boost regulators, the output
capacitor provides energy to the load when the freewheeling diode is reverse biased during the first switching subinterval. An output capacitor in
a buck topology will simply reduce the LED current ripple below the inductor current ripple. In other words, this capacitor changes the current
waveform through the LED(s) from a triangular ramp to a more sinusoidal version without altering the mean current value.

In all cases, the output capacitor is chosen to provide a desired current ripple of the LED current (usually recommended to be less than 40% of
the average LED current).

Buck:
ΔIL − PP
C OUTPUT =
8 x fSW x rLED x ΔILED − PP

Boost and Buck-Boost

D x ILED − PP
C OUTPUT =
f SW x rLED x Δ ILED − PP

where:
• ΔIL-PP is the ripple of the inductor current, usually ± 20% of the average sensed current
• ΔILED-PP is the ripple of the LED current, it should be <40% of the LEDs average current
• fsw is the switching frequency (From graphs and calculator)
• rLED is the dynamic resistance of the LEDs string (n times the dynamic resistance of the single LED from the
datasheet of the LED manufacturer).
The output capacitor should be chosen to account for derating due to temperature and operating voltage. It must also have the necessary RMS
current rating. The minimum RMS current for the output capacitor is calculated as follows:

Buck
ILED − PP
ICOUTPUT − RMS =
12

Boost and Buck-Boost

DMAX
ICOUTPUT − RMS = ILED
1 − DMAX

Ceramic capacitors with X7R dielectric are the best choice due to their high ripple current rating, long lifetime, and performance over the voltage
and temperature ranges.

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Application Information (cont.)

Input Capacitor
The input capacitor can be calculated knowing the input voltage ripple ΔVIN-PP as follows:

Buck
D x(1 − D)x ILED
CIN = Use D = 0.5 as worst case
fSW x ΔVIN − PP

Boost
ΔIL − PP
CIN =
8 x fSW x ΔVIN − PP

Buck-Boost
D x ILED
C IN = Use D = DMAX as worst case
fSW x Δ VIN − PP

The minimum RMS current for the output capacitor is calculated as follows:

Buck
ICIN − RMS = ILED x Dx (1 − D ) use D = 0.5 as worst case

Boost
IL − PP
ICIN − RMS =
12

Buck-Boost
D
ICIN − RMS = ILED x Use D = DMAX as worst case
(1 − D)

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Application Information (cont.)

PWM Output Current Control & Dimming
The ZXLD1370 has a dedicated PWM dimming input that allows a wide dimming frequency range from 100Hz to 1kHz with up to 1000:1
resolution; however higher dimming frequencies can be used – at the expense of dimming dynamic range and accuracy.

Typically, for a PWM frequency of 1kHz, the error on the current linearity is lower than 5%; in particular the accuracy is better than 1% for PWM
from 5% to 100%. This is shown in the graph below:

Buck mode - L=33uH - Rs = 150mΩ - PWM @ 1kHz

1500.00 10%
9%
1250.00
8%
7%
LED current [mA]

1000.00
6%
750.00 5%

Error
4%
500.00
3%
2%
250.00
1%
0.00 0%
0 10 20 30 40 50 60 70 80 90 100
PWM

PWM @ 1kHz Error

Figure 28 LED Current Linearity and Accuracy with PWM Dimming at 1kHz

For a PWM frequency of 100Hz, the error on the current linearity is lower than 2.5%; it becomes negligible for PWM greater than 5%. This is
shown in the graph below:

Buck mode - L=33uH - Rs = 150mΩ - PWM @ 100Hz

1500.00 10%
9%
1250.00
8%
7%
LED current [mA]

1000.00
6%
750.00 5%
Error

4%
500.00
3%
2%
250.00
1%
0.00 0%
0 10 20 30 40 50 60 70 80 90 100
PWM

PWM @ 100Hz Error

Figure 29 LED Current Linearity and Accuracy with PWM Dimming at 100Hz

The PWM pin is designed to be driven by both 3.3V and 5V logic levels. It can be driven also by an open drain/collector transistor. In this case
the designer can either use the internal pull-up network or an external pull-up network in order to speed-up PWM transitions, as shown in the
Boost/ Buck-Boost section.

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Application Information (cont.)

2µs
Gate < 10 ms

0V

Figure 30. PWM Dimming from Open Collector Switch

PWM

< 10 ms

0V
2µs

Figure 31 PWM Dimming from MCU Figure 32 PWM Dimming Minimum and Maximum Pulse

LED current can be adjusted digitally, by applying a low frequency PWM logic signal to the PWM pin to turn the controller on and off. This
will produce an average output current proportional to the duty cycle of the control signal. During PWM operation, the device remains
powered up and only the output switch is gated by the control signal.

The PWM signal can achieve very high LED current resolution. In fact, dimming down from 100% to 0.1% at 500Hz, a minimum pulse width
of 2µs can be achieved resulting in very high resolution and accuracy. While the maximum recommended pulse is for the PWM signal is
10ms (equivalent to 100Hz) See Figure 32.

The ultimate PWM dimming ratio will be determined by the

switching frequency as the minimum PWM pulse width is
determined by resolving at least 1 switching cycle. The figure to the
right the switching waveforms for a low duty cycle PWM dimming.

As can be seen, when the LED current restarts (blue waveform) it

has to start all the way from zero to the peak level set by
VSENSE/RS*1.15. So the first pulse is always longer than the
nominal switching frequency would imply.

The PWM pin can be used to put the device into standby. Taking
the PWM pin low (<0.4V) for more than 25ms (typically 15ms) the
device will enter its standby state and most of the internal circuitry
is switched off and residual quiescent current will be typically 90µA.
In particular, the Status pin will go down to GND while the FLAG
and REF pins will stay at their nominal values.

Figure 33 Standby State from PWM signal

When the device restarts from standby mode, a “start-up” time must be allowed for before the device resume full LED current regulation.

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Application Information (cont.)

Thermal Control of LED Current
For thermal control of the LEDs, the ZXLD1370 monitors the voltage on the TADJ pin and reduces output current if the voltage on this pin falls
below 625mV. An external NTC thermistor and resistor can therefore be connected as shown below to set the voltage on the TADJ pin to
625mV at the required temperature threshold. This will give 100% LED current below the threshold temperature and a falling current above it as
shown in the graph. The temperature threshold can be altered by adjusting the value of Rth and/or the thermistor to suit the requirements of the
chosen LED.

The Thermal Control feature can be disabled by connecting TADJ directly to REF.

Here is a simple procedure to design the thermal feedback circuit:

1) Select the temperature threshold Tthreshold at which the current must start to decrease
2) Select the Thermistor TH1 (both resistive value at +25°C and beta)
3) Select the value of the resistor Rth as Rth = TH at Tthreshold

Figure 34 Thermal Feedback Network

The thermistor resistance, RT, at a temperature of T degrees Kelvin is given by

⎛1 1 ⎞
B⎜ − ⎟
⎜T T ⎟
⎝ R ⎠
RT = RR e
Where
RR is the thermistor resistance at the reference temperature, TR
TR is the reference temperature, in Kelvin, normally 273 + 25 = 298K (+25°C)
B is the “beta” value of the thermistor.

For example,
1) Temperature threshold Tthreshold = 273 + 70 = 343K (+70°C)
2) TH1 = 10kΩ at +25°C and B = 3900 Æ RT = 1.8kΩ @ +70°C
3) Rth = RT at Tthreshold = 1.8kΩ

Over-Temperature Shutdown
The ZXLD1370 incorporates an over-temperature shutdown circuit to protect against damage caused by excessive die temperature. A warning
signal is generated on the STATUS output when die temperature exceeds +125°C nominal and the output is disabled when die temperature
exceeds +150°C nominal. Normal operation resumes when the device cools back down to +125°C.

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Application Information (cont.)

FLAG/STATUS Outputs
The FLAG/STATUS outputs provide a warning of extreme operating or fault conditions. FLAG is an open-drain logic output, which is normally
off, but switches low to indicate that a warning, or fault condition exists. STATUS is a DAC output, which is normally high (4.5V), but switches to
a lower voltage to indicate the nature of the warning/fault.

Conditions monitored, the method of detection and the nominal STATUS output voltage are given in the following table:

Table 2
Severity Monitored
Warning/Fault Condition FLAG Nominal STATUS Voltage
(Note 17) Parameters
Normal operation H 4.5
1 VAUX<5.6V L 4.5
Supply under-voltage
2 VIN<5.6V L 3.6
Output current out of regulation VSHP outside normal voltage
2 L 3.6
(Note 18) range
Driver stalled with switch ‘on’, or ‘off’
2 tON, or tOFF>100µs L 3.6
(Note 19)
Device temperature above maximum
3 TJ>+125°C L 1.8
recommended operating value
Sense resistor current IRS above
4 VSENSE>0.32V L 0.9
specified maximum
Notes: 17. Severity 1 denotes lowest severity.
18. This warning will be indicated if the output power demand is higher than the available input power; the loop may not be able to maintain regulation.
19. This warning will be indicated if the gate pin stays at the same level for greater than 100µs (e.g. the output transistor cannot pass enough current
to reach the upper switching threshold).
FLAG VOLTAGE

VREF

0V

4.5V

Normal VAUX
Operations UVLO
3.6V

- VIN UVLO
- STALL
STATUS VOLTAGE

- OUT of REG
2.7V

1.8V

Over
Temperature
0.9V

Over
Current
0A
0 1 2 3 4
SEVERITY

Figure 35 Status Levels

In the event of more than one fault/warning condition occurring, the higher severity condition will take precedence. E.g. ‘Excessive coil current’
and ‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin.

If VADJ>1.7V, VSENSE may be greater than the excess coil current threshold in normal operation and an error will be reported. Hence, STATUS
and FLAG are only guaranteed for VADJ<=VREF.

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Application Information (cont.)

Diagnostic signals should be ignored during the device start –

VR EF
up for 100μs. The device start up sequence will be initiated

FLAG
both during the first power on of the device or after the PWM
0V
signal is kept low for more than 15ms, initiating the standby
state of the device. O ut of

STATUS
r e g u la t io n

In particular, during the first 100μs the diagnostic is signaling O ver

C u rre n t

an over-current then an out-of-regulation status. These two

events are due to the charging of the inductor and are not true 2 2 5 m V /R 1

fault conditions.

Coil current
0A
100us

Figure 36 Diagnostic During Start-up

Boosting VAUX Supply Voltage in Boost and Buck-Boost Mode

When the input voltage is lower than 8V, the gate voltage will also be lower 8V. This means that depending on the characteristics of the external
MOSFET, the gate voltage may not be enough to fully enhance the power MOSFET. This boosting technique is particularly important when the
output MOSFET is operating at full current, since the boost circuit allows the gate voltage to be higher than 12V. This guarantees that the
MOSFET is fully enhanced reducing both the power dissipation and the risk of thermal runaway of the MOSFET itself. An extra diode D2 and
decoupling capacitor C3 can be used, as shown below in figure 37, to generate a boosted voltage at VAUX when the input supply voltage at VIN is
below 8V. This enables the device to operate with full output current when VIN is at the minimum value of 6V. In the case of a low voltage
threshold MOSFET, the bootstrap circuit is generally not required.

Figure 37 Bootstrap Circuit for Boost and Buck-Boost Low Voltage Operations

The resistor R2 can be used to limit the current in the bootstrap circuit in order to reduce the impact of the circuit itself on the LED accuracy. The
impact on the LED current is usually a decrease of maximum 5% compared to the nominal current value set by the sense resistor.

The Zener diode D3 is used to limit the voltage on the VAUX pin to less than 60V.

Due to the increased number of components and the loss of current accuracy, the bootstrap circuit is recommended only when the system has to
operate continuously in conditions of low input voltage (between 6 and 8V) and high load current. Other circumstances such as low input voltage
at low load current, or transient low input voltage at high current should be evaluated keeping account of the external MOSFET power
dissipation.

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Application Information (cont.)

Over-Voltage Protection
The ZXLD1370 is inherently protected against open-circuit load when used in Buck configuration. However care has to be taken with open-
circuit load conditions in Buck-Boost or Boost configurations. This is because in these configurations there is no internal open-circuit protection
mechanism for the external MOSFET. In this case an Over-Voltage-Protection (OVP) network should be provided externally to the MOSFET to
avoid damage due to open circuit conditions. This is shown in figure 38 below, highlighted in the dotted blue box.

Figure 38 OVP circuit

The zener voltage is determined according to: Vz = VLEDMAX +10% where VLEDMAX is maximum LED chain voltage.

If the LEDA voltage exceeds VZ the gate of MOSFET Q2 will rise turning Q2 on. This will pull the PWM pin low and switch off Q1 until the voltage
on the drain of Q1 falls below VZ. If the voltage at LEDA remains above VZ for longer than 20ms then the ZXLD1370 will enter into a shutdown
state.

Care should be taken such that the maximum gate voltage of the Q2 MOSFET is not exceeded.

Take care of the max voltage drop on the Q2 MOSFET gate.

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Application Information (cont.)

PCB Layout Considerations
PCB layout is a fundamental activity to get the most of the device in all configurations. In the following section it is possible to find some
important insight to design with the ZXLD1370 both in Buck and Buck-Boost/Boost configurations.

SHP Pin

Inductor, Switch and

Freewheeling Diode

VIN / VAUX
Decoupling

Figure 39 Circuit Layout

Here are some considerations useful for the PCB layout:

• In order to avoid ringing due to stray inductances, the inductor L1, the anode of D1 and the drain of Q1 should be placed as close
together as possible.
• The shaping capacitor C1 is fundamental for the stability of the control loop. To this end it should be placed no more than 5mm from
the SHP pin.
• Input voltage pins, VIN and VAUX, need to be decoupled. It is recommended to use two ceramic capacitors of 2.2uF, X7R, 100V (C3
and C4). In addition to these capacitors, it is suggested to add two ceramic capacitors of 1uF, X7R, 100V each (C2, C8), as well as a
further decoupling capacitor of 100nF close to the VIN/VAUX pins (C9). VIN and VAUX pins can be short-circuited when the device is
used in buck mode, or can be driven from a separate supply.

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Application Information (cont.)

Application Examples
Example 1: 2.8A Buck LED Driver
In this application example, the ZXLD1370 is connected as a buck LED driver. The schematic and parts list are shown below. The LED driver is
able to deliver 2.8A of LED current with an input voltage range of 8V to 24V. In order to achieve high efficiency at high LED current, a Super
Barrier Rectifier (SBR) with a low forward voltage is used as the free wheeling rectifier.

This LED driver is suitable for applications which require high LED current such as LED projector, automatic LED lighting etc.

Figure 40 Application Circuit: 2.8A Buck LED Driver

Table 3: Bill of Material

Ref No. Value Part No. Manufacturer
U1 60V LED driver ZXLD1370 Diodes Inc
Q1 60V MOSFET ZXMN6A09K Diodes Inc
D1 45V 10A SBR SBR10U45SP5 Diodes Inc
L1 33µH 4.2A 744770933 Wurth Electronik
C1 100pF 50V SMD 0805/0603 Generic
C2 1uF 50V X7R SMD1206 Generic
C3 C4 C5 4.7µF 50V X7R SMD1210 Generic
R1 R2 R3 300mΩ 1% SMD1206 Generic
R4 400mΩ 1% SMD1206 Generic
R5 0Ω SMD 0805/0603 Generic

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Application Information (cont.)

Typical Performance
Efficiency vs Input Voltage LED Current vs Input Voltage
100% 3000

90%
2500
80%

70%
2000
Efficiency (%)

LED Current (mA)

60%

50%
1500
40%

30% 1 LED 1000

20% 2 LED
10% 500

0%
10 12 14 16 18 20 22 24 0
10 12 14 16 18 20 22 24
Input Voltage (V)
Input Voltage (V)
Figure 41 Efficiency Figure 42 Line Regulation

Example 2: 400mA Boost LED Driver

In this application example, the ZXLD1370 is connected as a boost LED driver. The schematic and parts list are shown below. The LED driver
is able to deliver 400mA of LED current into 12 high-brightness LEDs with an input voltage range of 16V to 32V.

The overall high efficiency of 92%+ makes it ideal for applications such as solar LED street lighting and general LED illuminations.

Figure 43 Application Circuit - 400mA Boost LED Driver

Table4. Bill of Material

Ref No. Value Part No. Manufacturer
U1 60V LED driver ZXLD1370 Diodes Inc
Q1 60V MOSFET ZXMN6A25G Diodes Inc
Q2 60V MOSFET 2N7002A Diodes Inc
D1 100V 3A Schottky PDS3100-13 Diodes Inc
Z1 47V 410mW Zener BZT52C47 Diodes Inc
L1 68µH 2.1A 744771168 Wurth Electronik
C1 100pF 50V SMD 0805/0603 Generic
C3 C9 4.7µF 50V X7R SMD1210 Generic
C2 1µF 50V X7R SMD1206 Generic
R1 R2 560mΩ 1% SMD1206 Generic
R9 R10 33kΩ 1% SMD 0805/0603 Generic
R12 0Ω SMD 0805/0603 Generic
R15 2.7kΩ SMD 0805/0603 Generic

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400mA Boost LED Driver Typical Performance
Efficiency vs Input Voltage LED Current vs Input Voltage
100%
450
90%
400
80%
350
70%
300
60%
Efficiency

LED Current
50% 250

40% 200

30% 150

20% 100

10% 50

0% 0
16 18 20 22 24 26 28 30 32 16 18 20 22 24 26 28 30 32

Input Voltage Input Voltage

Figure 44 Efficiency Figure 45 Line Regulation

Example 3: 700mA Buck-Boost LED Driver

In this application example, the ZXLD1370 is connected as a buck-boost LED driver. The schematic and parts list are shown below. The LED
driver is able to deliver 700mA of LED current into 4 high-brightness LEDs with an input voltage range of 7V to 20V.

Since the Buck-boost LED driver handles an input voltage range from below and above the total LED voltage, the versatile input voltage range
make it ideal for automotive lighting applications.

Figure 46 Application Circuit - 700mA Buck-Boost LED Driver

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Table 5: Bill of Material
Ref No. Value Part No. Manufacturer
U1 60V LED driver ZXLD1370 Diodes Inc
Q1 60V MOSFET ZXMN6A25G Diodes Inc
Q2 60V MOSFET 2N7002A Diodes Inc
D1 100V 5A Schottky PDS5100-13 Diodes Inc
Z1 47V 410mW Zener BZT52C47 Diodes Inc
L1 22µH 2.1A 744771122 Wurth Electronik
C1 100pF 50V SMD 0805/0603 Generic
C3 C9 4.7µF 50V X7R SMD1210 Generic
C2 1µF 50V X7R SMD1206 Generic
R1 R2 R3 300mΩ 1% SMD1206 Generic
R9 33kΩ 1% SMD 0805/0603 Generic
R10 15kΩ 1% SMD 0805/0603 Generic
R12 0Ω SMD 0805/0603 Generic
R15 2.7kΩ SMD 0805/0603 Generic

700mA Buck-Boost LED Driver Typical Performance

Efficiency vs Input Voltage LED Current vs Input Voltage

100%
800
90%

80% 700

70% 600

60%
500
LED Current
Efficiency

50%
400
40%
300
30%
200
20%

10% 100

0% 0
7 8 9 10 11 12 13 14 15 16 17 18 19 20 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Input Voltage Input Voltage

Figure 47 Efficiency Figure 48 Line Regulation

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Ordering Information

Part Reel
Part Number Packaging Status Tape Width Reel Size
Marking Quantity
ZXLD1370EST16TC TSSOP-16EP Active ZXLD 2500 16mm 13”
1370
ZXLD1370QESTTC TSSOP-16EP Active YYWW 2500 16mm 13”
Where YY is last two digits of year and WW is two digit week number

Package Outline Dimensions (All dimensions in mm.)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.

D X TSSOP-16EP
e Dim Min Max Typ
A - 1.20 -
A1 0.025 0.100 -
A2 0.80 1.05 0.90
b 0.19 0.30 -
c 0.09 0.20 -
E1 E Y D 4.90 5.10 5.00
E 6.20 6.60 6.40
E1 4.30 4.50 4.40
e 0.65 BSC
PIN 1 L 0.45 0.75 0.60
ID MARK
L1 1.0 REF
L2 0.65 BSC
0.25
X - - 2.997
A2 Gauge Plane Y - - 2.997
θ1 0° 8° -
All Dimensions in mm
A
b θ1
Seating Plane

A1 L
DETAIL
L1

Suggested Pad Layout

Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.

X2

Value
Y (16x) Dimensions
(in mm)
C 0.650
X 0.450
X1 3.290
Y3 Y1 Y2 X2 5.000
X1 Y 1.450
Y1 3.290
Y2 4.450
Y3 7.350

C
X (16x)

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IMPORTANT NOTICE

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Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
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Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
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