DS36C200I Dual High Speed Bi-Directional Differential Transceiver

February 2005

DS36C200I
Dual High Speed Bi-Directional Differential Transceiver
General Description Features
The DS36C200I is a dual transceiver device optimized for n Industrial Temperature Range -40˚C to +85˚C
high data rate and low power applications. This device pro- n Optimized for DSS to DVHS interface link
vides a single chip solution for a dual high speed bi- n Compatible IEEE 1394 signaling voltage levels
directional interface. Also, both control pins may be routed n Operates above 100 Mbps
together for single bit control of datastreams. Both control n Bi-directional transceivers
pins are adjacent to each other for ease of routing them
n 14-lead SOIC and TSSOP packages
together. The DS36C200I is compatible with IEEE 1394
n Ultra low power dissipation
physical layer and may be used as an economical solution
with some considerations. Please reference the application n ± 100 mV receiver sensitivity
information on 1394 for more information. The device is in a n Low differential output swing typical 210 mV
14-lead small outline package. The differential driver outputs n High impedance during power off
provides low EMI with its low output swings typically 210 mV.
The receiver offers ± 100 mV threshold sensitivity, in addition
to common-mode noise protection.

Connection Diagrams

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Note: * denotes active LOW pin Note: * denotes active LOW pin
Order Number DS36C200IMA Order Number DS36C200IMT
See NS Package Number M14A See NS Package Number MTC14

© 2005 National Semiconductor Corporation DS200776 www.national.com

DS36C200I
Functional Diagram

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 DS36C200I
Absolute Maximum Ratings (Note 1) Lead Temperature Range
If Military/Aerospace specified devices are required, (Soldering, 4 sec.) +260˚C
please contact the National Semiconductor Sales Office/ ESD Rating (Note 4)
Distributors for availability and specifications.
(HBM, 1.5 kΩ, 100 pF) ≥ 3.5 kV
Supply Voltage (VCC) −0.3V to +6V (EIAJ, 0 Ω, 200 pF) ≥ 300V
Enable Input Voltage
(DE, RE*) −0.3V to (VCC + 0.3V)
Recommended Operating
Voltage (DI/RO) −0.3V to +5.9V
Voltage (DO/RI ± ) −0.3V to +5.9V
Conditions
Package Thermal Resistance Ratings (Note 8) Min Typ Max Units
M14A (θJ-A) 105˚C/W Supply Voltage (VCC) +4.5 +5.0 +5.5 V
M14A (θJ-C) 25˚C/W Receiver Input Voltage 0 2.4 V
MTC14 (θJ-A) 135˚C/W Operating Free Air
MTC14 (θJ-C) 35˚C/W Temperature (TA) -40 25 +85 ˚C
Storage Temperature Range −65˚C to +150˚C

Electrical Characteristics (Notes 2, 3, 7)

Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol Parameter Conditions Pin Min Typ Max Units
DIFFERENTIAL DRIVER CHARACTERISTICS (RE* = VCC)
VOD Output Differential Voltage RL = 55Ω, (Figure 1) DO+, 172 210 285 mV
∆VOD VOD Magnitude Change DO− 0 4 35 mV
VOH Output High Voltage 1.36 V
VOL Output Low Voltage 1.15 V
VOS Offset Voltage 1.0 1.25 1.6 V
∆VOS Offset Magnitude Change 0 5 25 mV
IOZD TRI-STATE Leakage VOUT = VCC or GND −10 ±1 +10 µA
IOXD Power-Off Leakage VOUT = 5.5V or GND, VCC = 0V −10 ±1 +10 µA
IOSD Output Short Circuit Current VOUT = 0V −4 −9 mA
DIFFERENTIAL RECEIVER CHARACTERISTICS (DE = GND)
VTH Input Threshold High VCM = 0V to 2.3V RI+, +100 mV
VTL Input Threshold Low RI− −100 mV
IIN Input Current VIN = +2.4V or 0V −10 ±1 +10 µA
VOH Output High Voltage IOH = −400 µA RO 3.8 4.9 V
Inputs Open 3.8 4.9 V
Inputs Terminated, Rt = 55Ω 3.8 4.9 V
Inputs Shorted, VID = 0V 4.9 V
VOL Output Low Voltage IOL = 2.0 mA, VID = −200 mV 0.1 0.4 V
IOSR Output Short Circuit Current VOUT = 0V −15 −60 −100 mA
DEVICE CHARACTERISTICS
VIH Input High Voltage DI, 2.0 VCC V
VIL Input Low Voltage DE GND 0.8 V
IIH Input High Current VIN = VCC or 2.4V RE* ±1 ± 10 µA
IIL Input Low Current VIN = GND or 0.4V ±1 ± 10 µA
VCL Input Clamp Voltage ICL = −18 mA −1.5 −0.8 V
ICCD Power Supply Current No Load, DE = RE* = VCC VCC 3 7 mA
RL = 55Ω, DE = RE* = VCC 11 17 mA
ICCR DE = RE* = 0V 6 10 mA

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and VID.
Note 3: All typicals are given for VCC = +5.0V and TA = +25˚C.
Note 4: ESD Rating: HBM (1.5 kΩ, 100 pF) ≥ 3.5 kV

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DS36C200I
Electrical Characteristics (Notes 2, 3, 7) (Continued)
EIAJ (0Ω, 200 pF) ≥ 300V
Note 5: CL includes probe and fixture capacitance.
Note 6: Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr ≤ 1 ns, tf ≤ 1 ns (0%–100%).
Note 7: The DS36C200I is a current mode device and will meet the datasheet specifications only with a resistive load applied to the driver outputs.
Note 8: Package Thermal Resistance Ratings are for 2-Layer, 2 ounce Cu, FR-14, printed circuit board, tested per JEDEC.

Switching Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 5, 6)
Symbol Parameter Conditions Min Typ Max Units
DIFFERENTIAL DRIVER CHARACTERISTICS
tPHLD Differential Propagation Delay High to Low RL = 55Ω, CL = 10 pF 1.0 2.5 5.5 ns
tPLHD Differential Propagation Delay Low to High (Figure 2 and Figure 3) 1.0 2.6 5.5 ns
tSKD Differential Skew |tPHLD – tPLHD| 0 0.1 2 ns
tTLH Transition Time Low to High 0 0.5 2 ns
tTHL Transition Time High to Low 0 0.5 2 ns
tPHZ Disable Time High to Z RL = 55Ω 0.3 5 20 ns
tPLZ Disable Time Low to Z (Figure 4 and Figure 5) 0.3 5 20 ns
tPZH Enable Time Z to High 0.3 10 30 ns
tPZL Enable Time Z to Low 0.3 10 30 ns
DIFFERENTIAL RECEIVER CHARACTERISTICS
tPHLD Differential Propagation Delay High to Low CL = 10 pF, VID = 200 mV 1.5 5 10 ns
tPLHD Differential Propagation Delay Low to High (Figure 6 and Figure 7) 1.5 4.6 10 ns
tSKD Differential Skew |tPHLD – tPLHD| 0 0.4 3 ns
tr Rise Time 0 1.5 7 ns
tf Fall Time 0 1.5 7 ns
tPHZ Disable Time High to Z CL = 10 pF 1 5 20 ns
tPLZ Disable Time Low to Z (Figure 8 and Figure 9) 1 5 20 ns
tPZH Enable Time Z to High 0.3 10 30 ns
tPZL Enable Time Z to Low 0.3 10 30 ns

Parameter Measurement Information

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FIGURE 1. Differential Driver DC Test Circuit

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FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit

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 DS36C200I
Parameter Measurement Information (Continued)

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FIGURE 3. Differential Driver Propagation Delay and Transition Time Waveforms

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FIGURE 4. Driver TRI-STATE Delay Test Circuit

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FIGURE 5. Driver TRI-STATE Delay Waveforms

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FIGURE 6. Receiver Propagation Delay and Transition Time Test Circuit

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DS36C200I
Parameter Measurement Information (Continued)

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FIGURE 7. Receiver Propagation Delay and Transition Time Waveforms

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FIGURE 8. Receiver TRI-STATE Delay Test Circuit

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FIGURE 9. Receiver TRI-STATE Delay Waveforms

Application Information
TRUTH TABLES throughout the rest of this document. Also note that a logic
The DS36C200I has two enable pins DE and RE*, however, low on the DE/RE* bit corresponds to a logic low on both the
the driver and receiver should never be enabled simulta- DE pin and the RE* pin. Similarly, a logic high on the DE/RE*
neously. Enabling both could cause multiple channel conten- bit corresponds to a logic high on both the DE pin and the
tion between the receiver output and the driving logic. It is RE* pin.
recommended to route the enables together on the PC
board. This will allow a single bit [DE/RE*] to control the chip. Receive Mode
This DE/RE* bit toggles the DS36C200I between Receive
mode and Transmit mode. When the bit is asserted HIGH Input(s) Input/Output
the device is in Transmit mode. When the bit is asserted DE RE* [RI+] − [RI−] RO
LOW the device is in Receive mode. The mode determines L L > +100 mV H
the function of the I/O pins: DI/RO, DO/RI+, and
DO/RI−.Please note that some of the pins have been iden- L L < −100 mV L
tified by its function in the corresponding mode in the three L L 100 mV > & > −100 mV X
tables below. For example, in Transmit mode the DO/RI+ pin L H X Z
is identified as DO+. This was done for clarity in the tables
only and should not be confused with the pin identification

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 DS36C200I
Application Information (Continued) Input(s) Input/Output

Transmit Mode DE RE* DI DO+ DO−

L H X Z Z
Input(s) Input/Output
H = Logic high level
DE RE* DI DO+ DO− L = Logic low level
X = Indeterminate state
H H L L H Z = High impedance state
H H H H L
H H 2 > & > 0.8 X X

TABLE 1. Device Pin Descriptions

Pin # Pin # Name
Mode Description
M14A Package MTC14 Package (In mode only)
3 3 DE Transmit Driver Enable: When asserted low driver is
disabled. And when asserted high driver is
enabled.
1, 7 1, 7 DI1, DI2 TTL/CMOS driver input pins
10, 13 11, 14 DO2+, DO1+ Non-inverting driver output pin
11, 12 12, 13 DO2−, DO1– Inverting driver output pin
4 4 RE* Receive Receiver Enable: When asserted low receiver is
enabled. And when asserted high receiver is
disabled.
1, 7 1, 7 RO1, RO2 Receiver output pin
10, 13 11,14 RI2+, RI1+ Positive receiver input pin
11, 12 12, 13 RI2−, RI1– Negative receiver input pin
5 5 Gnd Transmit and Ground pin
2 2 VCC Receive Positive power supply pin, +5V ± 10%
6, 8, 9, 14 6, 8, 9, 10 NC No Connect

IEEE 1394
The DS36C200I drives and receives IEEE 1394 physical The differential line driver is a balanced current source de-
layer signal levels. The current mode driver is capable of sign. A current mode driver, generally speaking has a high
driving a 55Ω load with VOD between 172 mV and 285 mV. output impedance and supplies a constant current for a
The DS36C200I is not designed to work with a link layer range of loads (a voltage mode driver on the other hand
controller IC requiring full 1394 physical layer compliancy to supplies a constant voltage for a range of loads). Current is
the standard. No clock generator, no arbitration, and no switched through the load in one direction to produce a logic
encode/decode logic is provided with this device. For a 1394 state and in the other direction to produce the other logic
link where speed sensing, bus arbitration, and other func- state. The typical output current is mere 3.8 mA, a minimum
tions are not required, a controller and the DS36C200I will of 3.1 mA, and a maximum of 5.2 mA. The current mode
provide a cost effective, high speed dedicated link. This is requires that a resistive termination be employed to termi-
shown in Figure 10. In applications that require fully compli- nate the signal and to complete the loop as shown in Figure
ant 1394 protocol, a link layer controller and physical layer 11. The 3.8 mA loop current will develop a differential voltage
controller will be required as shown in Figure 10. The physi- of 210 mV across the 55Ω termination resistor which the
cal layer controller supports up to three DS36C200I devices receiver detects with a 110 mV minimum differential noise
(not shown). margin neglecting resistive line losses (driven signal minus
The DS36C200I drivers are current mode drivers and in- receiver threshold (210 mV – 100 mV = 110 mV)). The signal
tended to work with two 110Ω termination resistors in parallel is centered around +1.2V (Driver Offset, VOS) with respect to
with each other. The termination resistors should match the ground as shown in Figure 7.
characteristic impedance of the transmission media. The The current mode driver provides substantial benefits over
drivers are current mode devices therefore the resistors are voltage mode drivers, such as an RS-422 driver. Its quies-
required. Both resistors are required for half duplex opera- cent current remains relatively flat versus switching fre-
tion and should be placed as close to the DO/RI+ and quency. Whereas the RS-422 voltage mode driver increases
DO/RI− pins as possible at opposite ends of the bus. How- exponentially in most case between 20 MHz–50 MHz. This
ever, if your application only requires simplex operation, only is due to the overlap current that flows between the rails of
one termination resistor is required. In addition, note the the device when the internal gates switch. Whereas the
voltage levels will vary from those in the datasheet due to current mode driver switches a fixed current between its
different loading. Also, AC or unterminated configurations output without any substantial overlap current. This is similar
are not used with this device. Multiple node configurations to some ECL and PECL devices, but without the heavy static
are possible as long as transmission line effects are taken ICC requirements of the ECL/PECL designs. LVDS requires
into account. Discontinuities are caused by mid-bus stubs, > 80% less current than similar PECL devices. AC specifi-
connectors, and devices that affect signal integrity. cations for the driver are a tenfold improvement over other

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DS36C200I
Application Information (Continued) the cable picks up more than 10mV of differential noise,
the receiver may see the noise as a valid signal and
existing RS-422 drivers. switch. To insure that any noise is seen as common-
Fail-safe Feature: mode and not differential, a balanced interconnect
should be used. Twisted pair cable will offer better bal-
The LVDS receiver is a high gain, high speed device that
ance than flat ribbon cable.
amplifies a small differential signal (20mV) to CMOS logic
levels. Due to the high gain and tight threshold of the re- 3. Shorted Inputs. If a fault condition occurs that shorts
ceiver, care should be taken to prevent noise from appearing the receiver inputs together, thus resulting in a 0V differ-
as a valid signal. ential input voltage, the receiver output will remain in a
HIGH state. Shorted input fail-safe is not supported
The receiver’s internal fail-safe circuitry is designed to
across the common-mode range of the device (GND to
source/sink a small amount of current, providing fail-safe
2.4V). It is only supported with inputs shorted and no
protection (a stable known state of HIGH output voltage) for
external common-mode voltage applied.
floating, terminated or shorted receiver inputs.
If there is more than 10mV of differential noise, the receiver
1. Open Input Pins. The DS36C200I is a dual transceiver
may switch or oscillate. If this condition can happen in your
device, and if an application requires only one receiver,
application, you may wish to add external fail-safe resistors
the unused channel inputs should be left OPEN. Do not
to create a larger noise margin. External lower value pull up
tie the receiver inputs to ground or any other voltages.
and pull down resistors (for a stronger bias) may be used to
The input is biased by internal high value pull up or pull
boost fail-safe in the presence of higher noise levels. The
down resistors to set the output to a HIGH state. This
pull up and pull down resistors should be in the 5kΩ to 15kΩ
internal circuitry will guarantee a HIGH, stable output
range to minimize loading and waveform distortion to the
state for open inputs.
driver. The common-mode bias point should be set to ap-
2. Terminated Input. If the driver is disconnected (cable proximately 1.2V (less than 1.75V) to be compatible with the
unplugged), or if the driver is in a TRI-STATE or power- internal circuitry.
off condition, the receiver output will again be in a HIGH
Additional information on fail-safe biasing of LVDS devices
state, even with the end of the cable 100Ω termination
may be found in AN-1194.
resistor across the input pins. The unplugged cable can
become a floating antenna which can pick up noise. If

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FIGURE 10. (A) Dedicated IEEE 1394 Link

(B) Full IEEE 1394 Compliant Link

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 DS36C200I
Application Information (Continued)

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FIGURE 11. Typical in Home Application

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FIGURE 12. Typical Interface Connection (Note 7)

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DS36C200I
Physical Dimensions inches (millimeters)
unless otherwise noted

14-Lead (0.150" Wide) Molded Small Outline Package, JEDEC

Order Number DS36C200IMA
NS Package Number M14A

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 DS36C200I Dual High Speed Bi-Directional Differential Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Molded TSSOP Package, JEDEC

Order Number DS36C200IMT
NS Package Number MTC14

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the right at any time without notice to change said circuitry and specifications.
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This file is the datasheet for the following electronic components:

DS36C200I - http://www.ti.com/product/ds36c200i?HQS=TI-null-null-dscatalog-df-pf-null-wwe

DS36C200IMA - http://www.ti.com/product/ds36c200ima?HQS=TI-null-null-dscatalog-df-pf-null-wwe

DS36C200IMT - http://www.ti.com/product/ds36c200imt?HQS=TI-null-null-dscatalog-df-pf-null-wwe