Syed Irvin, 301475527

Gordon Huynh, 301452334

Royce Mancilla, 301477750

ENSC 225 (2023-Summer) Laboratory #4 Characterization of MOSFETS and MOS

amplifier

Aug 14, 2023

Work Distribution: Work done in the lab was split pretty evenly as all members were present
whenever we did want to work on the lab. Reporting for the experiments were all split evenly
across the members. Calculations presented in the report were done by all members. Editing
and formatting the report was done by all members.
 Experiment 2 - SPA scans

Experiment 3 - ID versus VGS Characteristics for the determination of Vt and K

Abstract + Introduction
The aim of this experiment is to determine Vt and K corresponding to each substrate voltage of
the NMOS and PMOS using their square root of ID vs VGS graphs. NOTE: the text file containing
the PMOS - ID vs VGS values only had a fraction of the values it was supposed to have. Amin
told us to just use the data that was available but to make a note of it in the report so here it is.

Results + Discussion
Calculation was only shown for NMOS with 0V Vsub since the others all have the same
calculation. We should keep in mind that the value of kn and Vt for PMOS won’t be
accurate as there is data missing. A graph of all the values is tabulated below:
VSUB (V) kn (µA/V2) Vt (V)

0 (NMOS) 531.4 1.012

-1 (NMOS) 619.5 2.080

-2 (NMOS) 655.2 2.884

-3 (NMOS) 684.5 3.557

0 (PMOS) 10082 -0.5718

 Experiment 4 - ID versus VDS Characteristics for the determination of ro

Abstract + Introduction
The determination of the early voltage of a MOSFET, and effectively ro, has the same
procedure as the determination of the early voltage of a BJT. Using the ID vs VDS graphs of the
PMOS and NMOS, early voltage can be determined when y = 0 or the x-intercept of the line,
and (1/ro) is the slope of the same line. Calculations are shown below.

Results + Discussion

Experiment 5 - Experimental determination of Vt and K

Abstract + Introduction
Our goal here is to experimentally determine the values of threshold voltage and kn using 3
measured voltages. The 3 voltages we measured were the supply voltage, Vab without the
resistor and VAB with the resistor (A and B are dependent on which figure is being done). We
utilized a single power supply which we set to 5V with a 50 mA current limit. The exact value of
the 1k resistor (R) = 0.9898k.
Results + Discussion

(V) Figure 1 Figure 2 Figure 3 Figure 4

Supply voltage 5.009 5.006 5.005 5.006

VAB w/o R 4.043 4.043 3.506 3.506

VAB w/ R 1.5273 1.5273 1.4172 1.4184

We can see that all figures have the gate either connected to the drain or to the source, and by
providing the appropriate amount of DC voltage VDD, we can put the transistors in saturation
mode to get the drain current equation : Id = ½ kn (VOV)^2. We know that threshold voltage is
defined as the minimum amount of voltage that is needed to be overcome in order for the
transistor to start conducting. Therefore, we can use Vt = VDD - VWithout R to calculate the
threshold voltage. The current can simply be found through ID = VWith R / R. VGS (or VSG
depending on the figure) can be found by doing a KVL: VGS = VDD - VWith R. After solving all these
respective equations, we have all the unknowns needed to solve for kn in the drain current
equation. Work below will only be shown for one figure as all figures share the same calculation
differing only in the use of VGS or VSG.

Figure 1 Figure 2 Figure 3 Figure 4

VGS or VSG (V) 3.4817 3.4787 3.5878 3.5876

ID (mA) 1.543 1.543 1.432 1.433

kn (µA/V2) 487.7 487.6 656.3 657.6

Vt (V) 0.966 0.963 1.499 1.5

Values obtained experimentally lie fairly close to the values obtained in Experiment 3 which
verifies our calculations.
 Experiment 6 - Resistive Load Common Source NMOS Amplifier

In this experiment, we observe and present the applications of an NMOS transistor as an

amplifier and analyze the MOSFET transistor in both AC and DC. Using the provided schematic
we build the circuit using RG = 10.086MΩ and RD = 9.905kΩ.

Using the DMM, we measured VDD = 0.8834 V and VD = 73.73 mV. For measurements of the
gain, we used a voltage divider circuit choosing Rsig2 = .9841kΩ and Rsig1 = 9.916kΩ to get a
small input signal Vsig = 4.51mV when applying 50mV to the function generator. At 1kHz we
computed the gain to be -0.5 V/V with a 180° phase shift, a snapshot of the waveform on the
scope is shown below.

We then increased the input signal slowly until we saw signs of distortion and we found that
input voltage level to be 3.7V (i.e the peak of the wave flattens). Distorted output waveform is
shown below
Lastly, we reduced the input signal to 1.31V on the function generator to get an output voltage of
around 1.5V peak-to-peak and then performed a frequency sweep on it. The screen capture of
the scope and the plot are both shown below. The frequency response that we achieved has
similar characteristics of a typical frequency response of a CS amplifier where the gain is
reduced at the high-frequency band.

1.49V pk-pk with an input signal of 1.31V Frequency Response of NMOS Amplifier

Construction of small-signal model

DC Analysis AC Analysis with computed gain

As shown above, our calculated gain was –4.05 and the experimental gain was found to be -0.5.
When comparing the two they are quite off, it seems that we made a mistake in the
experimental part.
 Experiment 7 - CS Amplifier with bypass capacitor

In this experiment we analyze a common source amplifier both experimentally and theoretically
of the effects of it with and without a bypass capacitor. We first will perform DC analysis to find
the Q points of the CS amplifier and then do AC analysis to find the voltage gain. In this
experiment we used the following resistor values:
RG1 98.56 kΩ

RG2 98.78 kΩ

RS 0.9897 kΩ

RL 26.857 kΩ

RD 4.628 kΩ
Note: The lab manual instructed us to decrease RD to get a VDS voltage of around 3-4V but
however we increased our RD value to ≈ 4.6 kΩ experimentally to achieve a VDS of 4.108V. We
are not quite sure as to why this is because when doing theoretically calculations we end up
with VDS = -0.6 V so for our theoretical calculations we chose to use Rs = 2.6 kΩ to stay in
saturation mode.

Table 1: Common Source Amplifier (Theoretical Rs = 2.6 kΩ)

VDS ID Vin Vout Av RIn ROut

a.) Cs Theoretical 4V 2.228 ////////// //////////// -0.667 49.33kΩ 2.36kΩ

not mA

connect Measured 4.10 2.228 2.08 V 3.05V -1.47 49.33kΩ 2.36kΩ

ed 8V mA

b.) Cs Theoretical 4V 2.228 /////////// /////////// -3.34 49.33kΩ 2.36kΩ

connect mA
ed

across Measured 4.10 2.228 1.28V 5.74V -4.48 49.33kΩ 2.36kΩ

Rs - 8V mA
bypass
Theoretical: (DC and AC with CS connected) Theoretical (AC without CS connected)

AC Measurements: (Used 0.58V input signal for function generator)

Experimental Gain with CS Phase Relationship

 - The phase between the output and input is 180° for both with and without CS connected
- Output voltage gets distorted around 1.4V-1.6 V input signal is applied (2.8V)

Gain without Cs

Frequency Response Measurement (with bypass)

We chose an input signal of Vsig = 0.58V to get a reasonably sized and undistorted output
voltage and performed a frequency sweep.

Lower cutoff freq ≈ 5 kΩ

Upper cutoff freq ≈ 500 kΩ
Questions:
a) compare the measured value with the theoretical calculations and explain any
difference.
- For the most part the measured and the theoretical values were pretty similar
- To maintain a Vds of 3-4 we had to increase the Rd to 4.6K for the theoretical
part which provided us with values around the range of the measured
b) Explain the effect of the source bypass capacitor on the circuit performance.
- The bypass capacitor increases voltage gain
- If we were to remove the bypass capacitor, the stability would increase due to
negative feedback

Conclusion
The main objective of this lab was to observe the characteristics of different MOSFETs and their
applications. We got the NMOS and PMOS characteristics first using the SPA and then plotted
the ID vs VDS graphs. We also obtained the large signal characteristics, used the transistor array
to make a single stage amplifier. Lastly we constructed a CS amplifier and performed both AC
and DC measurements and a frequency response measurement. This lab helped to develop a
better understanding of MOSFET and MOSFET amplifiers and understand the importance of
having bypass capacitors and how it can affect the gains.