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    CCS 2104 - CAT 1, 2 & Assignment

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    This document contains three pages from a course on digital logic at Dedan Kimathi University of Technology. The pages include: 1) Exam questions covering topics like Karnaugh maps, logic diagrams, counters, flip-flops, and sequential logic circuits. 2) An assignment to design an electronic voting system circuit for a board of directors using NAND gates and NOR gates. 3) Background information on the percentage of stock held by each board member and voting requirements.

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    CCS 2104 - CAT 1, 2 & Assignment

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    Big Tee
    22 views3 pages
    This document contains three pages from a course on digital logic at Dedan Kimathi University of Technology. The pages include: 1) Exam questions covering topics like Karnaugh maps, logic diagrams, counters, flip-flops, and sequential logic circuits. 2) An assignment to design an electronic voting system circuit for a board of directors using NAND gates and NOR gates. 3) Background information on the percentage of stock held by each board member and voting requirements.

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    CCS 2104_CAT 1, 2 & Assignment

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    This document contains three pages from a course on digital logic at Dedan Kimathi University of Technology. The pages include: 1) Exam questions covering topics like Karnaugh maps, logic diagrams, counters, flip-flops, and sequential logic circuits. 2) An assignment to design an electronic voting system circuit for a board of directors using NAND gates and NOR gates. 3) Background information on the percentage of stock held by each board member and voting requirements.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    22 views3 pages

    CCS 2104 - CAT 1, 2 & Assignment

    Uploaded by

    Big Tee
    This document contains three pages from a course on digital logic at Dedan Kimathi University of Technology. The pages include: 1) Exam questions covering topics like Karnaugh maps, logic diagrams, counters, flip-flops, and sequential logic circuits. 2) An assignment to design an electronic voting system circuit for a board of directors using NAND gates and NOR gates. 3) Background information on the percentage of stock held by each board member and voting requirements.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    DEDAN KIMATHI UNIVERSITY OF TECHNOLOGY

    SECOND YEAR BSC. COMPUTER SCIENCE


    CCS 2104 DIGITAL LOGIC CAT I

    1. Reduce the following functions using Karnaugh Maps (K-Maps):

    a) in Sum of Products (SOP). [4 Marks]


    b) in Product of Sums (POS). [4 Marks]
    c) Draw the logic diagram of Q1c(i) above. [2 Marks]

    2. A digital circuit has one control line C and three data lines . When
    the control line is HIGH, the circuit is to detect when one of the data lines has a
    1 on it. It is impossible for more than one data line to have a ‘1’ on it. When the
    control line is LOW, the circuit will output a ‘0’, regardless of what is on the data
    lines.
    i. Compute a truth table for the above circuit. [4 Marks]
    ii. From the truth table in Q4 c(i), derive a Sum-of -Products (SOP)
    Boolean expression using a Karnaugh- Map. [4 Marks]
    iii. Draw a logic diagram for the Boolean expression obtained in Q4 c(ii)
    above using AND-OR-NOT gates. [2 Marks]
    3.
    i. State and explain THREE classifications of Counters in Digital
    systems. [6 Marks]

    ii. Explain THREE uses of Counters in Digital Systems. [3 Marks]

    4. Simplify the Boolean function using a


    Karnaugh Map in;
    i. Sum-of-Products (SOP) form. [3 Marks]
    ii. Product-of Sums (POS) form. [3 Marks]
    iii. Draw the logic diagram for the expression obtained in Q1b) ii) above.
    [2 Marks]
    5. Show that using Algebraic means. [3 Marks]

    Page 1 of 3
    DEDAN KIMATHI UNIVERSITY OF TECHNOLOGY
    SECOND YEAR BSC. COMPUTER SCIENCE
    CCS 2104 DIGITAL LOGIC CAT II

    1. Draw the block diagram of a positive-edge triggered four-bit Ring Counter and
    explain its operation by use of timing waveforms. Assume that the initial state of
    the circuit is [10 Marks]

    2. Realize a JK flip-flop function using a SET-RESET (SR) flip-flop. [14 Marks]

    3. Define the following flip-flop timing parameters;


    i. Set-up time ( ). [2 Marks]
    ii. Hold time ( ). [2 Marks]
    iii. Maximum clocking frequency [2 Marks]

    4. Explain TWO differences between Synchronous and Asynchronous Sequential


    Circuits. [4 Marks]
    5. With the aid of a block diagram, explain the operation of a Sequential Logic
    Circuit. [6 Marks]

    Page 2 of 3
    DEDAN KIMATHI UNIVERSITY OF TECHNOLOGY
    SECOND YEAR BSC. COMPUTER SCIENCE
    CCS 2104 DIGITAL LOGIC ASSIGNMENT

    In a certain corporation, the four board members , , and own all stock, which
    is distributed as follows:

    : 40%

    : 30%

    : 20%

    : 10%

    Each member has a percentage vote equal to his holdings and a total vote greater
    than 50% is required to pass a motion. In the boardroom, each member is to have a
    switch with which to indicate a YES or NO vote. A lamp is to light if the total vote
    cast is more than 50% indicating the motion being voted on is passed. Design an
    electronic voting system for the corporation and implement the circuit using:

    a) NAND gates only. [10 Marks]


    b) NOR gates only. [10 Marks]

    Page 3 of 3

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