960/900/864/816-Output Channels TFT LCD Gate Driver S Pecification Preliminary
960/900/864/816-Output Channels TFT LCD Gate Driver S Pecification Preliminary
960/900/864/816-Output Channels TFT LCD Gate Driver S Pecification Preliminary
960/900/864/816-Output Channels
TFT LCD Gate Driver
Specification
Preliminary
Version: V0.03
Document No.: ILI5960_SPEC_V0.03.pdf
¾ 960/900/864/816 channels output and 2 channel outputs which are fixed to VEE
* Note: (1) G0 and G961 are LCD panel auxiliary pins. These pins always keep at VEE.
These two pins are the device start pulse input or output pin. The
function of these two pins depends on the status of RL pin.
STVR Start pulse
I/O STVR STVL
STVL input/output pin
RL=H input output
RL=L output input
5. Operation Description
5.1 Device operation principle
In the condition of MODE=Default & RL=H, the STVR start pulse input is sensed at the rising edge
of CPV and stored in the first stage of shift register, which causes the first scan signal is outputted from
the OUT1 output pin. While stored data is transferred to the next stage shift register at the rising edge of
next CPV, new data of STVR is sensed and stored simultaneously.
The output pin ( G1 to G960 ) supplies VGH voltage or VEE voltage to the LCD panel depending
on the data stored in the shift register. For normal operation, a VGH voltage is outputted one by one
from G1 to G960 in sync with CPV pulse.
After 960 CLK rising edge are past, the STVL goes up to high level at the 960th falling edge of CPV
and goes down to low level at the 961st falling edge of CPV. This STVL output signal becomes the
STVR start pulse input of next cascaded gate driver device.
During any H state of OE, the corresponding output channels are forced to VEE level regardless of
CPV. The channel output returns to normal status as soon as OE go back to L. The mechanism is as
shown below!
STVR
OE
XON
G1
G2
G3
G959
G960
STVL
Start pulse
RL Data transfer direction
Input Output
H STVR STVL G001 Æ G002 Æ…G452 Æ G513 Æ…G959 Æ G960
L STVL STVR G960 Æ G959…Æ G513 Æ G452 Æ…Æ G002 Æ G001
Start pulse
RL Data transfer direction
Input Output
H STVR STVL G001 Æ G002 Æ…G452 Æ G513 Æ…G959 Æ G960
L STVL STVR G960 Æ G959…Æ G513 Æ G452 Æ…Æ G002 Æ G001
Start pulse
RL Data transfer direction
Input Output
H STVR STVL G001 Æ G002 Æ…G432 ÆG529 Æ…G959 Æ G960
L STVL STVR G960 Æ G959…Æ G529 Æ G432 Æ…ÆG002 Æ G001
Start pulse
RL Data transfer direction
Input Output
H STVR STVL G001 Æ G002 Æ…G408 Æ G553 Æ…G959 Æ G960
L STVL STVR G960 Æ G959…Æ G553 Æ G408 Æ…Æ G002 Æ G001
VGH VGH
VDD VDD
VSS VSS
VEE VEE
VDD VEE VGH VGH VEE VDD
G1 to G960
VGH
Logic
input
VDD
VSS
VEE
Note:
(1). Input signals of CPV, XON, OE, RL, STVR & STVL, MODE.
(2). The “High” level=VDD and “Low” level=VSS.
Note:
(1)All of the voltages listed above are with respective to VSS=0V.
(2)Device is subject to be damaged permanently if stresses beyond those absolute maximum ratings listed
above.
(3)Condition VDD = 3.3V
6.2 Recommended operating conditions
( VSS=0V , TA= -20 ~ +85。C)
Rating
Parameter Symbol Unit
Min Typ Max
Power supply voltage (1) VGH 7 - VEE+40 V
Power supply voltage (2) VDD 2.7 3.3 3.6 V
Power supply voltage (3) VEE -20 - -5 V
Power supply voltage (4) VGH-VEE 12 - 40 V
Operation frequency Fcpv - - 200 KHz
Operation temperature Ta -20 - +85 。C
Rating Application
Parameter Symbol Condition Unit
Min Typ Max pin
Input H voltage VIH - 0.7VDD - VDD V All input
Input L voltage VIL - VSS - 0.3VDD V All input
Output H voltage VOH IOH=40µA VDD-0.4 - VDD V STVR,L
Output L voltage) VOL IOL=40µA VSS - VSS+0.4 V STVR,L
VOUT=
Output H resistance ROH - - 1000 Ω G0~961
VGH-0.5V
VOUT=
Output L resistance ROL - - 1000 Ω G0~961
VEE+0.5V
Input leakage
IIN - -5 - ±1 µA Note (b)
current
XON,
Mode ,SEL
Pull-up resistance RIN VIN=VDD 70 200 400 kΩ pin,when
VDD=3.3V
and TA=25°C
VDD operating
IVDD Note (a) - - T.B.D µA -
current
VGH operating
IVGH Note (a) - - T.B.D µA -
current
VEE operating
IVEE Note (a) - - T.B.D µA -
current
Note
(a) Power consumption with the following condition: Output no load, VGH=+25V, VEE= -15V, VDD=3.3V,
VIH=VDD, VIL=VSS, FCPV=60 kHz, OE=VIL, XON=VIH, Mode= VIH.
(b) All input except “XON” and “Mode” pin.
Spec
Parameter Symbol Condition Unit
Min Typ Max
CPV period tCPV - 5 - - µs
CPV pulse width tCPVH, tCPVL 50% duty cycle 2.5 - - µs
OE pulse width tWOE - 1 - - µs
XON pulse width txon - 10 - - µs
Data setup time tSU - 0.7 - - µs
Data hold time tHD - 0.7 - - µs
CPV to output delay time tPD1 CL=300pF - - 1 µs
Start pulse output delay time tPD2 CL=30pF - - 0.8 µs
OE to output delay time tPD3 CL=300pF - - 0.8 µs
XON to output delay time tPD4 CL=300pF - - 30 µs
From 10% to
Power-On Reset Slew Time tpor - - ms
90% VDD
From 10% VDD
VDD to VEE Time tdte 0 ms
to 90% VEE
From 10% VEE
VEE to VDD Time tetd 0 ms
to 90% VDD
From 10% VEE
VEE to VGH Time tetg 1 ms
to 90% VGH
From 10% VGH
VGH to VEE Time tgte 0 ms
to 90% VEE
tggr From 10% to
VGH Rising Time teef ms
(1) 90% VGH
Note: The measurement point for all of signals is 50% with input and output amplitude.
Note(1):teef=> VEE Falling Time, From 10% to 90% VEE
CPV 50%
tSU tHD
STVR 50%
tPD1 tPD1
G1 50%
tPD1 tPD1
G2~G960 50%
CPV 50%
G960 50%
tPD2 tPD2
STVL 50%
tWOE
OE 50%
G1~
G960 50%
tXON
A 32 B2 40 C2 86
A1 52 B3 25 C3 86
A2 90 B4 70 C4 287
A3 70 B5 57 C5 663
A4 57 B6 80 C6 18480
A5 54 B7 20 L 20208
B 20 C 291 W 670
B1 85 C1 57