TIGER ELECTRONIC CO.

,LTD
CD4011
Description
The CD4011 NAND gates provide the system designer with direct implementation of the NAND function.

Features
 Operating Voltage Range: 3.0 to 18 V
 Maximum input current of 1 at 18 V over full package- 14
1
temperature range 100 nA at 18 V and 25 C  SOP 14 (CD4011BM)
 Noise margin (over full package temperature range): 14
1.0 V min @ 5.0 V supply 1
2.0 V min @ 10.0 V supply DIP 14(CD4011BE)
2.5 V min @ 15.0 V supply
Package

Logic Diagram Pin Assignment

1 A 1 14 VDD
A B
2 13 H
3 J
2 J K 3 12 G
B C
4 11 M
5 5 10 L
C
4 D 6 F
K 9
6 Vcc 7
E
D

8
E 10
L
9
F

G 12
11
13
M
H

PIN 14 = V DD
PIN 7 = Vcc

1
 CD4011
Absolute Maximum Ratings
Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V

VIN DC Input Voltage (Referenced to GND) -0.5 to V CC +0.5 V

IIN DC Input Current, per Pin 10 mA

PD Power Dissipation in Still Air, Plastic DIP+ 750

mW
500
SOIC Package+

PD Power Dissipation per Output Transistor 100 mW

Tstg Storage Temperature -65 to +150 C

TL Lead Temperature, 1 mm from Case for 10 Seconds 260 C

(Plastic DIP or SOIC Package)

Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ C from 65 to 125C
SOIC Package: - 7 mW/ C from 65to 125C
Recommended Operating Conditions
Symbol Parameter Min Max Unit

VCC DC Supply Voltage (Referenced to GND) 3.0 18 V

VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) 0 CC V

V

TA Operating Temperature, All Package Types -55 +125 C

This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND (VIN or
VOUT) VCC .
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC). Unused outputs
must be left open.

2
 CD4011
DC Electrical Characteristics
(Voltages Referenced to GND)
VCC Guaranteed Limit
Symbol Parameter Test Conditions V -55C 25C 125 Unit
C
VIH Minimum High-Level VOUT=0.5 V or V CC - 0.5 V 5.0 3.5 3.5 3.5 V
Input Voltage VOUT=1.0 V or V CC - 1.0 V 10 7 7 7
VOUT=1.5 V or V CC - 1.5 V
15 11 11 11
VOUT= VCC - 0.5V
VIL Maximum Low -Level 5.0 1.5 1.5 1.5 V
VOUT= VCC - 1.0 V
Input Voltage 10 3 3 3
VOUT= VCC - 1.5V
15 4 4 4
VOH Minimum High-Level VIN=GND or VCC 5.0 4.95 4.95 4.95 V
Output Voltage 10 9.95 9.95 9.95
15 14.95 14.95 14.95
VOL Maximum Low-Level VIN= VCC 5.0 0.05 0.05 0.05 V
Output Voltage 10 0.05 0.05 0.05
15 0.05 0.05 0.05
IIN Maximum Input VIN= GND or VCC 18 0.1 0.1 1.0 A
Leakage Current
ICC Maximum Q
u VIN= GND or VCC 5.0 0.25 0.25 7.5 A
iescent
10 0.5 0.5 15
Supply Current
15 1.0 1.0 30
(per Package)
20 5.0 5.0 150
IOL Minimum Output Low VIN= GND or VCC mA
(Sink) Current UOL=0.4 V 5.0 0.64 0.51 0.36
UOL=0.5 V
UOL=1.5 V 10 1.6 1.3 0.9
VIN= GND or VCC 15 4.2 3.4 2.4
IOH Minimum Output mA

High (Source) Current UOH=2.5 V 5.0 -2.0 -1.6 -1.15

UOH=4.6 V 5.0 -0.64 -0.51 -0.36
UOH=9.5 V
UOH=13.5 V 10 -1.6 -1.3 -0.9
15 -4.2 -3.4 -2.4

3
 CD4011
AC Electrical Characteristics (C L=50pF, RL=200 k , Input t r =t f =20
ns)
VCC Guaranteed Limit

Symbol Parameter V -55C 25C 125C Unit

tPLH, tPHL Maximum Propagation Delay, Input A or B to 5.0 250 250 250 ns
Output (Figure 1) 10 120 120 120
15 90 90 90

tTLH, tTHL Maximum Output Transition Time, Any Output 5.0 200 200 200 ns
(Figure 1) 10 100 100 100
15 80 80 80

CIN Maximum Input Capacitance - 7.5 pF

t tf r
90% VCC
INPUT 50%
A OR B 10% GND
tPLH t PHL
90% VCC
OUTPUT J 50%
10% GND
t
t
Figure 1. Switching Waveforms

Expanded Logic Diagram

(1/4 of the Device)