DOC001552874
DOC001552874
DOC001552874
IN74AC374
Octal 3-State
Noninverting D Flip-Flop
High-Speed Silicon-Gate CMOS
LOGIC DIAGRAM
FUNCTION TABLE
Inputs Output
Output Clock D Q
Enable
PIN 20=VCC L H H
PIN 10 = GND
L L L
L L,H, X no
change
H X X Z
X = don’t care
Z = high impedance
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IN74AC374
MAXIMUM RATINGS*
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
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IN74AC374
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IN74AC374
Typical @25°C,VCC=5.0 V
CPD Power Dissipation Capacitance 80 pF
Voltage Range 3.3 V is 3.3 V ±0.3 V
*
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IN74AC374
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