CGS 3269 Computer Architecture Concepts Assignment #3
CGS 3269 Computer Architecture Concepts Assignment #3
CGS 3269 Computer Architecture Concepts Assignment #3
2965288
CGS 3269
Computer Architecture Concepts
Assignment #3
1. How many bits would you need to address a 2M x 32 memory if
a. The memory is byte-addressable?
There are 4M × 2 bytes which equals 22 × 220 × 2 = 223 total bytes, so 23 bits are
needed for an address
b. Main memory is word-addressable?
There are 4M words which equals 22 × 220 = 222, so 22 bits are required for an
address
3. Suppose we have 4 memory modules instead of 8 (refer to the slides in topic 4.6 in the
lecture 4 ). Draw the memory modules with the addresses they contain using:
a. High-order interleaving and
b. Low-order interleaving.
Hex
Address Label Instruction
SYMBOL TABLE
------------------
Symbol | Location
--------+---------
A | 110
B | 10C
C | 10F
D | 102
Start | 10E
-----------------
c. What is the value stored in the AC when the above program terminates?
0000
Fill in the blanks where needed for the Subt instruction in the table below. Before doing this,
review the power point slides for chapter 4.
c. If you wanted to increase the hex value to 123456, which byte assignment would be
more efficient, big or little endian? Explain your answer.
Little endian because it makes it easier to place values on non-word boundaries and the
conversion from a 16-bit integer address to a 32-bit integer address does not require any
arithmetic.
7. Convert the following expressions from infix to reverse Polish (postfix) notation.
a. (8 – 6) / 2 = 8-6/2 = 8 6 / 2 – = 8 6 2 / -
b. (2 + 3) * 8 / 10 = 2 + 3 * 8 /10 = 2+3 8 10 /*
8. Explain how a stack is used to evaluate the RPN expressions from Exercise 7.
a. 8 6 2 / - b. 2+3 8 10 / *
6 5
8 2 10 2
2=4=2 8 = 8 = 16
9. Suppose we have the instruction Load 1000.
Memory Contents
1000 1400
….........
1100 400
…..........
1200 1000
…..........
1300 1100
…............
1400 1300
Determine the actual value loaded into the accumulator and fill in the table below:
10. A nonpipelined system takes 100ns to process a task. The same task can be processed in a
5-segment pipeline with a clock cycle of 20ns. Determine the speedup ratio of the pipeline
for 100 tasks. What is the theoretical speedup that could be achieved with the pipeline
system over a nonpipelined system?
Speedup = 0.17