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4. How many bits would you need to address a 2M × 32 memory if a) The memory is byte-
addressable? b) The memory is word-addressable?
7. *Suppose we have 4 memory modules instead of 8 in Figures 4.6 and 4.7. Draw the memory
modules with the addresses they contain using:
1) High-order Interleaving and b) Low-order interleaving.
8. How many 256x8 RAM chips are needed to provide a memory capacity of 4096 bytes?
a) How many bits will each address contain?
b) How many lines must go to each chip?
c) How many lines must be decoded for the chip select inputs? Specify the size of the decoder.
9. Suppose that a 2M x 16 main memory is built using 256K × 8 RAM chips and memory is word-
addressable.
a) How many RAM chips are necessary?
b) If we were accessing one full word, how many chips would be involved?
c) How many address bits are needed for each RAM chip?
d) How many banks will this memory have?
e) How many address bits are needed for all of memory?
f) If high-order interleaving is used, where would address 14 (which is E in hex) be located?
g) Repeat Exercise 9f for low-order interleaving.
10. * Redo Exercise (9) assuming a 16M × 16 memory built using 512K × 8 RAM chips.
11. *Suppose we have 1Gx16 RAM chips that make up a 32Gx64 memory that uses high
interleaving. (Note: This means that each word is 64 bits in size and there are 32G of these
words.)
a) How many RAM chips are necessary?
d) How many bits are needed for a memory address, assuming it is word addressable?
e) For the bits in part d) draw a diagram indicating how many and which bits are used for chip
select, and how many and which bits are used for the address on the chip.
f) Redo this problem assuming low order interleaving is being used instead.
12. A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150
different operations. All instructions have an operation code part (opcode) and an address part
(allowing for only one address). Each instruction is stored in one word of memory.
a) How many bits are needed for the opcode?
b) How many bits are left for the address part of the instruction?
c) What is the maximum allowable size for memory?
d) What is the largest unsigned binary number that can be accommodated in one word of
memory?
13. * A digital computer has a memory unit with 32 bits per word. The instruction set consists of
110 different operations. All instructions have an operation code part (opcode) and two address
fields: one for a memory address and one for a register address. This particular system includes
eight general-purpose, user-addressable registers. Registers may be loaded directly from
memory, and memory may be updated directly from the registers. Direct memory-to-memory
data movement operations are not supported. Each instruction stored in one word of memory.
c) How many bits are left for the memory address part of the instruction?
e) What is the largest unsigned binary number that can be accommodated in one word of
memory?
14. Suppose the RAM for a certain computer has 256M words, where each word is 16 bits long.
a) What is the capacity of this memory expressed in bytes?
b) If this RAM is byte-addressable, how many bits must an address contain?
c) If this RAM is word addressable, how many bits must an address contain?
15. Explain the steps of the fetch-decode-execute cycle. Your explanation should include what is
happening in the various registers.
16. Combine the flowcharts that appear in Figures 4.11 and 4.12 so that the interrupt checking
appears at a suitable place.
17. Explain why, in MARIE, the MAR is only 12 bits wide while the AC is 16 bits wide. Hint: Consider
the difference between data and addresses
18. List the hexadecimal code for the following program (hand assemble it).
Hex
Address Label Instruction
100 Load A
101 Add One
102 Jump S1
103 S2, Add One
104 Store A
105 Halt
106 S1, Add A
107 Jump S2
108 A, HEX 0023
109 One, HEX 0001
*19. Consider the MARIE program below.
Hex
Address Label Instruction
100 Start, LOAD A
101 ADD B
102 STORE D
103 CLEAR
104 OUTPUT
105 ADDI D
106 STORE B
107 HALT
108 A , HEX 00FC
109 B, DEC 14
10A C, HEX 0108
10B D, HEX 0000
Hex
207 CLEAR
208 Done, HALT
21. Write the assembly language equivalent of the following MARIE machine language instructions:
a) 0111000000000000
b) 1011001100110000
c) 0100111101001111
*22. Write the assembly language equivalent of the following MARIE machine language instructions:
a) 0000010111000000
b) 0001101110010010
c) 1100100101101011
if X > 1 then
Y = X + X;
X = 0;
endif;
Y = Y + 1;
if x <= y then
y = y + 1;
else if x != z
then y = y – 1;
else z = z + 1;
26. Write the following code segment in MARIE assembly language. (Hint: Turn the for loop into a while
loop):
Sum = 0;
for X = 1 to 10 do
Sum = Sum + X;
X = 1;
while X < 10 do
X = X + 1;
endwhile;
28. Write a MARIE program using a loop that multiplies two positive numbers by using repeated
addition. For example, to multiple 3 x 6, the program would add 3 six times, or 3+3+3+3+3+3.
30. More registers appears to be a good thing, in terms of reducing the total number of memory
accesses a program might require. Give an arithmetic example to support this statement. First,
determine the number of memory accesses necessary using MARIE and the two registers for holding
memory data values (AC and MBR). Then perform the same arithmetic computation for a processor that
has more than three registers to hold memory data values.