IRF9630, RF1S9630SM

Data Sheet January 2002

6.5A, 200V, 0.800 Ohm, P-Channel Power Features

MOSFETs • 6.5A, 200V
These are P-Channel enhancement mode silicon gate power
• rDS(ON) = 0.800Ω
field effect transistors. They are advanced power MOSFETs
designed, tested, and guaranteed to withstand a specified • Single Pulse Avalanche Energy Rated
level of energy in the breakdown avalanche mode of • SOA is Power Dissipation Limited
operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching • Nanosecond Switching Speeds
converters, motor drivers, relay drivers and drivers for other • Linear Transfer Characteristics
high-power switching devices. The high input impedance
• High Input Impedance
allows these types to be operated directly from integrated
circuits. • Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Formerly developmental type TA17512.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND D

IRF9630 TO-220AB IRF9630

RF1S9630SM TO-263AB RF1S9630

G
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9630SM9A.
S

Packaging
JEDEC TO-220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN (FLANGE) GATE
SOURCE

©2002 Fairchild Semiconductor Corporation IRF9630, RF1S9630SM Rev. B

 IRF9630, RF1S9630SM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF9630,
RF1S9630SM UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -6.5 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -4 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -26 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 75 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 500 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V(Figure 10) -200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC= 125oC - - -250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -6.5 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - °±±100 nA
On Resistance (Note 2) rDS(ON) ID = -3.5A, VGS = -10V (Figures 8, 9) - 0.500 0.800 Ω
Forward Transconductance (Note 2) gfs VDS ≥ ID(ON) x rDS(ON)MAX, ID = -3.5A 2.2 3.5 - S
(Figure 12)
Turn-On Delay Time td(ON) VDD = -100V, ID ≈ -6.5A, RG = 50Ω - 30 50 ns
Rise Time tr RL = 15.4Ω (Figures 17, 18) - 50 100 ns
MOSFET Switching Times are Essentially
Turn-Off Delay Time td(off) Independent of Operating Temperature - 50 100 ns
Fall Time tf - 40 80 ns
Total Gate Charge Qg(TOT) VGS = -10V, ID = -6.5A, VDS = 0.8 x Rated BVDSS - 31 45 nC
(Gate to Source + Gate to Drain) Ig(REF) = -1.5mA (Figures 14, 19, 20)
Gate to Source Charge Qgs Gate Charge is Essentially Independent of - 18 - nC
Operating Temperature
Gate to Drain (“Miller”) Charge Qgd - 13 - nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz - 550 - pF
Output Capacitance COSS (Figure 11) - 170 - pF
Reverse Transfer Capacitance CRSS - 50 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw On Tab To Symbol Showing the
the Center of Die Internal Devices
Measured From the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) From
Package to the Center of LD
Die
Internal Source Inductance LS Measured From the Source G - 7.5 - nH
Lead, 6mm (0.25in) From LS
Package to Source Bond-
ing Pad S

Thermal Resistance Junction to Case RθJC - - 1.67 oC/W

Thermal Resistance Junction to Ambient RθJA Typical Socket Mount - - 80 oC/W

©2002 Fairchild Semiconductor Corporation IRF9630, RF1S9630SM Rev. B

 IRF9630, RF1S9630SM

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol - - -6.5 A
Showing the Integral Re- D
Pulse Source to Drain Current ISDM - - -26 A
verse P-N Junction Diode
(Note 3)

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -6.5A, VGS = 0V (Figure 13) - - -1.5 V
Reverse Recovery Time trr TJ = 150oC, ISD = -6.5A, dISD/dt = 100A/µs - 400 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = -6.5A, dISD/dt = 100A/µs - 2.6 - µC
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 17.75mH, RG = 25Ω, peak IAS = 6.5A. (Figures 15, 16).

Typical Performance Curves Unless Otherwise Specified

1.2 -10
POWER DISSIPATION MULTIPLIER

1.0
-8
ID, DRAIN CURRENT (A)

0.8
-6

0.6
-4
0.4

-2
0.2

0 0
0 50 100 150 0 50 75 100 125 150
TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

1
THERMAL IMPEDENCE

0.5
ZqJC, NORMALIZED

0.2

0.1 PDM
0.1
0.05
0.02
0.01 t1
t2 t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
0.01
10-5 10-4 10-3 10-2 10-1 1 10
t 1, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2002 Fairchild Semiconductor Corporation IRF9630, RF1S9630SM Rev. B

 IRF9630, RF1S9630SM

Typical Performance Curves Unless Otherwise Specified (Continued)

-100 -15
TC = 25oC VGS = -10V -9V
TJ = MAX RATED PULSE DURATION = 80µs
SINGLE PULSE -12 VGS = -8V DUTY CYCLE = 0.5% MAX

ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

VGS = -7V
-10 10µs
-9
100µs

1ms VGS = -6V

-6
-1 OPERATION IN THIS 10ms
AREA MAY BE 100ms VGS = -5V
LIMITED BY rDS(ON) -3
DC
VGS = -4V

-0.1 0 -10 -20 -30 -40 -50

-1 -10 -100 -1000
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-20 -15
PULSE DURATION = 80µs PULSE DURATION = 80µs

ID(ON), ON-STATE DRAIN CURRENT (A)

DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VGS = -10V
-16 -12
ID, DRAIN CURRENT (A)

VGS = -9V
VGS = -8V
-55oC
-12 VGS = -7V -9
25oC

-8 VGS = -6V -6 -125oC

-4 VGS = -5V -3

VGS = -4V
0 0
0 -2 -4 -6 -8 -10 0 -2 -4 -6 -8 -10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

2.0 2.5
PULSE DURATION = 80µs
rDS(ON), DRAIN TO SOURCE ON

DUTY CYCLE = 0.5% MAX

NORMALIZED DRAIN TO SOURCE

1.6 2.0
RESISTANCE (Ω)

ON RESISTANCE

1.2 1.5
VGS = -10V

0.8 1.0

VGS = - 20V
0.4 0.5

0
0
0 -5 -10 -15 -20 -25 -40 0 40 80 120 160
ID, DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)

NOTE: Heating effect of 2µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

©2002 Fairchild Semiconductor Corporation IRF9630, RF1S9630SM Rev. B

 IRF9630, RF1S9630SM

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 2000
VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN-TO-SOURCE

C = CGD
1.15 1600 RSS
COSS ≈ CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 1200

CISS
0.95 800

COSS
0.85 400

CRSS
0.75 0
-40 0 40 80 120 160 0 10 20 30 40 50
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

7.0 -100
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)

5.6
ISD, DRAIN CURRENT (A)

TJ = -55oC TJ = 150oC
-10
4.2 TJ = 25oC

TJ = 125oC
2.8
TJ = 25oC
-1.0

1.4

0 -0.1
0 -3 -6 -9 -12 -15 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8
ID , DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0
I D = -8A
VGS, GATE TO SOURCE (V)

-5

- 10 VDS = -160V

VDS = -100V
VDS = -40V

- 15

0 8 16 24 42 40
Qg(TOT) , TOTAL GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

©2002 Fairchild Semiconductor Corporation IRF9630, RF1S9630SM Rev. B

 IRF9630, RF1S9630SM

Test Circuits and Waveforms

VDS
tAV

L 0

VARY tP TO OBTAIN
-
REQUIRED PEAK IAS RG VDD
+

0V DUT VDD
tP IAS
VDS
IAS tP
-VGS 0.01Ω
BVDSS

FIGURE 15. UNCLAMPED INDUCTIVE ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
0
RL 10% 10%

DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%

50% 50%
PULSE WIDTH
90%

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
0

VDS
DUT
-
12V 0.2µF 50kΩ
BATTERY 0.3µF
+
Qgs VGS
D Qgd

Qg(TOT)
G DUT
VDD
0
IG(REF) S
0
+VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR IG(REF)

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation IRF9630, RF1S9630SM Rev. B

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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4
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