IRF9540, RF1S9540SM

Data Sheet January 2002

19A, 100V, 0.200 Ohm, P-Channel Power MOSFETs

These are P-Channel enhancement mode silicon gate power eld effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specied level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits. Formerly Developmental Type TA17521.

Features
19A, 100V rDS(ON) = 0.200 Single Pulse Avalanche Energy Rated SOA is Power Dissipation Limited Nanosecond Switching Speeds Linear Transfer Characteristics High Input Impedance Related Literature - TB334 Guidelines for Soldering Surface Mount Components to PC Boards

Ordering Information
PART NUMBER IRF9540 RF1S9540SM PACKAGE TO-220AB TO-263AB BRAND IRF9540 RF1S9540

Symbol
D

NOTE: When ordering, use the entire part number. Add the sufx 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S9540SM9A.

Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE DRAIN (FLANGE) DRAIN (FLANGE) GATE SOURCE

JEDEC TO-263AB

2002 Fairchild Semiconductor Corporation

IRF9540, RF1S9540SM Rev. B

IRF9540, RF1S9540SM
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specied IRF9540, RF1S9540SM -100 -100 -19 -12 -76 20 150 1 960 -55 to 175 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied.

NOTE: 1. TJ = 25oC to 150oC.

Electrical Specications
PARAMETER Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current

TC = 25oC, Unless Otherwise Specied SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured From the Contact Screw on Tab to the Center of Die Measured From the Drain Lead, 6mm (0.25in) from Package to the Center of Die Modified MOSFET Symbol Showing the Internal Devices Inductances
D LD G LS S

TEST CONDITIONS ID = -250A, VGS = 0V (Figure 10) VGS = VDS, ID = -250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC VDS > ID(ON) x rDS(ON) MAX, VGS = -10V VGS = 20V ID = -10A, VGS = -10V (Figures 8, 9) VDS > ID(ON) x rDS(ON) MAX, ID = -6A (Figure 12) VDD = -50V, ID 19A, RG = 9.1, RL = 2.3, VGS = -10V, (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = -10V, ID = -19A, VDS = 0.8 x Rated BVDSS, Ig(REF) = -1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature VDS = -25V, VGS = 0V, f = 1MHz (Figure 11)

MIN -100 -2 -19 5 -

TYP 0.150 7 16 65 47 28 70 14 56 1100 550 250 3.5

MAX -4 -25 -250 100 0.200 20 100 70 70 90 -

UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH

Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain Miller Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance

4.5

nH

Internal Source Inductance

LS

Measured From the Source Lead, 6mm (0.25in) From Package to Source Bonding Pad Typical Socket Mount

7.5

nH

Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient

RJC RJA

1 62.5

oC/W oC/W

2002 Fairchild Semiconductor Corporation

IRF9540, RF1S9540SM Rev. B

IRF9540, RF1S9540SM
Source to Drain Diode Specications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D

MIN -

TYP -

MAX -19 -76

UNITS A A

Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:

VSD trr QRR

TC = 25oC, ISD = -19A, VGS = 0V (Figure 13) TJ = 150oC, ISD = 19A, dISD/dt = 100A/s TJ = 150oC, ISD = 19A, dISD/dt = 100A/s

170 0.8

-1.5 -

V ns C

2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 4mH, RG = 25, peak IAS = 19A. (Figures 15, 16).

Typical Performance Curves

1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25

Unless Otherwise Specied

-20

ID, DRAIN CURRENT (A)

-20

-15

-10

-5

125 50 75 100 TC , CASE TEMPERATURE (oC)

150

175

0 25

75

125

175

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE

1 ZJC, TRANSIENT THERMAL IMPEDANCE (oC/W) 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x RJC + TC 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) 1 10 PDM

0.01 10-5

10-4

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

2002 Fairchild Semiconductor Corporation

IRF9540, RF1S9540SM Rev. B

IRF9540, RF1S9540SM Typical Performance Curves

200 100 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10s 100s 10 1ms 10ms OPERATION IN THIS AREA IS LIMITED BY rDS(ON) TC = 25oC TJ = MAX RATED 0.1 SINGLE PULSE 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) 500 100ms DC -80

Unless Otherwise Specied (Continued)

-100

VGS = -16V

VGS = -14V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = -12V VGS = -10V

-60

-40 VGS = -9V VGS = -8V -20 VGS = -5V 0 0 -10 -20 VGS = -7V VGS = -6V -30 VGS = -4V -40 -50

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

FIGURE 5. OUTPUT CHARACTERISTICS

IDS(ON), DRAIN TO SOURCE CURRENT (A)

-50

VGS = -16V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = -14V VGS = -10V

VGS = -12V

-100

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX

ID, DRAIN CURRENT (A)

-40

-30

VGS = -9V VGS = -8V

-10

-20 VGS = -7V -10 VGS = -6V VGS = -5V VGS = -4V -6 -8

TJ = 125oC -1 TJ = 25oC TJ = -55oC -0.1

-2

-4

-10

-2

VDS, DRAIN TO SOURCE VOLTAGE (V)

-12 -4 -6 -8 -10 VGS, GATE TO SOURCE VOLTAGE (V)

-14

FIGURE 6. SATURATION CHARACTERISTICS

0.26 rDS(ON), DRAIN TO SOURCE ON PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = -10V NORMALIZED DRAIN TO SOURCE ON RESISTANCE

FIGURE 7. TRANSFER CHARACTERISTICS

2.0 VGS = -10V, ID = 10A PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX

0.22 RESISTANCE ()

1.5

0.18

VGS = -20V

1.0

0.14

0.10

0.5

-20

-40 -60 ID, DRAIN CURRENT (A)

-80

-100

0.2 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 160

NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE

2002 Fairchild Semiconductor Corporation

IRF9540, RF1S9540SM Rev. B

IRF9540, RF1S9540SM Typical Performance Curves

1.15 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE

Unless Otherwise Specied (Continued)

2000

ID = 250A
1600 C, CAPACITANCE (pF)

1.05

VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD CISS

1200

0.95

800

COSS CRSS

0.85

400

0.75 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 160

0 0

-10

-20

-30

-40

-50

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

15 gfs, TRANSCONDUCTANCE (S)

ISD, SOURCE TO DRAIN CURRENT (A)

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TJ = -55oC

100

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TJ = 150oC TJ = 25oC

12

10

TJ = 25oC TJ = 125oC

0 0 -20 -40 -60 ID, DRAIN CURRENT (A) -80 -100

0.1 0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT

FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

ID = -19A

VGS, GATE TO SOURCE (V)

-5

-10

VDS = -20V VDS = -50V VDS = -80V

20 40 60 Qg(TOT) , GATE CHARGE (nC)

80

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

2002 Fairchild Semiconductor Corporation

IRF9540, RF1S9540SM Rev. B

IRF9540, RF1S9540SM Test Circuits and Waveforms

VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0

VDD VDD

0V VGS

DUT tP IAS 0.01

IAS tP BVDSS VDS

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON td(ON) tr RL 0 10%

tOFF td(OFF) tf 10%

DUT VGS RG

VDD
+

VDS VGS 0

90%

90%

10% 50% PULSE WIDTH 90% 50%

FIGURE 17. SWITCHING TIME TEST CIRCUIT

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

CURRENT REGULATOR

-VDS (ISOLATED SUPPLY)

0 VDS

DUT 12V BATTERY 0.2F 50k 0.3F Qgs D G 0 Ig(REF) IG CURRENT SAMPLING RESISTOR S +VDS ID CURRENT SAMPLING RESISTOR 0 DUT VDD Qgd

VGS

Qg(TOT)

Ig(REF)

FIGURE 19. GATE CHARGE TEST CIRCUIT

FIGURE 20. GATE CHARGE WAVEFORMS

2002 Fairchild Semiconductor Corporation

IRF9540, RF1S9540SM Rev. B

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Rev. H4

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