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    Digital and Logic Design Lab-8 Revision Lab

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    prince12
    This document outlines 7 tasks for a digital logic design lab focusing on logic gates, Boolean algebra, and circuit design. The tasks include drawing logic gate symbols, completing truth tables, deriving sum of products expressions, minimizing logic functions using K-maps, and implementing full adders using Circuit Maker to verify standard and minimized logic designs. Completing the tasks provides practice with common digital logic concepts and design techniques.

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    © All Rights Reserved
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    Digital and Logic Design Lab-8 Revision Lab

    Uploaded by

    prince12
    60 views4 pages
    This document outlines 7 tasks for a digital logic design lab focusing on logic gates, Boolean algebra, and circuit design. The tasks include drawing logic gate symbols, completing truth tables, deriving sum of products expressions, minimizing logic functions using K-maps, and implementing full adders using Circuit Maker to verify standard and minimized logic designs. Completing the tasks provides practice with common digital logic concepts and design techniques.

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    Lab_08_RevisionMid

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    This document outlines 7 tasks for a digital logic design lab focusing on logic gates, Boolean algebra, and circuit design. The tasks include drawing logic gate symbols, completing truth tables, deriving sum of products expressions, minimizing logic functions using K-maps, and implementing full adders using Circuit Maker to verify standard and minimized logic designs. Completing the tasks provides practice with common digital logic concepts and design techniques.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    60 views4 pages

    Digital and Logic Design Lab-8 Revision Lab

    Uploaded by

    prince12
    This document outlines 7 tasks for a digital logic design lab focusing on logic gates, Boolean algebra, and circuit design. The tasks include drawing logic gate symbols, completing truth tables, deriving sum of products expressions, minimizing logic functions using K-maps, and implementing full adders using Circuit Maker to verify standard and minimized logic designs. Completing the tasks provides practice with common digital logic concepts and design techniques.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 4

    Digital and Logic Design

    Lab-8

    Revision Lab

    Faculty of Information Technology UCP Lahore Pakistan


    Lab Tasks

    Task#1

    a) Draw the symbol Diagram of the following


    i. AND
    ii. NAND
    iii. OR
    iv. NOR
    v. XOR
    vi. XNOR
    b) Complete the following Truth table for 2-input Gates. (Insert more rows in the
    given table if needed.)

    Ref# A B A.B A´. B A+B ´


    A+B A B A´ B

    c) Complete the following Truth table for 3-input Gates. (Insert more rows in the
    given table if needed.)

    Ref# A B C A.B.C A . B´ . C A+B+C ´


    A+ B+C A B C ´
    A BC

    Task#2

    a) Write down the names of all universal gates with their symbols and Boolean
    expressions on paper ONLY.
    b) Implement the two Input AND Gate using NOR Gate on circuit maker.
    c) Implement the two Input OR Gate using NOR Gate on circuit maker.
    Task#3
    F(A,B,C) = ∑ (1,3,5,6,7)

    a) Write down the standard SOP of given Function F(A,B,C).


    b) By using k-map, write down the minimized SOP of given Function F(A,B,C).
    c) Draw the Standard and minimized form on circuit maker.
    Task#4
    Consider the given table for the task.

    Inputs Outputs
    Ref # A B C X Y
    0 0 0 0 0 1
    1 0 0 1 1 0
    2 0 1 0 1 1
    3 0 1 1 0 0
    4 1 0 0 1 1
    5 1 0 1 0 0
    6 1 1 0 1 0
    7 1 1 1 0 1

    a) Write down the canonical forms of both X and Y.


    b) Express the Standard forms of both X and Y.
    c) By using k-map, write down the minimized SOP of both X and Y.
    d) Draw the Standard form and minimized forms on circuit maker. (For both X and Y)

    Task#5

    a) Draw a truth table for full adder. Clearly mention inputs and outputs.
    b) Write the SOP and POS Expression.
    c) Write the Minimized POS using K-Map grouping technique.
    d) Using the above truth table design and implement full adder on Circuit Maker and
    verify the results.

    Task#6

    a) Reduce the Boolean expression given below (on page)

    F (A,B,C) = Á B́ Ć + Á B́ C + A B́ Ć + A B́ C+ A B Ć+ A B C

    b) Create and fill the table for both expressions (given and reduced)

    c) Implement both the expressions (given and reduced) in Circuit Maker with same inputs
    (only three common inputs A, B and C) and verify your results

    Task#7
    a) Draw a truth table for full adder. Clearly mention inputs and outputs.
    b) Write the SOP and POS Expression.
    c) Write the Minimized SOP using K-Map using grouping technique.
    d) By using standard SOP, implement full adder on Circuit Maker and verify the results.
    e) By using minimized SOP, implement full adder on Circuit Maker and verify the results.
    NOTE: Use single Circuit for both SUM and CARRY.

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