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    UEC612

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    wizard01.2022
    This document contains the details of an exam for a Digital System Design course, including 4 questions worth a total of 25 marks. It provides the roll number and department for a student at Thapar Institute of Engineering and Technology, along with the course code, name, date, duration, and instructor for the exam. The 4 questions cover topics like BCD to excess 3 code conversion, error detection in Hamming codes, Boolean minimization using the Venn-Euler method, multiplexer design, decoder construction, gated SR latches, and realizing an AB flip-flop using a JK flip-flop.

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    UEC612

    Uploaded by

    wizard01.2022
    26 views1 page
    This document contains the details of an exam for a Digital System Design course, including 4 questions worth a total of 25 marks. It provides the roll number and department for a student at Thapar Institute of Engineering and Technology, along with the course code, name, date, duration, and instructor for the exam. The 4 questions cover topics like BCD to excess 3 code conversion, error detection in Hamming codes, Boolean minimization using the Venn-Euler method, multiplexer design, decoder construction, gated SR latches, and realizing an AB flip-flop using a JK flip-flop.

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    UEC612 (1)

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    This document contains the details of an exam for a Digital System Design course, including 4 questions worth a total of 25 marks. It provides the roll number and department for a student at Thapar Institute of Engineering and Technology, along with the course code, name, date, duration, and instructor for the exam. The 4 questions cover topics like BCD to excess 3 code conversion, error detection in Hamming codes, Boolean minimization using the Venn-Euler method, multiplexer design, decoder construction, gated SR latches, and realizing an AB flip-flop using a JK flip-flop.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    26 views1 page

    UEC612

    Uploaded by

    wizard01.2022
    This document contains the details of an exam for a Digital System Design course, including 4 questions worth a total of 25 marks. It provides the roll number and department for a student at Thapar Institute of Engineering and Technology, along with the course code, name, date, duration, and instructor for the exam. The 4 questions cover topics like BCD to excess 3 code conversion, error detection in Hamming codes, Boolean minimization using the Venn-Euler method, multiplexer design, decoder construction, gated SR latches, and realizing an AB flip-flop using a JK flip-flop.

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    Roll Number:

    Thapar Institute of Engineering and Technology, Patiala


    Department of Electronics and Communication Engineering
    B. E. 2nd year (ECE), MST Course Code: UEC612
    Course Name: Digital System Design 27th Sept, 2022

    Time: 2 Hours, M. Marks: 25 Instructor: Dr. Alpana Agarwal & Dr. Manu Bansal

    Note: Attempt all questions


    Make suitable assumptions, if required
    1 Design a BCD to Excess 3 code converter. 6
    2 (a) Assume that the received 12-bit Hamming code word consisting of 8-bit data 4
    and 4 check bits is d8d7d6d5c8d4d4d3d2c4d1czc1, where the data bits and the
    check bits are given in the following tables:
    Data bits Chock hits
    ii,, d; d( d, (LI (13 (19 d1 , ;8 C 1 C1 ( .1
    . I 0 .r 0 1 0 1 y U 1 0
    (a) Find x and y.
    (b) Find the error bit, if any.
    (c) Find the correct 12-bit code transmitted.
    2 (b) Find the minimized Boolean expression for the four variable function F(A,B,C,D) 3
    by VEM Technique.
    \BC
    A 0 D DA) 0
    D+D' D+D' D' D i.C13

    3 (a) Consider a 4-to-1 multiplexer with two select lines S1 and SO, given below 3
    . o .
    1 I 4-to-1 F
    2 Multiplexer
    A 3
    Si Su

    P Q
    Find the minimal sum-of-products form of the Boolean expression for the
    output F of the multiplexer.
    3 (b) Construct a 5-to-32 line decoder with four 3-to-8 line decoders (with HIGH-active 3
    enable) and a 2-to-4 line decoder. Use block diagrams for the different
    components and label them.
    4 (a) Draw the structure of a gated HIGH-active SR latch. Discuss the operation using 3
    characteristic table. How can it be converted to a positive-edge triggered SR Flip-
    flop?
    4 (b) Realize an AB fl p-flop (using JK flip-flop) whose operation is described below. 3
    A B Qn+1
    0 0 Qn'
    0 1 o
    1 0 Qn
    1 1 1

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