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    Dpco Sample QN

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    Dpco Sample QN

    Uploaded by

    vsksvskd5
    10 views1 page

    Original Title

    DPCO SAMPLE QN

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    10 views1 page

    Dpco Sample QN

    Uploaded by

    vsksvskd5

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 1

    1. List the four possible elementary operations simple binary addition consists in digital circuits.

    2. List the applications of Multiplexer and Demultiplexer


    3. What is a priority encoder?
    4. Tabulate the excitation table of JK flip flop.
    5. Differentiate a latch from a flipflop.
    6. Define De-Morgan’s theorem
    7. Subtract 1010 from 1111 using 2’s Complement.
    Simplify the following expression using Boolean algebra.
    8.
    F (x, y, z) = π M(3,5,7).
    9. Differentiate Combinational and Sequential circuit.
    10. Write the logic symbol and truth table of a D flip-flop.

    6. a. Implement the K-map to reduce the Boolean function F (W, X, Y, Z) = ∑m (0,1,2,4,5,6,8,9,12,13,14).


    (OR)
    b. Design BCD adder with the help of logic diagram.
    7. a. Explain the graphic symbol, algebraic expression and truth table for the following digital logic gates: AND,
    OR, Inverter, Buffer, NAND, NOR, Exclusive OR and Exclusive NOR.
    (OR)
    b. i)Design a full adder using two half adders.
    ii)Simplify the following function using 8:1 multiplexer f=∑m (0,1,3,4,8,9,15)

    8. a. Convert BCD to Gray code and implement using logic gates.


    or
    b. Demonstrate 4-bit magnitude comparator with three outputs A>B, A=B and A<B.
    a Find the reduced SOP form of the following function. F (A, B, C, D) = ∑ ( 1,3,7,11,15) + d
    6
    (0,2,4).
    b i) Implement the following Boolean expression with 8:1 multiplexer.
    F (A, B, C, D) = ∑ ( 0,3,5,6,8,9,10,12,14) (5)
    ii) Design a full Subtractor with inputs A, B, Bin and two outputs D and Bout. The circuit performs
    X-Y-Z, where Bin is the input Borrow, Bout is the Borrow out and D is the difference. (7)
    7 a Construct a BCD adder with a neat logic diagram.
    b Design a full adder with inputs X, Y, Z and two outputs S and C. The circuit performs X+Y+Z,
    where Z is the input Carry, C is the output carry and S is the sum.
    8 A Design and implementation of SR flip-flop.
    b Build a JK Flip flop and explain its working.

    9. a. Build J-K flip flop with the help of block diagram and characteristic table.
    (OR)
    b. Build S-R flip flop with the help of block diagram and characteristic table.
    9 a i)Construct a Carry Look Ahead Adder with neat logic diagram.
    ii)Design full adder using two half adders.
    b Construct a 2-bit Magnitude comparator with a neat logic diagram.

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