Candidates Are Required To Give Their Answers in Their Own Words As Far As Practicable. The Figures in The Margin Indicate Full Marks

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POKHARA UNIVERSITY

Level: Bachelor Semester – Spring Year : 2006


Programme: BE Full Marks: 100
Course: Electronic Devices Time : 3hrs.
Candidates are required to give their answers in their own words as far
as practicable.
The figures in the margin indicate full marks.
Attempt all the questions.

1. a) What is model? Draw different models of diode when it is forward 5


biased and reverse biased.
b) "Diode is a non-linear device" Do you agree? Justify your answer. 5
c) Why is an intrinsic semiconductor not adequate for making 1+1
semiconductor devices? What will you do to make it useful for +3
making semiconductor devices? Draw the energy band diagram of
n-type and p-type semiconductor and explain in brief.
2. a) Zener diode is said to be the backbone of voltage stabilizer. Justify 5
your answer.
b) A Zener regulator has 12 V Zener voltage with variable load 5
resistance. Calculate:

Rs=100

RL=200to 1k

c) Explain transition region capacitance and diffusion capacitance in 5


brief.
3. a) What do you mean by the input and output characteristics of a 8
transistor? Draw output characteristics curve of CE configuration and
show the regions of operations.
b) The potential divider circuit shown in figure has the values as 7
follows: IE = 2 mA, IB = 50 A, VBE = 0.3 V, RE = 1 K, R2= 10 K
and VCC = 10V. Find the value of R1 if the transistor is operating in
the active region.
VCC=20V

R1= ? Rc

I1 Ic

I2 IB = 50A
IE
R2=10k
RE=1k

4. a) What is the basic difference between linear and non-linear circuit? 8


Explain piecewise linear modelling for the non-linear circuit analysis.
b) For the circuit given below, find out the value of voltage gain and
7
output impedance.

5. a) What is the primary difference between the construction of 5


depletion – type and enhancement – type MOSFETs.
b) For the n-channel JFET shown in the figure below. Determine the : 5
i) Gate to source voltage (VGS)
ii) Drain current (ID)
iii) Drain to source voltage (VDS)
Given: IDSS = 10 mA and Vp = -8 V

c) Draw and explain the high frequency T-model of CB configuration. 5


6. a) For the circuits given below, find out the output voltage waveforms. 8
Briefly explain now the waveforms are drawn. (Assume ideal diode).
C

RS Vout
Vin
+10V
V out +12V
t
+
5V RL
-
-10V
t
-12V

i) ii)
b) Why rectification is necessary? In rectification process normally we
use step down transformer, why? Draw full wave bridge rectifier 7
circuit and explain its operation.
7. Write short notes on (Any Two): 52
a) Thermal instability
b) Varactor diode and its applications
c) Uni-junction Transistor (UJT)

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