SMG351AN: Elektronische Bauelemente 3A, 30V, R 60m

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SMG351AN

3A, 30V,RDS(ON) 60mΩ


Elektronische Bauelemente
N-Channel Enhancement Mode Power Mos.FET
RoHS Compliant Product

A
L
SC-59
Description
3 Dim Min Max
S Top View B
The SMG351AN uses advanced trench technology to 2 1 A 2.70 3.10
provide excellent on-resistance with low gate change. B 1.40 1.60
The device is suitable for use as a load switch or D C 1.00 1.30
in PWM applications.
G D 0.35 0.50
J G 1.70 2.10
C
H 0.00 0.10
Features K
J 0.10 0.26
H
* Lower Gate Charge Drain K 0.20 0.60
* Small Package Outline Gate L 0.85 1.15
Source S 2.40 2.80
D All Dimension in mm

Absolute Maximum Ratings


Parameter Symbol Ratings Unit
Drain-Source Voltage VDS 30 V
Gate-Source Voltage VGS ±20 V
3
Continuous Drain Current ID @TA=25 3 A
Pulsed Drain Current1,2 IDM 10 A
Total Power Dissipation PD @TA=25 1.38 W
Linear Derating Factor 0.01 W/
Operating Junction and Storage Temperature Range Tj, Tstg -55 ~ +150

Thermal Data
Parameter Symbol Value Unit
Thermal Resistance Junction-ambient3 Max. Rthj-a 90 /W

http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual

01-Jun-2002 Rev. A Page 1 of 4


Free Datasheet http://www.datasheet4u.com/
SMG351AN
3A, 30V,RDS(ON) 60mΩ
Elektronische Bauelemente
N-Channel Enhancement Mode Power Mos.FET

Electrical Characteristics (Tj = 25 unless otherwise specified)


Parameter Symbol Min. Typ. Max. Unit Test Conditions
Drain-Source Breakdown Voltage BVDSS 30 - - V VGS=0, ID=250uA
Breakdown Voltage Temperature Coefficient BVDSS / Tj - 0.1 - V/ Reference to 25 , ID=1mA
Gate Threshold Voltage VGS(th) 1.0 - 2.5 V VDS=VGS, ID=250uA
Forward Transconductance gfs - 13 - S VDS=5V, ID=3.0A
Gate-Source Leakage Current IGSS - - ±100 nA VGS= ±20V
Drain-Source Leakage Current(Tj=25 ) - - 1 uA VDS=30V, VGS=0
IDSS
Drain-Source Leakage Current(Tj=55 ) - - 10 uA VDS=24V, VGS=0
- - 60 VGS=10V, ID=3.0A
Static Drain-Source On-Resistance RDS(ON) m
- - 100 VGS=4.5V, ID=2.0A
2
Total Gate Charge Qg - 8.5 -
ID=3A
Gate-Source Charge Qgs - 1.5 - nC VDS=16V
VGS=4.5V
Gate-Drain (“Miller”) Change Qgd - 3.2 -
Turn-on Delay Time2 Td(on) - 6 - VDS=15V
Rise Time Tr - 20 - ID=3A
ns VGS=10V
Turn-off Delay Time Td(off) - 20 - RG=3.3
Fall Time Tf - 3 - RD=3

Input Capacitance Ciss - 660 -


VGS=0V
Output Capacitance Coss - 90 - pF VDS=25V
f=1.0MHz
Reverse Transfer Capacitance Crss - 70 -
Gate Resistance Rg - 0.9 - VGS=15mV, f=1.0MHz
Source-Drain Diode
Parameter Symbol Min. Typ. Max. Unit Test Conditions
2
Forward On Voltage VSD - - 1.2 V IS=1.2A, VGS=0V
2
Reverse Recovery Time Trr - 14 - ns IS=3A, VGS=0V
Reverse Recovery Charge Qrr - 7 - nC dI/dt=100A/ s

Notes: 1. Pulse width limited by Max. junction temperature.


2. Pulse width 300us, duty cycle 2%.
3. Surface mounted on 1 in2 copper pad of FR4 board; 270 /W when mounted on Min. copper pad.

http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual

01-Jun-2002 Rev. A Page 2 of 4


SMG351AN
3A, 30V,RDS(ON) 60mΩ
Elektronische Bauelemente
N-Channel Enhancement Mode Power Mos.FET

Characteristics Curve
5 5
VGS=10V 4.5V VDS=5V
6.0V
4 4
ID Drain Current (A)

ID Drain Current (A)


3 3

3.5V

2 2

TA=125

1 1 25
3.0V -55
0 0

0 0.5 1 1..5 2 2 2.5 3 3..5 4

VDS Drain-to-Source Voltage (V) VGS Gate-to-Source Voltage (V)


Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics
0.215

ID=3A
0.200 3A

0.175
RDS(ON) ( )

0.150

TA=125
0.125

0.100

0.075
TA=25
0.050

3 4 5 6 7 8 9 10

VGS Gate-to-Source Voltage (V)


Fig 4. Normalized On-Resistance
Fig 3. On-Resistance v.s. Gate Voltage v.s. Junction Temperature

Fig 5. Forward Characteristics of Fig 6. Gate Threshold Voltage v.s.


Reverse Diode Junction Temperature
http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual

01-Jun-2002 Rev. A Page 3 of 4


SMG351AN
3A, 30V,RDS(ON) 60mΩ
Elektronische Bauelemente
N-Channel Enhancement Mode Power Mos.FET

3A

Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics

Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance

Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform

http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual


01-Jun-2002 Rev. A Page 4 of 4

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