Module 6 2 PA Classes
Module 6 2 PA Classes
Module 6 2 PA Classes
U.C. Berkeley
Copyright
c 2014 by Ali M. Niknejad
RL
vo
vin
VQ,high
VQ,mid VQ,mid
VQ,low
VCE!sat VCE,sat
IQ
0A
The current in the transistor cannot go negative. Therefore,
the maximum current is set by the bias current
io ≤ IQ
VCC
RF C
C∞
vo
vin RL
VCC
−
VCC
VCC
+
−
+
vo
+
vin VCC RL
−
VCC
Lres
Cm
vo
vin Lm R0
Cpar
Pout
PC =
Vmax Imax
Vdrain,max = 2VDD
Idrain,max = IQ + IL = 2IQ
1
Pout = VDD IQ
2
1 1 1 1
PC = · · = = 0.125
2 2 2 8
RF C
Emitter inductance has a C∞
detrimental effect on PA vo
efficiency since it reduces the
swing. The voltage across vin RL
the emitter is given by +
VE = jωLE io VLE
−
+
vin vbias VCC
−
ic (t) vc (t)
VCC
p(t)
0V
Since the voltage at the load is ideally a perfect sinusoid, the
voltage on the collectors is likewise sinusoidal.
The power dissipated by each transistor is thus the product of
a sine and a half sine as shown above.
η(V )
ssB 50%
cla
s A
clas
VCC
VCC
RF C
C∞
vo
vin RL
vbias
ic (t) vc (t)
VCC
0V
We see that the transistor is cut-off when the collector voltage
swings above VCC . Thus, the power dissipated during this
first half cycle is zero.
During the second cycle, the peak current occurs when the
collector voltage reaches zero.
1 Iout
Pout = VCC
2 2
1 Iout
2 VCC 2
PC = = 0.125
2VCC Iout
Same as Class A
Niknejad Advanced IC’s for Comm
Dynamic PA
Envelope
Cm
vo
vin Lm R0
Dynamic Bias
VCC
RF C
C∞
vo
vin RL
010
011 001
100 000 I 2 + Q 2 = A2
I
101 111
110
IDD
2y IDQ
2
2VCC sin y − y cos y
PDC ≈
RL 2y − sin 2y
2
VCC
Power to load (assuming VCC swing): PL = 2RL
Ideal Efficiency:
PL 1 2y − sin 2y
η= =
PDC 4 sin y − y cos y
lim η(y ) = 100% (ideal class C)
y →0
η(π) = 50% (tuned-circuit Class A)
η(π/2) = 78.5% (single-ended Class B)
For small conduction angle current pulses approach
delta-function.
Many practical issues make Class C difficult to design.
Niknejad Advanced IC’s for Comm
Power Capacity of Class C
0.4
Vdrain,max = 2VCC
0.3
Power Capability
= IDD (1 − cos y )
0.1
Po
PC =
2VCC IDD (1 − cos y )
0.0
0 50 100 150 200 250 300 350
1 2y − sin 2y
Conduction Angle =
4π 1 − cos y
The power capacity of Class C is low at low conduction
angles. Peak is Class AB.
3ω0
ω0 RL
ic (t) vc (t)
RF C
ℓ = λ0 /4
Z0
ω0 RL
S2
RL
S1
VDD
RL
0V
iL2 RL 2 V2 V2
PL = = 2 DD ≈ 0.2 DD
2 π RL RL
The drain current are half-sinusoid pulses. The average
current drawn from the supply is the average PMOS current
Ip 2 VDD
IQ = = 2
π π RL
2
2VDD
PDC = IQ · VDD = = PL
πRL
As we expected, the ideal efficiency is η = 100%
RL
VDC
+ +
vin −vin
− −
iout = Io sin(θ + φ)
From the above relation, it’s clear that the voltage and
current are in phase (φ = 0)
4nVDC 1
Io =
πRL 1 + n2 RRon
L
nIo
id1,DC = id2,DC =
π
The DC power consumed is therefore
8n2 VDC 1
PDC = VDC (id1,DC + id2,DC ) = 2
π RL 1 + n2 RRon
L
Pout 1
η= =
PDC 1 + n2 RRonL
1 1
Ron = ≈
gds gm,sat
gm 1
ωT = =
Cgs + Cgd Ron (Cgs + Cgd )
The total input power involves switching approximately
2Cgs + 2γCgs , where γ is a technology parameter relating the
drain-bulk capacitance to the gate-source cap. Take γ ∼ 1 for
an upper bound
2 2 2 1
Ploss = Ctot VDC f = 4Cgs VDC f = 4VDC f
ωT Ron
vdrain,max = 2VDD
idrain,max = nIo
Pout η
PC = = ≤ 0.159
2 · vdrain,max · idrain,max 2π
This compares favorably with Class A amplifiers.
RL
VDD
Amplitude
to PWM
RL
RF Pulse Train
Mixer PA Filter
Pulse-density
modulation process
Inherent linearity
Improved efficiency in power backoff, but ...