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    Punjab Technical University: B.Tech. (Sem. - 3) Computer Architecture

    Uploaded by

    sandeepapr
    This document contains a computer architecture exam with three sections. Section A contains 8 multiple choice questions. Section B contains 4 long answer questions about performance measures in hardware design, locality of reference, instruction pipelining, and micro-programmed control units. Section C contains 2 long answer questions about benchmarks for evaluating multiprocessor systems and Booth's multiplication algorithm, as well as short notes on superscalar machines and the 8255 chip. The exam is for a 3rd semester B.Tech. course in Computer Architecture with a maximum score of 60 marks over 3 hours.

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    Punjab Technical University: B.Tech. (Sem. - 3) Computer Architecture

    Uploaded by

    sandeepapr
    29 views2 pages
    This document contains a computer architecture exam with three sections. Section A contains 8 multiple choice questions. Section B contains 4 long answer questions about performance measures in hardware design, locality of reference, instruction pipelining, and micro-programmed control units. Section C contains 2 long answer questions about benchmarks for evaluating multiprocessor systems and Booth's multiplication algorithm, as well as short notes on superscalar machines and the 8255 chip. The exam is for a 3rd semester B.Tech. course in Computer Architecture with a maximum score of 60 marks over 3 hours.

    Original Description:

    PTU Computer Architecture Question Paper

    Original Title

    Dec 2011

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    This document contains a computer architecture exam with three sections. Section A contains 8 multiple choice questions. Section B contains 4 long answer questions about performance measures in hardware design, locality of reference, instruction pipelining, and micro-programmed control units. Section C contains 2 long answer questions about benchmarks for evaluating multiprocessor systems and Booth's multiplication algorithm, as well as short notes on superscalar machines and the 8255 chip. The exam is for a 3rd semester B.Tech. course in Computer Architecture with a maximum score of 60 marks over 3 hours.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    29 views2 pages

    Punjab Technical University: B.Tech. (Sem. - 3) Computer Architecture

    Uploaded by

    sandeepapr
    This document contains a computer architecture exam with three sections. Section A contains 8 multiple choice questions. Section B contains 4 long answer questions about performance measures in hardware design, locality of reference, instruction pipelining, and micro-programmed control units. Section C contains 2 long answer questions about benchmarks for evaluating multiprocessor systems and Booth's multiplication algorithm, as well as short notes on superscalar machines and the 8255 chip. The exam is for a 3rd semester B.Tech. course in Computer Architecture with a maximum score of 60 marks over 3 hours.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

     

    Roll No. ......................


    Total No. of Questions : 09] [Total No. of Pages : 02

    B.Tech. (Sem. – 3rd)


    COMPUTER ARCHITECTURE
    SUBJECT CODE : CS - 201
    Paper ID : [A0451]
    [Note : Please fill subject code and paper ID on OMR]
    Time : 03 Hours Maximum Marks : 60

    ity
    Instruction to Candidates:

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    1) Section - A is Compulsory.
    2) Attempt any Four questions from Section - B.

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    3) Attempt any Two questions from Section - C.

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    omSection - A

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    r.c
    Q1) (8 × 2.5 = 20)

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    a) What do you understand by floating point arithmetic?
    e

    al
    b) Differentiate between register and memory.
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    pa

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    c) What is pipelining? .c
    n

    d) How many clock cycles are required to process 100 tasks in five
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    segment pipeline?
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    ap
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    e) What is control memory?


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    f) List some properties of SIMD.


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    g) Differentiate between program interrupt and subroutine call.


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    h) What are the issues in computer design?


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    nj

    Section - B
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    (4 × 5 = 20)
    Q2) Discuss the importance of performance measure in computer hardware
    design. Also state the advantages and disadvantages of layers in
    architectural design.

    Q3) What do you understand by locality of reference? How is it helpful in


    improving the performance of memory? Discuss with example.

    J - 755  1 P.T.O.  
     
     

    Q4) What do you understand by instruction pipeline? Discuss the major


    difficulties that cause the instruction pipeline to deviate from its normal
    operation.

    Q5) Explain and show diagrammatically how address sequencing is done in


    micro-programmed control unit.

    ity
    Q6) What do you understand by I/O processors? Discuss the importance of it.

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    Section - C

    om iv
    om (2 × 10 = 20)

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    Q7) What are the benchmarks for evaluating the performance of a
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    multiprocessor system (MIMD)? Explain with example.
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    p

    Q8) Explain Booth’s multiplication algorithm with example.


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    r

    Q9) Write short notes on the following:


    er
    .b

    (a) Superscalar machines


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    (b) 8255 chip.


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    J - 755  2  

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