Figure 1. Traditional Interleaved Configuration Using A Flyback Topology
Figure 1. Traditional Interleaved Configuration Using A Flyback Topology
Figure 1. Traditional Interleaved Configuration Using A Flyback Topology
1 Introduction
Interleaved converters are widely used among power electronic applications. Such
configurations can be adopted for different reasons in view of the features and benefits of the
interleaved scheme. The two main advantages are :
Distribution of the power among several converters, thus allowing us to reduce the power
rating of the individual converters.
Ripple reduction at the input and/or output of the converter when phase shifted carriers
are used in the modulation, thus allowing reduction in the filters size.
Lian & Adam (2016) said Improvement in reliability is another among several advantages
of interleaved configurations, making it possible to operate under failure of an individual
converter thanks to the redundancy.
An additional advantage is the possibility of obtaining higher conversion ratio if input-
parallel output-series (IPOS) or input-series output-parallel (ISOP) schemes are adopted. On the
other hand, the main drawback is the increase in number of the power converters required in
interleaved configurations.
Srighakollapu, et. al (2016) and Zapata, et.al (2015) stated In this work, a partial power
DC-DC converter is proposed. It performs a step-up operation, and it is based on a Flyback
topology with a transformer turns ratio n1 = n2 in order to improve the input current performance.
However, the turns ratio can vary when higher voltage gains are required but it could reduce the
performance of the input current, leading into higher current ripples. Compared to a classical
DC-DC converter, the proposed topology performs similarly to the IPOS configuration, reducing
the current ripple at the input of the system and reducing the converter power rating. The
traditional IPOS interleaved converter scheme and main waveforms are given in Figure 1, for the
case of Flyback topology. This specific topology has been used in several application such as
two-stage photovoltaic (PV) inverters.
Figure 2. (a) Configuration of the partial power converter. (b) Proposed topology using a Flyback
converter.
Figure 3. Experimental test bench for the evaluation of the proposed converter.
Figure 4. Current measurements in the proposed converter. (a) Without the clamping circuit
and D = 0.48. (b) With the clamping circuit and D = 0.48.
Additional tests have been done to validate the operation of the proposed partial power
converter topology under different operating points. First, results are proposed operating the
converter with D = 0.63. Figure 5a gives the measured currents. Once again it can be observed
that the resulting input current iin is continuous as observed.
Figure 5. Current measurements. (a) With the clamping circuit and D = 0.63. (b) With the
clamping circuit and D = 0.28.
The behavior of the proposed topology has also been verified for duty cycles lower than
0.5. Figure 5b gives the currents of the converter operating with D = 0.28. As described in
Section 2.2, the proposed topology shows one of its major advantage in contrast to the traditional
IPOS configuration while the converter operates with a duty cycle lower than 0.5. Indeed, in
Figure 5b, it is verified that for a low duty cycle operation, the input current i in is continuous. On
the other hand, in the case of the traditional IPOS configuration made with Flyback converters,
the input current iin as represented in Figure 1 is discontinuous for duty cycle lower than 0.5.
Under constant solar irradiation the parameters evaluated are the voltage and current in the
system. The voltages are depicted in Figure 6a, where the P&O MPPT algorithm presents the
classical three levels. In traditional PV applications the voltage at the DC-link v dc is fixed by the
inverter, then due to the series connection of the PPC, the converter voltage v pc is the difference
between vdc and vpv.
Femia, et. al. (2005) stated The experimental results of the MPPT performance are
depicted in Figure 6b, where an irradiation change is made reducing the value around 50%. In
this proposed work the Perturb & Observe (P&O) algorithm is implemented due to the simple
implementation and effective tracking of the MPP. It is possible to note the constant output
voltage vdc, the current reduction at the input ipv and output side of the converter idc depending on
the irradiation change. Moreover, the PV voltage vpv varies until find the maximum power point,
where the typical three levels are depicted oscillating around the MPP.
Figure 6. Maximum Power Point Tracking (MPPT) performance in the Step-Up based PPC:
(a) under constant solar irradiation; (b) under a solar irradiation change.
In order to obtain the experimental efficiency, the power is calculated using the
modulated and sampled values of voltage and current. The measurements are taken from the
whole power conversion system (PPC configuration), and the isolated DC-DC converter used to
make the configuration (Flyback topology).
The experimental efficiency waveforms are depicted in Figure 7. The global conversion
efficiency of the DC-stage is obtained under different power and partial power ratios K pr. When
the converter is operating below Kpr 80% of the total power, the global conversion efficiency
varies between 70–90%, as depicted in Figure 7a. On the other hand, the conversion efficiency of
the DC-DC converter varies between 35–77%, as depicted in Figure 7b, where it is also possible
to note the experimental points obtained from measurements and the curve fitting. This can be
understood in the sense that the Flyback converter is handling a very low power, in comparison
for which it was designed. Moreover, the topology operates with a deep voltage gain as will be
explained.
Figure 7. Curve of experimental efficiency: (a) Total power conversion system. (b) Isolated
DC-DC converter in the Step-Up Flyback based PPC.
Moreover, as can be realized the DC-DC converter works as buck converter despite of the
step-up operation. It means that the topology operation does not define the operation of the PPC
configuration. For that reason, for this application it is important to select a topology with a
buck-boost operation in order to compensate the required converter voltage v pc. That is also a
motivation to use a Flyback instead of other topologies, so that with a turns ratio n 1 = n2 the
voltage gain is not limited because of the inherent buck-boost operation.
Laboratory prototypes are not optimized in their design in terms of efficiency for the power
rating in which they operate, particularly due to the fact that semiconductors and modules are
designed for full power operation. Consequently, it is expected that for commercial
developments, which are optimized in terms of efficiency for a particular power rating, improved
efficiencies can be obtained for the DC-DC converter stages, further improving the global system
efficiency. In addition, the main point of the contribution is to highlight the increment of the
efficiency achieved with the PPC configuration, despite of the lower efficiency of the Flyback
DC-DC converter used for the the construction of the PPC.
6.1 Conclusions
In this work, a partial power converter with interleaved current performance has been
proposed. The main feature of the converter consists to obtain, with a single PPC, the current
improvement obtained in a classical IPOS configuration of two converters. The proposed
topology has been validated in a Flyback-based 100 W laboratory prototype. The experimental
results validated the operation depicting a continuous current at the input of the converter, and
current ripple reduction around 30%. It is useful in PV applications because it allows a size
reduction of the input capacitor filter. In addition, the MPPT performance was also validated
under an irradiation change, by using the P&O algorithm. Finally, the tested experimental
prototype reaches higher conversion efficiencies compared with the isolated DC-DC converter
used to make the PPC configuration.
Future works will related to the evaluation of the IPOS configuration, working with
interleaved PPCs. In order to increase the voltage gain, it is necessary to reduce the power
processed by the converters even further, and to reduce the input current ripple.