M27C64A

64K (8K x 8) UV EPROM and OTP ROM

VERY FAST ACCESS TIME: 150ns

COMPATIBLE with HIGH SPEED
MICROPROCESSORS, ZERO WAIT STATE
LOW POWER CMOS CONSUMPTION:
Active Current 30mA
Standby Current 100A
PROGRAMMING VOLTAGE: 12.5V 28

ELECTRONIC SIGNATURE for AUTOMATED

PROGRAMMING 1

HIGH SPEED PROGRAMMING FDIP28W (F) PLCC32 (C)

(less than 1 minute)

DESCRIPTION
The M27C64A is a high speed 65,536 bit UV eras-
able and electrically programmable memory Figure 1. Logic Diagram
EPROM ideally suited for microprocessor systems
requiring large programs. It is organized as 8,192
by 8 bits.
The 28 pin Window Ceramic Frit-Seal Dual-in-Line
package has transparent lid which allows the user
to expose the chip to ultraviolet light to erase the
bit pattern. Anew pattern can then be written to the VCC VPP
device by following the programming procedure.
For applications where the content is programmed
only on time and erasure is not required, the 13 8
M27C64A is offered in Plastic Leaded Chip Carrier
A0-A12 Q0-Q7
package.

P M27C64A
Table 1. Signal Names E
A0 - A12 Address Inputs
G
Q0 - Q7 Data Outputs

E Chip Enable

G Output Enable VSS

AI00834B
P Program

VPP Program Supply

VCC Supply Voltage

VSS Ground

March 1995 1/11

M27C64A

Figure 2A. DIP Pin Connections Figure 2B. LCC Pin Connections

VCC
VPP
A12
VPP 1 28 VCC

DU

NC
A7

P
A12 2 27 P
A7 3 26 NC 1 32
A6 A8
A6 4 25 A8
A5 5 24 A9 A5 A9
A4 6 23 A11 A4 A11
A3 NC
A3 7 22 G
M27C64A A2 9 M27C64A 25 G
A2 8 21 A10
A1 9 20 E A1 A10
A0 10 19 Q7 A0 E
NC Q7
Q0 11 18 Q6
Q1 12 17 Q5 Q0 Q6
17
Q2 13 16 Q4

Q1
Q2
VSS

Q3
Q4
Q5
DU
VSS 14 15 Q3
AI00835
AI00836

Warning: NC = Not Connected Warning: NC = Not Connected, DU = Dont Use

Table 2. Absolute Maximum Ratings (1)

Symbol Parameter Value Unit

TA Ambient Operating Temperature 40 to 125 C

TBIAS Temperature Under Bias 50 to 125 C

TSTG Storage Temperature 65 to 150 C

VIO (2) Input or Output Voltages (except A9) 2 to 7 V

VCC Supply Voltage 2 to 7 V

VA9 (2) A9 Voltage 2 to 13.5 V

VPP Program Supply Voltage 2 to 14 V

Notes: 1. Except for the rating Operating Temperature Range, stresses above those listed in the Table Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.

DEVICE OPERATION Read Mode

The modes of operation of the M27C64A are listed The M27C64A has two control functions, both of
in the Operating Modes table. A single 5V power which must be logically active in order to obtain
supply is required in the read mode. All inputs are data at the outputs. Chip Enable (E) is the power
TTL levels except for VPP and 12V on A9 for Elec- control and should be used for device selection.
tronic Signature. Output Enable (G) is the output control and should

2/11
 M27C64A

be used to gate data to the output pins, inde- control bus. This ensures that all deselected mem-
pendent of device selection. Assuming that the ory devices are in their low power standby mode
addresses are stable, the address access time and that the output pins are only active when data
(tAVQV) isequal to the delay from E to output (tELQV). is required from a particular memory device.
Data is available at the output after a delay of tGLQV
from the falling edge of G, assuming that E has System Considerations
been low and the addresses have been stable for The power switching characteristics of Advanced
at least tAVQV-tGLQV. CMOS EPROMs require careful decoupling of the
Standby Mode devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
The M27C64A has a standby mode which reduces the standby current level, the active current level,
the active current from 30mA to 100A. The and transient current peaks that are produced by
M27C64A is placed in the standby mode by apply- the falling and rising edges of E. The magnitude of
ing a CMOS high signal to the E input. When in the the transient current peaks is dependent on the
standby mode, the outputs are in a high impedance capacitive and inductive loadingof the device at the
state, independent of the G input. output.
Two Line Output Control
The associated transient voltage peaks can be
Because EPROMs are usually used in larger mem- suppressed by complying with the two line output
ory arrays, this product features a 2 line control control and by properly selected decoupling ca-
function which accommodates the use of multiple pacitors. It is recommended that a 0.1F ceramic
memory connection. The two line control function capacitor be used on every device between VCC
allows: and VSS. This should be a high frequency capacitor
a. the lowest possible memory power dissipation, of low inherent inductance and should be placed
as close to the device as possible. In addition, a
b. complete assurance that output bus contention 4.7F bulk electrolytic capacitor should be used
will not occur. between VCC and VSS for every eight devices. The
For the most efficient use of these two control lines, bulk capacitor should be located near the power
E should be decoded and used as the primary supply connection point. The purpose of the bulk
device selecting function, while G should be made capacitor is to overcome the voltage drop caused
a common connection to all devices in the array by the inductive effects of PCB traces.
and connected to the READ line from the system

Table 3. Operating Modes

Mode E G P A9 VPP Q0 - Q7
Read VIL VIL VIH X VCC Data Out
Output Disable VIL VIH VIH X VCC Hi-Z
Program VIL VIH VIL Pulse X VPP Data In
Verify VIL VIL VIH X VPP Data Out
Program Inhibit VIH X X X VPP Hi-Z
Standby VIH X X X VCC Hi-Z
Electronic Signature VIL VIL VIH VID VCC Codes
Note: X = VIH or VIL, VID = 12V 0.5V

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturers Code VIL 1 0 0 1 1 0 1 1 9Bh
Device Code VIH 0 0 0 0 1 0 0 0 08h

3/11
M27C64A

AC MEASUREMENT CONDITIONS Figure 4. AC Testing Load Circuit

Input Rise and Fall Times 20ns
1.3V
Input Pulse Voltages 0.4 to 2.4V
Input and Output Timing Ref. Voltages 0.8 to 2.0V
1N914
Note that Output Hi-Z is defined as the point where data
is no longer driven.
3.3k
Figure 3. AC Testing Input Output Waveforms
DEVICE
UNDER OUT
2.4V TEST
2.0V CL = 100pF

0.8V
0.4V

AI00826 CL includes JIG capacitance

AI00828

Table 5. Capacitance (1) (TA = 25 C, f = 1 MHz )

Symbol Parameter Test Condition Min Max Unit

C IN Input Capacitance VIN = 0V 6 pF
C OUT Output Capacitance VOUT = 0V 12 pF
Note: 1. Sampled only, not 100% tested.

Figure 5. Read Mode AC Waveforms

A0-A12 VALID

tAVQV tAXQX

tEHQZ
tGLQV

tELQV tGHQZ

Hi-Z
Q0-Q7 DATA OUT

AI00778

4/11
 M27C64A

Table 6. Read Mode DC Characteristics (1)

(TA = 0 to 70 C or 40 to 85 C: VCC = 5V 10%; VPP = VCC)

Symbol Parameter Test Condition Min Max Unit

ILI Input Leakage Current 0V VIN VCC 10 A

ILO Output Leakage Current 0V VOUT VCC 10 A

E = VIL, G = VIL,
ICC Supply Current 30 mA
IOUT = 0mA, f = 5MHz

ICC1 Supply Current (Standby) TTL E = VIH 1 mA

ICC2 Supply Current (Standby) CMOS E > VCC 0.2V 100 A

IPP Program Current VPP = VCC 100 A

VIL Input Low Voltage 0.3 0.8 V

(2)
VIH Input High Voltage 2 VCC + 1 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

Output High Voltage TTL IOH = 400A 2.4 V

VOH
Output High Voltage CMOS IOH = 100A VCC 0.7V V
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.

Table 7. Read Mode AC Characteristics (1)

(TA = 0 to 70 C or 40 to 85 C: VCC = 5V 10%; VPP = VCC)
M27C64A
Symbol Alt Parameter Test Condition -15 -20 -25 -30 Unit

Min Max Min Max Min Max Min Max

Address Valid to
tAVQV tACC E = VIL, G = VIL 150 200 250 300 ns
Output Valid
Chip Enable Low to
tELQV tCE G = VIL 150 200 250 300 ns
Output Valid
Output Enable Low
tGLQV tOE E = VIL 75 80 100 120 ns
to Output Valid
Chip Enable High to
tEHQZ (2) tDF G = VIL 0 50 0 50 0 60 0 105 ns
Output Hi-Z
(2) Output Enable High
tGHQZ tDF E = VIL 0 50 0 50 0 60 0 105 ns
to Output Hi-Z
Address Transition to
tAXQX tOH E = VIL, G = VIL 0 0 0 0 ns
Output Transition
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. Sampled only, not 100% tested.

5/11
M27C64A

Table 8. Programming Mode DC Characteristics (1)

(TA = 25 C; VCC = 6V 0.25V; VPP = 12.5V 0.3V)
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current VIL VIN VIH 10 A
ICC Supply Current 30 mA
IPP Program Current E = VIL 30 mA

VIL Input Low Voltage 0.3 0.8 V

VIH Input High Voltage 2 VCC + 0.5 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output High Voltage TTL IOH = 400A 2.4 V

VID A9 Voltage 11.5 12.5 V

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Table 9. Programming Mode AC Characteristics (1)

(TA = 25 C; VCC = 6V 0.25V; VPP = 12.5V 0.3V)
Symbol Alt Parameter Test Condition Min Max Unit
tAVPL tAS Address Valid to Program Low 2 s
tQVPL tDS Input Valid to Program Low 2 s
tVPHPL tVPS VPP High to Program Low 2 s
tVCHPL tVCS VCC High to Program Low 2 s
Chip Enable Low to
tELPL tCES 2 s
Program Low
Program Pulse Width (Initial) 0.95 1.05 ms
tPLPH tPW
Program Pulse Width (Over
2.85 78.75 ms
Program)
Program High to Input
tPHQX tDH 2 s
Transition
Input Transition to Output
tQXGL tOES 2 s
Enable Low
Output Enable Low to
tGLQV tOE 100 ns
Output Valid
(2) Output Enable High to
tGHQZ tDFP 0 130 ns
Output Hi-Z
Output Enable High to
tGHAX tAH 0 ns
Address Transition
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.

6/11
 M27C64A

Figure 6. Programming and Verify Modes AC Waveforms

A0-A12 VALID

tAVPL

Q0-Q7 DATA IN DATA OUT

tQVPL tPHQX

VPP

tVPHPL tGLQV tGHQZ

VCC

tVCHPL tGHAX

tELPL

P
tPLPH tQXGL

PROGRAM VERIFY
AI00779

Figure 7. Programming Flowchart Programming

When delivered (and after each erasure for UV
EPROM), all bits of the M27C64A are in the 1
VCC = 6V, VPP = 12.5V state. Data is introduced by selectively program-
ming 0s into the desired bit locations. Although
only 0s will be programmed, both 1s and 0s
n =1 can be present in the data word. The only way to
change a 0 to a 1 is by die exposition to ultra-
P = 1ms Pulse violet light (UV EPROM). The M27C64A is in the
programming mode when Vpp input is at 12.5V, and
NO E and P are at TTL-low. The data to be programmed
NO is applied 8 bits in parallel to the data output pins.
++n
> 25 VERIFY ++ Addr The levels required for the address and data inputs
are TTL. VCC is specified to be 6V 0.25V.
YES YES
High Speed Programming
P = 3ms Pulse by n The high speed programming algorithm, described
FAIL in the flowchart, rapidly programs the M27C64A
using an efficient and reliable method, particularly
Last NO suited to the production programming environ-
Addr
ment. An individual device will take around1 minute
YES to program.
CHECK ALL BYTES
Program Inhibit
1st: VCC = 6V Programming of multiple M27C64A in parallel with
2nd: VCC = 4.2V different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
AI01167
M27C64A may be common. A TTL low level pulse
applied to a M27C64A E input, with P low and VPP

7/11
M27C64A

DEVICE OPERATIONS (contd) the SGS-THOMSON M27C64A, these two identi-

fier bytes are given in Table 4 and can be read-out
at 12.5V, will program that M27C64A. A high level on outputs Q0 to Q7.
E input inhibits the other M27C64A from being
programmed. ERASURE OPERATION (applies to UV EPROM)
Program Verify The erasure characteristics of the M27C64A is
such that erasure begins when the cells are ex-
A verify (read) should be performed on the pro- posed to light with wavelengths shorter than ap-
grammed bits to determine that they were correctly proximately 4000 . It should be noted that sunlight
programmed. The verify is accomplished with E and some type of fluorescent lamps have wave-
and G at VIL, P at VIH, VPP at 12.5V and VCC at 6V. lengths in the 3000-4000 range. Research
Electronic Signature shows that constant exposure to room level fluo-
The Electronic Signature mode allows the reading rescent lighting could erase a typical M27C64A in
out of a binary code from an EPROM that will about 3 years, while it would take approximately 1
identify its manufacturer and type. This mode is week to cause erasure when exposed to direct
intended for use by programming equipment to sunlight. If the M27C64A is to be exposed to these
automatically match the device to be programmed types of lighting conditions for extended periods of
with its corresponding programming algorithm. time, it is suggested that opaque labels be put over
This mode is functional in the 25C 5C ambient the M27C64Awindow to prevent unintentional era-
temperature range that is required when program- sure. The recommended erasure procedure for
ming the M27C64A. To activate this mode, the the M27C64A is exposure to short wave ultraviolet
programming equipmentmust force11.5V to 12.5V light which has a wavelength of 2537 . The inte-
on address line A9 of the M27C64A, with grated dose (i.e. UV intensity x exposure time) for
VPP=VCC=5V. Two identifier bytes may then be erasure should be a minimum of 15 W-sec/cm2.
sequenced from the device outputs by toggling The erasure time with this dosage is approximately
address line A0 from VIL to VIH. All other address 15 to 20 minutes using an ultraviolet lamp with
lines must be held at VIL during Electronic Signa- 12000 uW/cm2 powerrating. The M27C64A should
ture mode. be placed within 2.5 cm (1 inch) of the lamp tubes
during the erasure. Some lamps have a filter on
Byte 0 (A0=VIL ) represents the manufacturer code their tubeswhich should be removed beforeerasure.
and byte 1 (A0=VIH) the device identifier code. For

ORDERING INFORMATION SCHEME

Example: M27C64A -15 F 1 TR

Speed Package Temperature Range Option

-15 150 ns F FDIP28W 1 0 to 70 C X Additional
Burn-in
-20 200 ns C PLCC32 6 40 to 85 C
Tape & Reel
-25 250 ns TR
Packing
-30 300 ns

For a list of available options (Speed, Package, etc...) refer to the current Memory Shortform catalogue.
For further information on any aspect of this device, please contact SGS-THOMSON Sales Office nearest
to you.

8/11
 M27C64A

FDIP28W - 28 pin Ceramic Frit-seal DIP, with window

mm inches
Symb
Typ Min Max Typ Min Max
A 5.71 0.225
A1 0.50 1.78 0.020 0.070
A2 3.90 5.08 0.154 0.200
B 0.40 0.55 0.016 0.022
B1 1.17 1.42 0.046 0.056
C 0.22 0.31 0.009 0.012
D 38.10 1.500
E 15.40 15.80 0.606 0.622
E1 13.05 13.36 0.514 0.526
e1 2.54 0.100
e3 33.02 1.300
eA 16.17 18.32 0.637 0.721
L 3.18 4.10 0.125 0.161
S 1.52 2.49 0.060 0.098
7.11 0.280
4 15 4 15
N 28 28
FDIP28W

A2 A

A1 L
B1 B e1 C
eA
e3

D
S
N

E1 E

1
FDIPW-a

Drawing is no to scale

9/11
M27C64A

PLCC32 - 32 lead Plastic Leaded Chip Carrier - rectangular

mm inches
Symb
Typ Min Max Typ Min Max
A 2.54 3.56 0.100 0.140

A1 1.52 2.41 0.060 0.095

B 0.33 0.53 0.013 0.021

B1 0.66 0.81 0.026 0.032

D 12.32 12.57 0.485 0.495

D1 11.35 11.56 0.447 0.455

D2 9.91 10.92 0.390 0.430
E 14.86 15.11 0.585 0.595
E1 13.89 14.10 0.547 0.555
E2 12.45 13.46 0.490 0.530
e 1.27 0.050
N 32 32
Nd 7 7
Ne 9 9
CP 0.10 0.004
PLCC32

D
D1 A1

1 N
B1

e
Ne E1 E D2/E2
B

Nd A

PLCC CP

Drawing is no to scale

10/11
 M27C64A

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.

1995 SGS-THOMSON Microelectronics - All Rights Reserved

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

11/11
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