AT27C020

Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
– 100 µA max. Standby
– 25 mA max. Active at 5 MHz
• JEDEC Standard Packages
– 32-Lead 600-mil PDIP
– 32-Lead PLCC
– 32-Lead TSOP
• 5V ± 10% Supply
• High-Reliability CMOS Technology
– 2,000V ESD Protection
2-Megabit
•
– 200 mA Latchup Immunity
Rapid™ Programming Algorithm - 100 µs/byte (typical)
(256K x 8)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code OTP EPROM
• Commercial and Industrial Temperature Ranges

Description AT27C020
The AT27C020 is a low-power, high performance 2,097,152-bit one-time programma-
ble read only memory (OTP EPROM) organized as 256K by 8 bits. It requires only
one 5V power supply in normal read mode operation. Any byte can be accessed in
less than 55 ns, eliminating the need for speed reducing WAIT states on high perfor-
mance microprocessor systems.
In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current
is typically less than 10 µA.
PLCC Top View
Pin Configurations
PGM
VCC
VPP
A12
A15
A16

A17

Pin Name Function

4
3
2
1
32
31
30

A7 5 29 A14
A0 - A17 Addresses A6 6 28 A13
A5 7 27 A8
O0 - O7 Outputs A4 8 26 A9
A3 9 25 A11
CE Chip Enable A2 10 24 OE
A1 11 23 A10
A0 12 22 CE
OE Output Enable
O0 13 21 07
14
15
16
17
18
19
20

PGM Program Strobe

01
02
GND
03
04
05
06

TSOP Top View

PDIP Top View Type 1
VPP 1 32 VCC
A16 2 31 PGM A11 1 32 OE
A15 3 30 A17 A9 2 31 A10
A12 4 29 A14 A8 3 30 CE
A13 4 29 07
A7 5 28 A13
A14 5 28 06
A6 6 27 A8
A17 6 27 05
A5 7 26 A9
PGM 7 26 04
A4 8 25 A11
VCC 8 25 03
A3 9 24 OE VPP 9 24 GND
A2 10 23 A10 A16 10 23 02
A1 11 22 CE A15 11 22 01
A0 12 21 07 A12 12 21 O0
O0 13 20 06 A7 13 20 A0
O1 14 19 05 A6 14 19 A1 Rev. 0570C-B–12/97
O2 15 18 04 A5 15 18 A2
GND 16 17 03 A4 16 17 A3

1
The AT27C020 is available in a choice of industry standard System Considerations
JEDEC-approved one-time programmable (OTP) plastic
Switching between active and standby conditions via the
PDIP, PLCC, and TSOP packages. All devices feature two-
Chip Enable pin may produce transient voltage excursions.
line control (CE, OE) to give designers the flexibility to pre-
Unless accommodated by the system design, these tran-
vent bus contention.
sients may exceed data sheet limits, resulting in device
With 256K byte storage capability, the AT27C020 allows non-conformance. At a minimum, a 0.1 µF high frequency,
firmware to be stored reliably and to be accessed by the low inherent inductance, ceramic capacitor should be uti-
system without the delays of mass storage media. lized for each device. This capacitor should be connected
Atmel’s 27C020 have additional features to ensure high between the V CC and Ground terminals of the device, as
quality and efficient production use. The Rapid™ Program- close to the device as possible. Additionally, to stabilize the
ming Algorithm reduces the time required to program the supply voltage level on printed circuit boards with large
part and guarantees reliable programming. Programming EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
time is typically only 100 µs/byte. The Integrated Product be utilized, again connected between the VCC and Ground
Identification Code electronically identifies the device and terminals. This capacitor should be positioned as close as
manufacturer. This feature is used by industry standard possible to the point where the power supply is connected
programming equipment to select the proper programming to the array.
algorithms and voltages.

Block Diagram

2 AT27C020
 AT27C020

Absolute Maximum Ratings*

Temperature Under Bias.......................-55°C to +125°C *NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
Storage Temperature............................-65°C to +150°C damage to the device. This is a stress rating
only and functional operation of the device at
Voltage on Any Pin with these or any other conditions beyond those
Respect to Ground ............................... -2.0V to +7.0V(1) indicated in the operational sections of this
specification is not implied. Exposure to abso-
Voltage on A9 with lute maximum rating conditions for extended
periods may affect device reliability.
Respect to Ground ............................ -2.0V to +14.0V(1)
Note: 1. Minimum voltage is -0.6V DC which may
undershoot to -2.0V for pulses of less than 20
VPP Supply Voltage with ns. Maximum output pin voltage is VCC +
Respect to Ground ............................. -2.0V to +14.0V(1) 0.75V DC which may overshoot to +7.0V for
pulses of less than 20 ns.

Operating Modes
Mode/Pin CE OE PGM Ai VPP Outputs
Read VIL VIL X(1) Ai X DOUT
Output Disable X VIH X X X High Z
Standby VIH X X X X High Z
(2)
Rapid Program VIL VIH VIL Ai VPP DIN
PGM Verify VIL VIL VIH Ai VPP DOUT
PGM Inhibit VIH X X X VPP High Z
A9 = VH(3)
(4)
Product Identification VIL VIL X A0 = VIH or VIL X Identification Code
A1 - A17 = VIL
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.

3
DC and AC Operating Conditions for Read Operation
AT27C020
-55 -70 -90 -12 -15

Operating Temperature Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C
(Case) Ind. -40°C - 85C -40°C - 85C -40°C - 85C -40°C - 85C -40°C - 85C
VCC Power Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%

DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units
ILI Input Load Current VIN = 0V to VCC (Com., Ind.) ±1.0 µA
ILO Output Leakage Current VOUT = 0V to VCC (Com., Ind.) ±5.0 µA
IPP (2)
VPP (1)
Read/Standby Current VPP = VCC ±10 µA
ISB1 (CMOS), CE = VCC ± 0.3V 100 µA
ISB VCC(1) Standby Current
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1.0 mA
ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 25 mA
VIL Input Low Voltage -0.6 0.8 V
VIH Input High Voltage 2.0 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP.

AC Characteristics for Read Operation

AT27C020

-55 -70 -90 -12 -15

Symbol Parameter Condition Min Max Min Max Min Max Min Max Min Max Units
CE = OE
tACC(3) Address to Output Delay 55 70 90 120 150 ns
= VIL
tCE(2) CE to Output Delay OE = VIL 55 70 90 120 150 ns
tOE(2)(3) OE to Output Delay CE = VIL 20 30 35 35 40 ns
OE or CE High
tDF(4)(5) to Output Float, 18 20 20 30 40 ns
whichever occurred first
Output Hold
from Address, CE
tOH or OE,whichever 7 7 0 0 0 ns
occurred first
Note: 1. 2, 3, 4, 5. See AC Waveforms for Read Operation diagram.

4 AT27C020
 AT27C020

AC Waveforms for Read Operation(1)

Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.

Input Test Waveforms and Measurement Levels Output Test Load (1)
For -55 devices only:
3.0V
AC AC
DRIVING 1.5V MEASUREMENT
LEVELS LEVEL
0.0V
tR, tF < 5 ns (10% to 90%)

For -70,-90,-12,-15 devices only: Note: 1. CL = 100 pF including jig

capacitance except -55
devices where CL = 30 pF.

tR, tF < 20 ns (10% to 90%)

Pin Capacitance
f = 1 MHz, T = 25°C(1)
Typ Max Units Conditions
CIN 4 8 pF VIN = 0V
COUT 8 12 pF VOUT = 0V
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

5
Programming Waveforms (1)

Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients.

DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol Parameter Test Conditions Min Max Units
ILI Input Load Current VIN = VIL, VIH ±10 µA

VIL Input Low Level -0.6 0.8 V

VIH Input High Level 2.0 VCC + 1.0 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
ICC2 VCC Supply Current (Program and Verify) 40 mA
IPP2 VPP Supply Current CE = PGM = VIL 20 mA
VID A9 Product Identification Voltage 11.5 12.5 V

6 AT27C020
 AT27C020

AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V,VPP = 13.0 ± 0.25V
Limits
Symbol Parameter Test Condition (1) Min Max Units
tAS Address Setup Time 2 µs
tCES CE Setup Time 2 µs
tOES OE Setup Time Input Rise and Fall Times: 2 µs
tDS Data Setup Time (10% to 90%) 20 ns. 2 µs
tAH Address Hold Time 0 µs
Input Pulse Levels:
tDH Data Hold Time 0.45V to 2.4V 2 µs
(2)
tDFP OE High to Output Float Delay 0 130 ns
Input Timing Reference Level:
tVPS VPP Setup Time 0.8V to 2.0V 2 µs
tVCS VCC Set up Time 2 µs
Output Timing Reference Level:
tPW PGM Program Pulse Width(3) 95 105 µs
0.8V to 2.0V
tOE Data Valid from OE 150 ns
VPP Pulse Rise Time During
tPRT 50 ns
Programming
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
— see timing diagram.
3. Program Pulse width tolerance is 100 µs ± 5%.

Atmel’s 27C020 Integrated Product Identification Code

Pins
Codes A0 O7 O6 O5 O4 O3 O2 O1 O0 Hex Data
Manufacturer 0 0 0 0 1 1 1 1 0 1E
Device Type 1 1 0 0 0 0 1 1 0 86

7
Rapid Programming Algorithm
A 100 µs PGM pulse width is used to program. The
address is set to the first location. VCC is raised to 6.5V and
VPP is raised to 13.0V. Each address is first programmed
with one 100 µs PGM pulse without verification. Then a
verification / reprogramming loop is executed for each
address. In the event a byte fails to pass verification, up to
10 successive 100 µs pulses are applied with a verification
after each pulse. If the byte fails to verify after 10 pulses
have been applied, the part is considered failed. After the
byte verifies properly, the next address is selected until all
have been checked. VPP is then lowered to 5.0V and VCC to
5.0V. All bytes are read again and compared with the origi-
nal data to determine if the device passes or fails.

8 AT27C020
 AT27C020

Ordering Information
tACC ICC (mA)
(ns) Active Standby Ordering Code Package Operation Range

55 25 0.1 AT27C020-55JC 32J Commercial

AT27C020-55PC 32P6 (0°C to 70°C)
AT27C020-55TC 32T
25 0.1 AT27C020-55JI 32J Industrial
AT27C020-55PI 32P6 (-40°C to 85°C)
AT27C020-55TI 32T
70 25 0.1 AT27C020-70JC 32J Commercial
AT27C020-70PC 32P6 (0°C to 70°C)
AT27C020-70TC 32T
25 0.1 AT27C020-70JI 32J Industrial
AT27C020-70PI 32P6 (-40°C to 85°C)
AT27C020-70TI 32T
90 25 0.1 AT27C020-90JC 32J Commercial
AT27C020-90PC 32P6 (0°C to 70°C)
AT27C020-90TC 32T
25 0.1 AT27C020-90JI 32J Industrial
AT27C020-90PI 32P6 (-40°C to 85°C)
AT27C020-90TI 32T
120 25 0.1 AT27C020-12JC 32J Commercial
AT27C020-12PC 32P6 (0°C to 70°C)
AT27C020-12TC 32T
25 0.1 AT27C020-12JI 32J Industrial
AT27C020-12PI 32P6 (-40°C to 85°C)
AT27C020-12TI 32T
150 25 0.1 AT27C020-15JC 32J Commercial
AT27C020-15PC 32P6 (0°C to 70°C)
AT27C020-15TC 32T
25 0.1 AT27C020-15JI 32J Industrial
AT27C020-15PI 32P6 (-40°C to 85°C)
AT27C020-15TI 32T

Package Type
32J 32-Lead,Plastic J-Leaded Chip Carrier (PLCC)
32P6 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32T 32-Lead, Plastic Thin Small Outline Package (TSOP)