8K Microwire Compatible Serial EEPROM: 93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

93AA76A/B/C, 93LC76A/B/C,
93C76A/B/C
8K Microwire Compatible Serial EEPROM
Device Selection Table
Part Number
VCC Range
ORG Pin
PE Pin
Word Size
Temp Ranges
Packages
93AA76A
1.8-5.5
No
No
8-bit
OT
93AA76B
1.8-5-5
No
No
16-bit
OT
93LC76A
2.5-5.5
No
No
8-bit
I, E
OT
93LC76B
2.5-5.5
No
No
16-bit
I, E
OT
93C76A
4.5-5.5
No
No
8-bit
I, E
OT
93C76B
4.5-5.5
No
No
16-bit
I, E
OT
93AA76C
1.8-5.5
Yes
Yes
8 or 16-bit
P, SN, ST, MS
93LC76C
2.5-5.5
Yes
Yes
8 or 16-bit
I, E
P, SN, ST, MS
93C76C
4.5-5.5
Yes
Yes
8 or 16-bit
I, E
P, SN, ST, MS
Features
Description
The Microchip Technology Inc. 93XX76A/B/C devices

are 8K bit, low-voltage, serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93XX76C are dependent upon external logic
levels driving the ORG pin to set word size. For
dedicated 8-bit communication, the 93XX76A devices
are available, while the 93XX76B devices provide
dedicated 16-bit communication, available on SOT-23
devices only. A Program Enable (PE) pin allows the
user to write-protect the entire memory array.
Advanced CMOS technology makes these devices
ideal for low-power, nonvolatile memory applications.
The 93XX Series is available in standard packages
including 8-lead PDIP and SOIC, and advanced
packaging including 8-lead MSOP, 6-lead SOT-23,
and 8-lead TSSOP. Pb-free (Pure Matte Sn) finish is
also available.
Low-power CMOS technology

ORG pin to select word size for 76C version
1024 x 8-bit organization A devices (no ORG)
512 x 16-bit organization B devices (no ORG)
Program Enable pin to write-protect the entire
array (except on SOT-23 packages)
Self-timed ERASE/WRITE cycles (including
auto-erase)
Automatic ERAL before WRAL
Power-on/off data protection circuitry
Industry standard 3-wire serial I/O
Device Status signal (READY/BUSY)
Sequential READ function
1,000,000 E/W cycles
Data retention > 200 years
Temperature ranges supported:
- Industrial (I)
-40C to +85C
- Automotive (E)
-40C to +125C
Pin Function Table

Name
Function
CS
Chip Select
CLK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
VSS
Ground
PE
Program Enable
ORG
Memory Configuration
VCC
Power Supply
2004 Microchip Technology Inc.
Package Types (not to scale)

SOT-23
PDIP/SOIC
(OT)
(P, SN)
CS
CLK
1
2
8
7
VCC
PE
DI
ORG
DO
VSS
DO
VCC
VSS
CS
DI
CLK
TSSOP/MSOP
(ST, MS)
CS
CLK
DI
DO
1
2
3
4
8
7
6
5
VCC
PE
ORG
VSS
DS21796D-page 1
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings ()

VCC .............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65C to +150C
Ambient temperature with power applied ................................................................................................-40C to +125C
ESD protection on all pins ...................................................................................................................................................... 4 kV
NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
All parameters apply over the specified

ranges unless otherwise noted.
Param.
Symbol
No.
Parameter
VCC = 1.8V to 5.5V

Industrial (I):
TA = -40C to +85C
Automotive (E): TA = -40C to +125C
Min
Typ
Max
Units
Conditions
D1
VIH1
VIH2
High-level input voltage
2.0
0.7 VCC
VCC +1
VCC +1
V
V
VCC 2.7V
VCC < 2.7V
D2
VIL1
VIL2
Low-level input voltage
-0.3
-0.3
0.8
0.2 VCC
V
V
VCC 2.7V
VCC < 2.7V
D3
VOL1
VOL2
Low-level output voltage
0.4
0.2
V
V
IOL = 2.1 mA, VCC = 4.5V

IOL = 100 A, VCC = 2.5V
D4
VOH1
VOH2
High-level output voltage
2.4
VCC - 0.2
V
V
IOH = -400 A, VCC = 4.5V

IOH = -100 A, VCC = 2.5V
D5
ILI
Input leakage current
VIN = VSS to VCC
D6
ILO
Output leakage current
VOUT = VSS to VCC
D7
CIN,
COUT
Pin capacitance (all inputs/

outputs)
pF
VIN/VOUT = 0V (Note 1)
TA = 25C, FCLK = 1 MHz
D8
ICC write Write current
500
mA
A
FCLK = 3 MHz, VCC = 5.5V

D9
ICC read Read current
100
1
500
mA
A
A

D10
ICCS
Standby current
1
5
A
A
I Temp
E Temp
CLK = Cs = 0V
ORG = DI = VSS or VCC
(Note 2) (Note 3)
D11
VPOR
VCC voltage detect

93AA76A/B/C, 93LC76A/B/C
93C76A/B/C
1.5V
3.8V
V
V
(Note 1)
Note 1:
2:
3:
This parameter is periodically sampled and not 100% tested.

ORG pin not available on A or B versions.
READY/BUSY status must be cleared from DO, see Section 3.4 Data Out (DO).
DS21796D-page 2
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

TABLE 1-2:
AC CHARACTERISTICS
All parameters apply over the specified

ranges unless otherwise noted.
Param.
Symbol
No.
Parameter
VCC = 1.8V to 5.5V

Industrial (I):
TA = -40C to +85C
Automotive (E): TA = -40C to +125C
Min
Max
Units
Conditions
A1
FCLK
Clock frequency
3
2
1
MHz
MHz
MHz
4.5V VCC < 5.5V

2.5V VCC < 4.5V
1.8V VCC < 2.5V
A2
TCKH
Clock high time
200
250
450
ns
ns
ns
4.5V VCC < 5.5V

2.5V VCC < 4.5V
1.8V VCC < 2.5V
A3
TCKL
Clock low time
100
200
450
ns
ns
ns
4.5V VCC < 5.5V

2.5V VCC < 4.5V
1.8V VCC < 2.5V
A4
TCSS
Chip Select setup time
50
100
250
ns
ns
ns
4.5V VCC < 5.5V

2.5V VCC < 4.5V
1.8V VCC < 2.5V
A5
TCSH
Chip Select hold time
ns
1.8V VCC < 5.5V
A6
TCSL
Chip Select low time
250
ns
1.8V VCC < 5.5V
A7
TDIS
Data input setup time
50
100
250
ns
ns
ns
4.5V VCC < 5.5V

2.5V VCC < 4.5V
1.8V VCC < 2.5V
A8
TDIH
Data input hold time
50
100
250
ns
ns
ns
4.5V VCC < 5.5V

2.5V VCC < 4.5V
1.8V VCC < 2.5V
A9
TPD
Data output delay time
100
250
400
ns
ns
ns
4.5V VCC < 5.5V, CL = 100 pF

2.5V VCC < 4.5V, CL = 100 pF
1.8V VCC < 2.5V, CL = 100 pF
A10
TCZ
Data output disable time
100
200
ns
ns
4.5V VCC < 5.5V, (Note 1)

1.8V VCC < 4.5V, (Note 1)
A11
TSV
Status valid time
200
300
500
ns
ns
ns
4.5V VCC < 5.5V, CL = 100 pF

2.5V VCC < 4.5V, CL = 100 pF
1.8V VCC < 2.5V, CL = 100 pF
A12
TWC
Program cycle time
ms
Erase/Write mode (AA and LC

versions)
A13
TWC
ms
Erase/Write mode
(93C versions)
A14
TEC
ms
ERAL mode, 4.5V VCC 5.5V
A15
TWL
15
ms
WRAL mode, 4.5V VCC 5.5V
A16
1M
Note 1:
2:
Endurance
cycles 25C, VCC = 5.0V, (Note 2)
This parameter is periodically sampled and not 100% tested.

This application is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model which may be obtained from
www.microchip.com.
DS21796D-page 3
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

FIGURE 1-1:
CS
SYNCHRONOUS DATA TIMING

VIH
TCSS
VIL
TCKH
TCKL
TCSH
VIH
CLK
VIL
TDIS
TDIH
VIH
DI
VIL
DO
(READ)
VOH
VOL
TCZ
TSV
DO VOH
(PROGRAM)
VOL
Note:
TCZ
TPD
TPD
STATUS VALID
TSV is relative to CS.
TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX76B OR 93XX76C WITH ORG = 1)
Instruction
Data In
Data Out
Req. CLK
Cycles
D15 D0
29
HIGH-Z
13
A8 A7 A6 A5 A4 A3 A2 A1 A0
(RDY/BSY)
13
(RDY/BSY)
13
(RDY/BSY)
29
D15 D0
(RDY/BSY)
29
HIGH-Z
13
SB
Opcode
Address
READ
10
EWEN
00
ERASE
11
ERAL
00
WRITE
01
WRAL
00
EWDS
00
A8 A7 A6 A5 A4 A3 A2 A1 A0
1
A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 D0
TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX76A OR 93XX76C WITH ORG = 0)
Instruction
Data In
Data Out
Req. CLK
Cycles
D7 D0
22
HIGH-Z
14
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
(RDY/BSY)
14
(RDY/BSY)
14
D7 D0
(RDY/BSY)
22
D7 D0
(RDY/BSY)
22
HIGH-Z
14
SB
Opcode
READ
10
EWEN
00
ERASE
11
ERAL
00
WRITE
01
WRAL
00
EWDS
00
DS21796D-page 4
Address
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.0
FUNCTIONAL DESCRIPTION
2.2
Data In/Data Out (DI/DO)
When the ORG* pin is connected to VCC, the (x16)

organization is selected. When it is connected to
ground, the (x8) organization is selected. Instructions,
addresses and write data are clocked into the DI pin on
the rising edge of the clock (CLK). The DO pin is
normally held in a HIGH-Z state except when reading
data from the device, or when checking the READY/
BUSY status during a programming operation. The
READY/BUSY status can be verified during an Erase/
Write operation by polling the DO pin; DO low indicates
that programming is still in progress, while DO high
indicates the device is ready. DO will enter the HIGH-Z
state on the falling edge of CS.
It is possible to connect the Data In and Data Out pins

together. However, with this configuration it is possible
for a bus conflict to occur during the dummy zero
that precedes the read operation, if A0 is a logic highlevel. Under such a condition the voltage level seen at
Data Out is undefined and will depend upon the relative
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of the
driver, the higher the voltage at the Data Out pin. In
order to limit this current, a resistor should be
connected between DI and DO.
2.1
All modes of operation are inhibited when VCC is below

a typical voltage of 1.5V for 93AA and 93LC devices
or 3.8V for 93C devices.
Start Condition
The Start bit is detected by the device if CS and DI are

both high with respect to the positive edge of CLK for
the first time.
Before a Start condition is detected, CS, CLK and DI
may change in any combination (except to that of a
Start condition), without resulting in any device
operation (READ, WRITE, ERASE, EWEN, EWDS,
ERAL or WRAL). As soon as CS is high, the device is
no longer in Standby mode.
An instruction following a Start condition will only be
executed if the required opcode, address and data bits
for any particular instruction are clocked in.
2.3
Data Protection
The EWEN and EWDS commands give additional

protection against accidentally programming during
normal operation.
Note:
For added protection, an EWDS command

should be performed after every write
operation.
After power-up, the device is automatically in the

EWDS mode. Therefore, an EWEN instruction must be
performed before the initial ERASE or WRITE instruction
can be executed.
Block Diagram
VCC
VSS
Memory
Array
Address
Decoder
Address
Counter
Data Register
Output
Buffer
DO
DI
ORG*
CS
Mode
Decode
Logic
PE*
CLK
Clock
Register
*ORG and PE inputs are not available on

A/B devices.
DS21796D-page 5
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.4
ERASE
The DO pin indicates the READY/BUSY status of the

device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical 0 indicates that programming
is still in progress. DO at logical 1 indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
The ERASE instruction forces all data bits of the

specified address to the logical 1 state. The rising
edge of CLK before the last address bit initiates the
write cycle.
Note:
FIGURE 2-1:
Issuing a Start bit and then taking CS low

will clear the READY/BUSY status from
DO.
ERASE TIMING
TCSL
CS
CHECK STATUS
CLK
DI
AN
AN-1
AN-2
A0
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
TWC
DS21796D-page 6
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.5
ERASE ALL (ERAL)

device, if CS is brought high after a minimum of 250 ns
low (TCSL).
The Erase All (ERAL) instruction will erase the entire

memory array to the logical 1 state. The ERAL cycle is
identical to the ERASE cycle, except for the different
opcode. The ERAL cycle is completely self-timed. The
rising edge of CLK before the last data bit initiates the
write cycle. Clocking of the CLK pin is not necessary
after the device has entered the ERAL cycle.
FIGURE 2-2:
Note:

DO.
VCC must be 4.5V for proper operation of ERAL.
ERAL TIMING
TCSL
CS
CHECK STATUS
CLK
DI
X
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
TEC
DS21796D-page 7
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX76A/B/C powers up in the ERASE/WRITE

Disable (EWDS) state. All programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is
executed or VCC is removed from the device.
FIGURE 2-3:
To protect against accidental data disturbance, the

EWDS instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READ instruction is
independent of both the EWEN and EWDS instructions.
EWDS TIMING
TCSL
CS
CLK
DI
FIGURE 2-4:
EWEN TIMING
TCSL
CS
CLK
DI
2.7
READ
devices) output string. The output data bits will toggle on

the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is possible when
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
The READ instruction outputs the serial data of the

addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
FIGURE 2-5:
READ TIMING
CS
CLK
DI
DO
DS21796D-page 8
HIGH-Z
An
A0
Dx
D0
Dx
D0
Dx
D0
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.8
WRITE

device, if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical 0 indicates that programming
is still in progress. DO at logical 1 indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
The WRITE instruction is followed by 8 bits (If ORG is

low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. The self-timed auto-erase and
programming cycle is initiated by the rising edge of CLK
on the last data bit.
FIGURE 2-6:
Note:

DO.
WRITE TIMINGS
TCSL
CS
CLK
DI
An
A0
Dx
D0
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
Twc
DS21796D-page 9
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.9
WRITE ALL (WRAL)

device if CS is brought high after a minimum of 250 ns
low (TCSL).
The Write All (WRAL) instruction will write the entire

memory array with the data specified in the command.
The self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
Clocking of the CLK pin is not necessary after the
device has entered the WRAL cycle. The WRAL
command does include an automatic ERAL cycle for
the device. Therefore, the WRAL instruction does not
require an ERAL instruction but the chip must be in the
EWEN status.
FIGURE 2-7:
Note:

DO.
VCC must be 4.5V for proper operation of WRAL.
WRAL TIMING
TCSL
CS
CLK
DI
Dx
D0
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
TWL
DS21796D-page 10
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

3.0
PIN DESCRIPTIONS
TABLE 3-1:
PIN DESCRIPTIONS
Name
SOIC/PDIP/MSOP/
TSSOP
SOT-23
CS
Chip Select
CLK
Serial Clock
DI
Data In
DO
Data Out
Ground
3.1
VSS
ORG
N/A
Organization / 93XX76C
PE
N/A
Program Enable
VCC
Chip Select (CS)
A high level selects the device; a low level deselects

the device and forces it into Standby mode. However, a
programming cycle which is already in progress will be
completed, regardless of the Chip Select (CS) input
signal. If CS is brought low during a program cycle, the
device will go into Standby mode as soon as the
programming cycle is completed.
CS must be low for 250 ns minimum (TCSL) between
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
3.2
Function
Serial Clock (CLK)
The Serial Clock is used to synchronize the communication between a master device and the 93XX series
device. Opcodes, address and data bits are clocked in
on the positive edge of CLK. Data bits are also clocked
out on the positive edge of CLK.
CLK can be stopped anywhere in the transmission
sequence (at high or low-level) and can be continued
anytime with respect to clock high time (TCKH) and
clock low time (TCKL). This gives the controlling master
freedom in preparing opcode, address and data.
CLK is a don't care if CS is low (device deselected). If
CS is high, but the Start condition has not been
detected (DI = 0), any number of clock cycles can be
received by the device without changing its status (i.e.,
waiting for a Start condition).
CLK cycles are not required during the self-timed
WRITE (i.e., auto ERASE/WRITE) cycle.
After detection of a Start condition the specified number
of clock cycles (respectively low to high transitions of
CLK) must be provided. These clock cycles are
required to clock in all required opcode, address and
data bits before an instruction is executed. CLK and DI
then become don't care inputs waiting for a new Start
condition to be detected.
Power Supply
3.3
Data In (DI)
Data In (DI) is used to clock in a Start bit, opcode,

address and data synchronously with the CLK input.
3.4
Data Out (DO)
Data Out (DO) is used in the Read mode to output data

synchronously with the CLK input (TPD after the
positive edge of CLK).
This pin also provides READY/BUSY status information during ERASE and WRITE cycles. READY/BUSY
status information is available on the DO pin if CS is
brought high after being low for minimum Chip Select
low time (TCSL) and an erase or write operation has
been initiated.
The Status signal is not available on DO, if CS is held
low during the entire ERASE or WRITE cycle. In this
case, DO is in the HIGH-Z mode. If status is checked
after the ERASE/WRITE cycle, the data line will be high
to indicate the device is ready.
Note:
3.5

DO.
Organization (ORG)
When the ORG pin is connected to VCC or Logic HI, the

(x16) memory organization is selected. When the ORG
pin is tied to VSS or Logic LO, the (x8) memory
organization is selected. For proper operation, ORG
must be tied to a valid logic level.
93XX76A devices are always x8 organization and
93XX76B devices are always x16 organization.
DS21796D-page 11
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

3.6
Program Enable (PE)
This pin allows the user to enable or disable the ability

to write data to the memory array. If the PE pin is tied
to VCC, the device can be programmed. If the PE pin is
tied to VSS, programming will be inhibited. PE is not
available on 93XX76A or 93XX76B. On those devices,
programming is always enabled. This pin cannot be
floated, it must be tied to VCC or VSS.
DS21796D-page 12
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

4.0
PACKAGING INFORMATION
4.1
Package Marking Information

8-Lead MSOP (150 mil)
Example:
3L76I
2281L7
XXXXXXT
YWWNNN
MSOP 1st Line Marking Codes

Device
std mark
Pb-free
mark
93AA76C
3A76CT
GA76CT
93LC76C
3L76CT
GL76CT
93C76C
3C76CT
GC76CT
T = blank for commercial, I for Industrial,

E for Extended.
Example:
6-Lead SOT-23
SOT23 Marking Codes

4EL7
XXNN
8-Lead PDIP
Example:
XXXXXXXX
XXXXXNNN
YYWW
93LC76
I/P 1L7
0228
8-Lead SOIC
Example:
XXXXXXXX
XXXXYYWW
NNN
93LC76
I/SN 0228
1L7
Device
93AA76A
93AA76B
93LC76A
93LC76B
93C76A
93C76B
I-temp
4BNN
4LNN
4ENN
4PNN
4HNN
4TNN
E-temp
4FNN
4RNN
4JNN
4UNN
Pb-free topside mark is same; Pb-free

noted only on carton label.
TSSOP 1st Line Marking Codes
Example:
8-Lead TSSOP
L76
I228
1L7
XXXX
TYWW
NNN
Legend:
XX...X
T
Blank
I
E
YY
WW
NNN
Note:
Device
std mark
Pb-free
mark
93AA76C
A76C
GADC
93LC76C
L76C
GLDC
93C76C
C76C
GCDC
Temperature grade is marked on line 2.
Part number
Temperature
Commercial
Industrial
Extended
Year code (last 2 digits of calendar year) except TSSOP
and MSOP which use only the last 1 digit
Week code (week of January 1 is week 01)
Alphanumeric traceability code
Custom marking available.
DS21796D-page 13
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
A2
A
c
A1
(F)
Units
Dimension Limits
n
p
MIN
INCHES
NOM
MAX
MILLIMETERS*
NOM
8
0.65 BSC
0.75
0.85
0.00
4.90 BSC
3.00 BSC
3.00 BSC
0.40
0.60
0.95 REF
0
0.08
0.22
5
5
-
MIN
8
Number of Pins
Pitch
.026 BSC
A
.043
Overall Height
A2
Molded Package Thickness
.030
.033
.037
A1
.000
.006
Standoff
E
Overall Width
.193 TYP.
E1
.118 BSC
Molded Package Width
D
.118 BSC
Overall Length
L
.016
.024
.031
Foot Length
Footprint (Reference)
F
.037 REF
0
8
Foot Angle
c
.003
.006
.009
Lead Thickness
B
.009
.012
.016
Lead Width
5
15
Mold Draft Angle Top
5
15
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
MAX
1.10
0.95
0.15
0.80
8
0.23
0.40
15
15
JEDEC Equivalent: MO-187

Drawing No. C04-111
DS21796D-page 14
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

6-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E
E1
p1
c
A
A2
Units
Dimension Limits
n
p
MIN
A1
INCHES*
NOM
MAX
MILLIMETERS
NOM
6
0.95
1.90
0.90
1.18
0.90
1.10
0.00
0.08
2.60
2.80
1.50
1.63
2.80
2.95
0.35
0.45
0
5
0.09
0.15
0.35
0.43
0
5
0
5
MIN
Number of Pins
6
Pitch
.038
p1
Outside lead pitch (basic)
.075
Overall Height
A
.035
.046
.057
.035
.043
.051
A2
Standoff
.000
.003
.006
A1
Overall Width
E
.102
.110
.118
.059
.064
.069
E1
Overall Length
D
.110
.116
.122
Foot Length
L
.014
.018
.022
Foot Angle
0
5
10
c
Lead Thickness
.004
.006
.008
Lead Width
B
.014
.017
.020

0
5
10

0
5
10
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .005" (0.127mm) per side.
MAX
1.45
1.30
0.15
3.00
1.75
3.10
0.55
10
0.20
0.50
10
10
JEITA (formerly EIAJ) equivalent: SC-74A

Drawing No. C04-120
DS21796D-page 15
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

8-Lead Plastic Du8-Lead Plastic Small Outline (al In-line (P) 300 mil (PDIP)
E1
D
2
n
A2
A1
B1
p
eB
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Base to Seating Plane
Shoulder to Shoulder Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
* Controlling Parameter
Significant Characteristic
A
A2
A1
E
E1
D
L
c
B1
B
eB
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010 (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21796D-page 16
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

8-Lead Plastic Small Outline (SN) Narrow, 150 mil (SOIC)
E
E1
D
2
B
h
45
c
A2
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Standoff
Overall Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
A
A2
A1
E
E1
D
h
L
c
B
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
.010 (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21796D-page 17
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

8-Lead Plastic Thin Shrink Small Outline (ST) 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
A
c
A1
A2
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Standoff
Overall Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
A
A2
A1
E
E1
D
L
c
B
MIN
INCHES
NOM
MAX
8
.026
.033
.002
.246
.169
.114
.020
0
.004
.007
0
0
.035
.004
.251
.173
.118
.024
4
.006
.010
5
5
.043
.037
.006
.256
.177
.122
.028
8
.008
.012
10
10
MILLIMETERS*
NOM
MAX
8
0.65
1.10
0.85
0.90
0.95
0.05
0.10
0.15
6.25
6.38
6.50
4.30
4.40
4.50
2.90
3.00
3.10
0.50
0.60
0.70
0
4
8
0.09
0.15
0.20
0.19
0.25
0.30
0
5
10
0
5
10
MIN
Notes:
.005 (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
DS21796D-page 18
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

APPENDIX A:
REVISION HISTORY
Revision C
Corrections to Section 1.0, Electrical Characteristics.
Section 4.1, 6-Lead SOT-23 package to OT.
Revision D
Corrections to Device Selection Table, Table 1-1, Table
1-2, Section 2.4, Section 2.5, Section 2.8 and Section
2.9. Added note to Figure 2-7.
DS21796D-page 19
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

NOTES:
DS21796D-page 20
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet

Web Site
SYSTEMS INFORMATION AND

UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits.The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
The Microchip web site is available at the following

URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
Latest Microchip Press Releases
Technical Support Section with Frequently Asked
Questions
Design Tips
Device Errata
Job Postings
Microchip Consultant Program Member Listing
Links to other useful web sites related to
Microchip Products
Conferences for products, Development Systems,
technical information and more
Listing of seminars and events
DS21796D-page 21
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: 93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
Literature Number: DS21796D
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21796D-page 22
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
X
PART NO.
Device
Tape & Reel Temperature

Range
Device
/XX
Package
X
Lead Finish
Examples:
a)
b)
93AA76C-I/MS: 8K, 1024x8 or 512x16 Serial

EEPROM, MSOP package, 1.8V
93AA76AT-I/OT: 8K, 1024x8 Serial EEPROM,
SOT-23 package, tape and reel, 1.8V
93AA76A: 8K 1.8V Microwire Serial EEPROM (x8)

93AA76B: 8K 1.8V Microwire Serial EEPROM (x16)
93AA76C: 8K 1.8V Microwire Serial EEPROM w/ORG
c)
93AA76CT-I/MS: 8K, 1024x8 or 512x16 Serial

EEPROM, MSOP package, tape and reel, 1.8V
93LC76A: 8K 2.5V Microwire Serial EEPROM (x8)

93LC76B: 8K 2.5V Microwire Serial EEPROM (x16)
93LC76C: 8K 2.5V Microwire Serial EEPROM w/ORG
a)
93C76A:
93C76B:
93C76C:
c)
93LC76C-I/MS: 8K, 1024x8 or 512x16 Serial

93LC76BT-I/OT: 8K, 512x16 Serial EEPROM,
93LC76CXT-I/SNG: 8K, 1024x8 or 512x16
Serial EEPROM, SOIC package, Industrial
temperature, tape and reel, Pb-free finish, 2.5V
8K 5.0V Microwire Serial EEPROM (x8)

8K 5.0V Microwire Serial EEPROM (x16)
8K 5.0V Microwire Serial EEPROM w/ORG
b)
a)
Tape & Reel:
Blank =
T
=
Standard pinout
Tape & Reel
Temperature Range
I
E
=
=
-40C to +85C
-40C to +125C
Package
MS
OT
P
SN
ST
=
=
=
=
=
Plastic MSOP (Micro Small outline, 8-lead)

SOT-23, 6-lead (Tape & Reel only)
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
TSSOP, 8-lead
Lead Finish:
Blank =
G
=
b)
93C76C-I/MS: 8K, 1024x8 or 512x16 Serial

93C76AT-I/OT: 8K, 1024x8 Serial EEPROM,
Standard 63% / 37% SnPb

Pb-free (Matte Tin - Pure Sn)
Sales and Support

Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1.
2.
3.
Your local Microchip sales office

The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS21796D-page 23
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

NOTES:
DS21796D-page 24
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchips code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device

applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchips products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL, SmartShunt and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net,
dsPICworks, ECAN, ECONOMONITOR, FanSense,
FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP,
ICEPIC, microPort, Migratable Memory, MPASM, MPLIB,
MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC,
Select Mode, SmartSensor, SmartTel and Total Endurance
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in October
2003. The Companys quality system processes and procedures are for
its PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial
EEPROMs, microperipherals, nonvolatile memory and analog
products. In addition, Microchips quality system for the design and
manufacture of development systems is ISO 9001:2000 certified.
DS21796D-page 25
WORLDWIDE SALES AND SERVICE

AMERICAS
China - Beijing
Korea
Corporate Office
Unit 706B
Wan Tai Bei Hai Bldg.
No. 6 Chaoyangmen Bei Str.
Beijing, 100027, China
Tel: 86-10-85282100
Fax: 86-10-85282104
168-1, Youngbo Bldg. 3 Floor

Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
China - Chengdu
200 Middle Road

#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
2355 West Chandler Blvd.

Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Rm. 2401-2402, 24th Floor,

Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200
Fax: 86-28-86766599
Boston
China - Fuzhou
2 Lan Drive, Suite 120

Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Unit 28F, World Trade Plaza

No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506
Fax: 86-591-7503521
Atlanta
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
2767 S. Albright Road
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Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888
Fax: 949-263-1338
San Jose
1300 Terra Bella Avenue
Mountain View, CA 94043
Tel: 650-215-1444
Fax: 650-961-0286
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699
Fax: 905-673-6509
ASIA/PACIFIC
Australia
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Hong Kong SAR

Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
Singapore
Taiwan
Kaohsiung Branch
30F - 1 No. 8
Min Chuan 2nd Road
Kaohsiung 806, Taiwan
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
China - Shanghai
Austria
Room 701, Bldg. B

Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
China - Shenzhen
Regus Business Centre

Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45-4420-9895 Fax: 45-4420-9910
Rm. 1812, 18/F, Building A, United Plaza

No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380
Fax: 86-755-8295-1393
China - Shunde
Room 401, Hongjian Building, No. 2
Fengxiangnan Road, Ronggui Town, Shunde
District, Foshan City, Guangdong 528303, China
Tel: 86-757-28395507 Fax: 86-757-28395571
China - Qingdao
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
India
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, OShaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
France
Parc dActivite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: 31-416-690399
Fax: 31-416-690340
United Kingdom
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
01/26/04
DS21796D-page 26

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93AA76A/B/C, 93LC76A/B/C,

The Microchip Technology Inc. 93XX76A/B/C devices

Low-power CMOS technology

Pin Function Table

Serial Data Clock

Serial Data Input

Serial Data Output

2004 Microchip Technology Inc.

Package Types (not to scale)

93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

Absolute Maximum Ratings ()

All parameters apply over the specified

VCC = 1.8V to 5.5V

High-level input voltage

Low-level input voltage

Low-level output voltage

IOL = 2.1 mA, VCC = 4.5V

High-level output voltage

IOH = -400 A, VCC = 4.5V

Input leakage current

VIN = VSS to VCC

Output leakage current

VOUT = VSS to VCC

Pin capacitance (all inputs/

ICC write Write current

FCLK = 3 MHz, VCC = 5.5V

ICC read Read current

FCLK = 3 MHz, VCC = 5.5V

VCC voltage detect

This parameter is periodically sampled and not 100% tested.

2004 Microchip Technology Inc.

93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

All parameters apply over the specified

VCC = 1.8V to 5.5V

4.5V VCC < 5.5V

Clock high time

4.5V VCC < 5.5V

Clock low time

4.5V VCC < 5.5V

Chip Select setup time

4.5V VCC < 5.5V

Chip Select hold time

1.8V VCC < 5.5V

Chip Select low time

1.8V VCC < 5.5V

Data input setup time

4.5V VCC < 5.5V

Data input hold time

4.5V VCC < 5.5V

Data output delay time

4.5V VCC < 5.5V, CL = 100 pF

Data output disable time

4.5V VCC < 5.5V, (Note 1)

Status valid time

4.5V VCC < 5.5V, CL = 100 pF

Program cycle time

Erase/Write mode (AA and LC

ERAL mode, 4.5V VCC 5.5V

WRAL mode, 4.5V VCC 5.5V