24AA00/24LC00/24C00

128-Bit I2C Bus Serial EEPROM

Package Types
8-PIN PDIP/SOIC NC NC NC Vss 8-PIN TSSOP NC NC NC VSS 5-PIN SOT-23 SCL VSS SDA 1 2 3 4 NC 5 VCC
NC 1 NC 2 NC 3 VSS 4

1 2 3 4

8 7 6 5

VCC NC SCL SDA

Features:
Single Supply with Operation down to 1.8V for 24AA00 Devices, 2.5V for 24LC00 Devices Low-Power CMOS Technology: - Read current 500 A, typical - Standby current 100 nA, typical 2-Wire Serial Interface, I2C Compatible Schmitt Trigger Inputs for Noise Suppression Output Slope Control to Eliminate Ground Bounce 100 kHz and 400 kHz Clock Compatibility Page Write Time 3 ms, Typical Self-Timed Erase/Write Cycle ESD Protection >4000V More than 1 Million Erase/Write Cycles Data Retention >200 Years Factory Programming Available Packages include 8-lead PDIP, SOIC, TSSOP, DFN, TDFN and 5-lead SOT-23 Pb-Free and RoHS Compliant Temperature Ranges Available: - Industrial (I): -40C to +85C - Automotive (E): -40C to +125C

1 2 3 4

8 7 6 5

VCC NC SCL SDA

Block Diagram
HV Generator

I/O Control Logic

Memory Control Logic

XDEC

EEPROM Array

SDA

SCL YDEC

Description:
The Microchip Technology Inc. 24AA00/24LC00/ 24C00 (24XX00*) is a 128-bit Electrically Erasable PROM memory organized as 16 x 8 with a 2-wire serial interface. Low-voltage design permits operation down to 1.8 volts for the 24AA00 version, and every version maintains a maximum standby current of only 1 A and typical active current of only 500 A. This device was designed for where a small amount of EEPROM is needed for the storage of calibration values, ID numbers or manufacturing information, etc. The 24XX00 is available in 8-pin PDIP, 8-pin SOIC (3.90 mm), 8-pin TSSOP, 8-pin 2x3 DFN, TDFN and the 5-pin SOT-23 packages.

VCC VSS

Sense AMP R/W Control

*24XX00 is used in this document as a generic part number for the 24AA00/24LC00/24C00 devices. I2C is a trademark of Philips Corporation.

1996-2011 Microchip Technology Inc.

DS21178H-page 1

24AA00/24LC00/24C00
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings()
VCC .............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied ................................................................................................-40C to +125C ESD protection on all pins .......................................................................................................................................... 4 kV NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS
Industrial (I) : Automotive (E) Symbol VIH VIL VHYS VOL ILI ILO CIN, COUT ICC Write ICC Read ICCS TA = -40C to +85C, TA = -40C to +125C, Max. 0.3 VCC 0.4 1 1 10 2 1 1 Units V V V V A A pF mA mA A (Note) (Note) VCC 2.5V (Note) IOL = 3.0 mA, VCC = 4.5V IOL = 2.1 mA, VCC = 2.5V VIN = VCC or VSS VOUT = VCC or VSS VCC = 5.0V (Note) TA = 25C, FCLK = 1 MHz VCC = 5.5V, SCL = 400 kHz VCC = 5.5V, SCL = 400 kHz VCC = 5.5V, SDA = SCL = VCC VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V Conditions

All Parameters apply across the recommended operating ranges unless otherwise noted Parameter SCL and SDA pins: High-level input voltage Low-level input voltage Hysteresis of Schmitt Trigger inputs Low-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs) Operating current Standby current Note:

Min. 0.7 VCC .05 VCC

This parameter is periodically sampled and not 100% tested.

FIGURE 1-1:

BUS TIMING DATA

SCL

TSU:STA TLOW THD:DAT TSU:DAT TSU:STO

SDA IN

TSP

THD:STA TBUF TAA

SDA OUT

DS21178H-page 2

1996-2011 Microchip Technology Inc.

24AA00/24LC00/24C00
TABLE 1-2: AC CHARACTERISTICS
Industrial (I) : Automotive (E): Symbol FCLK Min 4000 4000 600 4700 4700 1300 4000 4000 600 4700 4700 600 0 250 250 100 4000 4000 600 4700 4700 1300 20+0.1 CB TA = -40C to +85C, VCC = 1.8V to 5.5V TA = -40C to +125C, VCC = 4.5V to 5.5V Max 100 100 400 1000 1000 300 300 3500 3500 900 250 50 4 Units kHz Conditions 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V (Note 1) 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V (Note 2) 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc 5.5V (Note 1), CB 100 pF (Notes 1, 3) All Parameters apply across all recommended operating ranges unless otherwise noted Parameter Clock frequency

Clock high time

THIGH

ns

Clock low time

TLOW

ns

SDA and SCL rise time (Note 1) SDA and SCL fall time Start condition hold time

TR

ns

TF THD:STA

ns ns

Start condition setup time

TSU:STA

ns

Data input hold time Data input setup time

THD:DAT TSU:DAT

ns ns

Stop condition setup time

TSU:STO

ns

Output valid from clock (Note 2)

TAA

ns

Bus free time: Time the bus must TBUF be free before a new transmission can start Output fall time from VIH minimum to VIL maximum Input filter spike suppression (SDA and SCL pins) Write cycle time TOF TSP TWC

ns

ns ns ms

Endurance 1M cycles (Note 4) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained at www.microchip.com.

1996-2011 Microchip Technology Inc.

DS21178H-page 3

24AA00/24LC00/24C00
2.0
Name NC VSS SDA SCL WP VCC Note 1:

PIN DESCRIPTIONS
PDIP 1, 2, 3 4 5 6 7 8 SOIC 1, 2, 3 4 5 6 7 8 TSSOP 1, 2, 3 4 5 6 7 8 DFN(1) 1, 2, 3 4 5 6 7 8 TDFN(1) 1, 2, 3 4 5 6 7 8 SOT-23 2 3 1 5 4 Ground Serial Address/Data I/O Serial Clock Write-Protect Input +1.8V to 5.5V Power Supply Description Not Connected

Pin Function Table

The exposed pad on the DFN/TDFN packages can be connected to VSS or left floating.

DS21178H-page 4

1996-2011 Microchip Technology Inc.