C
fC C
where fC is the clock frequency. Equation (1) shows that the
parallel SC circuit realization of Fig 1 is equivalent to a
resistor (Fig 2). If the clock frequency is much larger than the
frequency of the inputs v1 and v2, we can consider the inputs to
be constant over the time period T and the emulated resistance
can be used in place of a normal resistor.
R=
I. INTRODUCTION
i1(t)
S1
v1(t)
i2(t)
i1(t)
i2(t)
S2
+
vC(t)
v2(t)
v1(t)
Fig 2
v2(t)
Continuous-time resistor R
TABLE I
BASIC SWITCHED CAPACITOR BLOCKS AND Z-DOMAIN EXPRESSIONS
()
G z =
n
n
n1
+ " + a0
an z + an1z
n
n1
+ " + b0
bn z + bn1z
G ( z ) = A G' ( z )
n
0 n
(2)
or G ( z ) = A / G' ( z )
n
0 n
(3)
where A0=(an/bn) is a constant; gp(z)=(ApBpz) or (ApBpz-1)
p=1,2,,n; ais, bis are the coefficients of numerator and
denominator polynomials for i=0,1,,n; and Ap and Bp are
coefficients of the expansion.
Each row of the function of (3) can be represented by any
one of the following recursive relationship of (4).
G
or
Usually real-world physical systems are described by
fractional order differential equations. Most of the researchers
have developed analog realizations of fractional order circuits.
In [14]-[16], the authors have developed analogue realizations
of s-domain fractional order controllers using ideal resistance
and capacitor networks. Since ideal capacitor cannot exist,
Bohannan in [17] has proposed a fractional order control
element using a lossy capacitor with Lithium Hydrazinium
Sulphate (LiN2H5SO4) as dielectric. In [18], Krishna et al.
have made an attempt to realize the half differentiator and half
integrator in s-domain using continued fraction expansion.
Digital realizations of fractional order controller have been
developed in [19-23].
In this paper, SC realizations of the fractional-order
differentiators and integrators [24-30] of order based on AlAlaoui operator, Tustin operator, Schneider operator, AlAlaoui-SKG rule and the Hsue operator have been developed.
OrCAD Pspice simulation results have been presented to
validate the effectiveness of the proposed approach.
The paper is organized as follows: Section II discusses
briefly about continued fraction expansion technique. In
Section III, the continued fraction expansions of the various
operator based half differentiator and half integrator models
are given. Section IV shows the first-order and third-order SC
realizations of half differentiators and half integrators. Section
V presents the OrCAD Pspice simulation results and compares
them with the theoretical results of their continuous-time
counterparts. Section VI concludes the paper.
j,p (
z) =
1
Ap + Bpz + G
z
m,p+1 ( )
(4)
G1, p ( z ) =
(5)
1
B p z Ap
1
G1 (z) = C * A0 +
g11 (z)
C2
(t-T0)
C1
VIN
C1 e
C2 e
' (z)
G3 (z) = C * G3
'
G3 (z) = A0 +
g31 (z)
(t-T0)
TABLE IIA
DIFFERENT OPERATOR BASED CONTINUED FRACTION EXPANSIONS
VOUT
1
1
1
g32 (z)
g33 (z)
1
g31 (z) +
1
g32 (z) +
1
g33 (z)
T/2 T 3T/2 2T
In Fig. 5,
Fig 4
Switched Capacitor
Amplifier
e
+
VIN
e
Transfer Function
Expansion
Al-Alaoui Operator Based Half Differentiator Models
C = 169;A0 = 0.2;
236.6z 169
First
G
z =
1aldiff ( )
7z 1
Order
g11 (z) = 8.75z 1.25;
Third
Order
+0.0111z + 0.0092
z3 0.0714z2
+0.0077z 0.0009111
VOUT
g32 (z)=7.2582z+40.5036;
g33 (z)=0.0049z-0.0242;
Fig 5
C = 62.78;A0 = 0.538;
G
(z) =
3aldiff
1657z3 2603z2
+1048z 62.78
3
2
49z 49z + 7z + 1
Third
Order
z 0.7143
C = 0.0296;A0 = 1;
g11 (z) = 1.75z 1.25;
C = 0.0296;A0 = 1;
0.0296z3 0.0296z2
+0.00423z + 0.0006026
z3 1.571z2
+0.6327z 0.0379
z + 0.5
C = 44.72;A0 = 1;
g11 (z) = z + 0.5;
C = 0.02236;A0 = 1;
0.02236 z + 0.01118
z - 0.5
Order
0.008573z + 0.006858
z3 0.5z2 0.125z 0.0625
V.
TYPE I
e
o
e C2 e
e
o
C1
Gm,p+1 (z)
TYPE II
44.72z 22.36z
5.591z -2.795
3
2
z + 0.1404z
0.009804z + 0.001382
1
G1,p (z) =
Bpz Ap Gm,p + 1 (z)
e
Bp =
;Ap =
C
C
(7)
+
o
Gm,p+1 (z)
TYPE III
1 e o
e
o C
2.192e - 4z + 3.091e - 5
3
2
z - 0.5z - 0.125z 0.0625
;Bp = ;
C
C
1 & 2 =
Gm,p +1 (z)
TYPE IV
e
Ap =
;Bp =
C
C
C2
(9)
o
Gm,p +1 (z)
TYPE V
1
G1, p (z) =
Bp z Ap + Gm, p + 1 (z)
e
o
e C2 e
o
C1 e
;Bp = ;
C
C
C1 & C2 = C
Ap =
C1
VIN
(10)
C2
C1
1
G1,p (z) =
Bpz Ap Gm,p + 1 (z)
C = 0.02236;A0 = 1;
-0.00106z + 8e - 4
3
2
z 1.399z + 0.4132z + 0.0186
(8)
0.02236z3 - 0.01697z2
Ap =
1
G1, p (z) =
Bpz + Ap Gm,p + 1 (z)
+0.001464z 0.0001366
3
2
z 0.8376z + 0.1577z 0.1157
(6)
TABLE IIB
DIFFERENT OPERATOR BASED CONTINUED FRACTION EXPANSIONS
Al-Alaoui-SKG Rule Based Half Integrator Models
H3ALSKG int (z) =
C = 0.02804;A0 = 1;
Third
g31 (z) = 1.7146z 1.1260;
Order
0.02804z3 0.007133z2
1
G1, p (z) =
Bpz Ap Gm,p + 1 (z)
+
Bp =
;Ap =
C
C
C1 & C2 = C
VOUT
C6
o C4 e
C5
C4
Gm,p +1 (z)
TYPE VI
e
o
e C2 e
o
+
C1
o
1 e o
o
Fig 6
1
G1, p (z) =
Bpz + Ap + Gm, p + 1 (z)
Bp =
;Ap = ;
C
C
C1 & C2 = C; 1 & 2 =
(11)
Gm,p+1 (z)
C1
o
Fig 7
e
o
VOUT
C4
o
C2
C1
VIN
C5
C6 o
e
C6
C2
VIN
e
o
C1
e C1
o o
C7
VOUT
C6
o e
e
o
C5
C6
C8
C8
VOUT
OUT
OUT
e
o o e
C5
o
+
o
OUT
C6
e
o
C6
C10
e C11 e
o o
+OUT
C9
oe
C9
Fig 8
C7
o e
C10
C11
o e C9 e
C9 o o
C4
o e
OUT
+
C1
o e C3 e
C3
o o
o e C3 e
o o
C3
C7
C2
C4
+ OUT
e e
e
o
OUT
e C5 e
o o
C8
e
o
C1
VIN
o C3 e
e o
o C3 e
e o
C2
C2
OUT
Fig 10 Hsue operator based third order SC half differentiator (using TSE)
C2
C1
VIN
e
o
C1
e C2 e
o o
-
VOUT
OUT
C4
o e C3 e
C3 o
o
o e C3 e
C3 o o
e
C8
C7
OUT
C6
o o
OUT
C5
o
e
o
C6
C10
oe
C9
Fig 9
e C11 e
o o
C9
o o
OUT
VI. CONCLUSION
In this paper, Switched capacitor realizations of fractionalorder differ-integrators ( s r ; r = 1 2 ) based on the different
CMOS TRANSMISSION
GATE
VII. APPENDIX
The design procedure is as follows:
The Al-Alaoui-SKG rule based third order half integrator
model is (Table IIB)
0.02804 z 3 0.007133 z 2 + 0.001464 z 0.0001366 (12)
H
3 ALSKG int
(z) =
VIII. REFERENCES
(13)
[1]
[2]
[3]
B z A G
(z)
p
p
m, p + 1
1
1
=
g ( z) B z A G
(z)
p
p
m, p + 1
2
(15)
1
1
=
( z)
g ( z) B z A G
3
p
p
m, p + 1
(16)
VIN
VOUT
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
SC
INTEGRATOR
TYPE I
[15]
SC
INTEGRATOR
TYPE II
+
[16]
SC
INTEGRATOR
TYPE I
[17]
[18]
[19]
[20] C. C. Tseng, Design of FIR and IIR fractional order Simpson digital
integrators, Proc. Signal Processing, Elsevier: Science Direct, vol. 87,
no. 5, pp. 1045-1057, May 2007.
[21] L. Dorcak, I. Petras, J. Terpak and M. Zborovjan, Comparison of the
methods for discrete approximation of the fractional-order operator,
Acta Montanistica Slovaca, 2003, pp. 236-239.
[22] R. S. Barbosa and J. T. Machado, Implementation of discrete-time
fractional order controllers based on LS approximation, Acta
Polytechnica Hungarica, vol. 3, no. 4, 2006, pp. 5-21.
[23] B. M. Vinagre, I. Petras, P. Merchan and L. Dorcak, Two digital
realizations of fractional order controllers: Application to temperature
control of solid, Proc. ECC'2001, Sept. 4-7, Seminario de Vilar, Porto,
Portugal, pp.1764 - 1767.
[24] P. Varshney, M. Gupta and G. S. Visweswaran, Higher degree half
order differentiators and integrators, Proc. 2nd Int. Conference on
Embedded Systems, Mobile Communication and Computing 2007,
Bangalore.
[25] P. Varshney, M. Gupta and G. S. Visweswaran, New switched
capacitor fractional order integrator, J. of Active & Passive Electronic
Devices JAPED, vol. 2, no. 3, pp. 187-197, Pennsylvania, USA.
[26] M. Gupta, P. Varshney, G. S. Visweswaran and B. Kumar, Novel
digital differentiator and corresponding fractional order differentiator
models, SIGMAP 2008 International Conference on Signal Processing
& Multimedia Applications, Portugal, July 2008, pp. 47-54.
[27] P. Varshney, M. Gupta and G. S. Visweswaran, Switched capacitor
realizations of half differentiator, MTECS 2005 National Conference
on Modern Trends in Electronics and Communication Systems, Aligarh,
pp. 9-13.